Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Maintenance Management 4.0

Jochen Kinauer
Director Channel Sales
camLine GmbH

Abstract
Highly productive, profitable manufacturing must also focus on the automation of maintenance in order to work efficiently, flexibly and sustainably. The purpose of intelligent maintenance is more than just organizing the maintenance staff! - It must analyze process data for predictive maintenance, observe the material flow, keep spare parts, coordinate the maintenance staff and, of course, document maintenance activities. In addition, it is important in a complex production with large plant inventory that the maintenance measures and experiences are documented as best-known methods (BKM). There are different maintenance methods like corrective, predictive or preventive maintenance. Each maintenance type may be used at specific occasions, depending on the impact to the life time of the equipment and production. Predictive Maintenance as the most complex maintenance type requires that equipment data is analyzed with statistical methods like Western Electric rules. About camLine camLine (camLine.com) develops and markets its own software providing powerful solutions to the challenge of "Manufacturing Excellence" in the MOM sector. camLine’s IT-based infrastructure systems are used in the manufacturing of high-tech industries. camLine's priorities are quality assurance with SPC/APC/SQM, process integrity with a recipe management, production logistics, efficiency (OEE), shop floor integration, engineering analytics, machine maintenance, and innovation efficiency. Training and consulting is provided by camLine’s own academy. camLine has been offering its services worldwide for more than 29 years.

Biography
Jochen Kinauer currently serves as Director of Channel Sales and Public Relations at camLine GmbH. In his career, Jochen was responsible for SW Automation Projects for Semiconductor Manufacturing, which includes MES, Equipment Integration, Tool Controls, FDC, APC and SPC. In addition Jochen Kinauer serves as Cluster Manager at Silicon Saxony e.V. for the cluster Advanced Semiconductor Manufacturing Technologies and RFID. As part of his role Jochen organizes an annual RFID Symposium in Dresden, showing new developments and technologies in the area of RFID and Indoor Material Tracking that takes place every year at the beginning of December in Dresden, Germany.

JSR: introduction and portfolio

Jan Van Steenbergen
Senior Technical Account Manager
JSR

Abstract
JSR Corporation established in 1957 has built up over the years an expertise in polymer chemistry. JSR is present in different market fields: Petrochemicals, Fine Chemicals, Life Science and Emerging Technologies. Today I will elaborate more on the field of Fine Chemicals in which we produce materials for the semiconductor, display and optical industry. JSR has a large portfolio to cover the different needs of the semiconductor industry. We produce photoresists, anti-reflective coatings, multi layer materials, wafer-level packaging materials, and many more. JSR has a global operation in place, with production sites in Asia, America and Europe. For all materials, we have a back-up production location to fit with the requirement of business contingency. Our R&D centers in Japan, Belgium and United States works closely together with these entities to provide technical support to the customers. We produce photoresist that cover the full spectra from g, h-iline up to the most advanced resists for EUV. Today in Europe the majority of photoresist are used for More than Moore applications to serve end markets who are focused on power devices, sensors, MEMS,… Therefore, I have chosen to highlight these materials. I will cover our portfolio for iline and KrF materials. For both product lines we have different photoresist to cover the different needs of our customers. You may divide our products in three applications: critical photoresist to cover the most stringent CD requirement, non-critical resist used for implant and (wet and dry) etch and specialty photoresist that require special design. Lately we have developed two new iline resist: - Fast and cheap multi-purpose photoresist for non-critical layers - Iline resist with improved properties for wet etching The data I will share on these products will show the basic lithography parameters like spin speed, exposure latitude, depth of focus and resolution

Biography
Jan Van Steenbergen is a Senior Technical Account Manager for JSR Micro NV in Belgium since 2006. Jan was born in Antwerp, Belgium on 13th November 1978. He graduated from the Catholic University of Leuven in 2002 with a master degree in chemical engineering technology. In 2002 he started to work for imec in Leuven as process engineer supporting the development of Germanium CMOS devices. In 2006 he started working for JSR Micro NV in Leuven, as application engineer in the field of lithography. Over the years his role in the organisation changed to a more sales oriented position supporting customer in EMEA region.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Plasma etch and deposition solutions for SiC and GaN devices

Mark Dineen
Technical Marketing Manager
Oxford Instruments Plasma Technology

Abstract
Silicon Carbide (SiC) and Gallium Nitride (GaN) are becoming increasingly important materials for RF and Power devices.Find out how plasma process solutions are used to enable these devices and maximise their performance.

Biography
Dr Mark Dineen graduated from Cardiff University with a PhD on ‘Plasma etching of Gallium Nitride’ and joined Oxford Instruments in 2000. Firstly as a Process Engineer working on etching of III-V materials, then moving into Product Management and more recently marketing Mark has a wealth of experience related to Compound Semiconductor device processing.

Low CoO, High EHS Performance. Easy with DAS!

Falk Allmrodt
Key Account Manager
DAS En­vi­ron­men­tal Ex­pert GmbH

Abstract
MOCVD processes for manufacturing of red LEDs are using highly toxic and combustible gases, that pose a risk to health and safety. Especially the use of AsH3 is of environmental concern and As compounds are subject to strict limitations. The treatment of the waste gases from such processes is therefore more challenging than for other processes in semiconductor manufacturing. While securing highest safety standards the cost of ownership, including consumption of industrial water and treatment of contaminated waste water, shall be minimized. We discuss the approaches that were tested in a LED manufacturing site to improve CoO and reduce emissions.

Biography
- Born in 1978, Germany - Since 1994 experience in the semiconductor industry - Experience in factory automation - Service experience Worldwide - With DAS since 2014

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Atomic layer deposition for 3D objects and MEMS

Christoph Hossbach
General Manager
Picosun Europe GmbH

Abstract
d objects and MEMS Atomic layer deposition (ALD) is superb method to deposit high quality thin films to challenging structures. It provides uniform, conformal coatings of various materials, for example many metal oxides, nitrides and pure metals. It does not require line of sight, so even pipes or microfluidic channels can be coated from inside. The growth is digital, so thickness is well controlled and the films do not have pin-holes. Therefore it is popular approach to passivate and protect parts from nanodevices to large machine parts. ALD films are also used to tune electrical (insulating and conductive layers), optical and mechanical properties and for encapsulation. ALD is widely used in microelectronics and Moore’s law is nowadays depending on ALD. E.g. modern logic and memory devices rely on ALD processes. The use of the method has also gained more and more attention and new applications have been found outside the traditional field of use. Picosun ALD process is for example used in coating of medical devices, luxury watch parts, collector coins, machine parts, medicine, batteries, automotive components, pipes, bottles and even complete mobile phones. The traditional field of coating semiconductor wafers has expanded to MEMS, LEDs, compound semiconductor devices, photonics and to different sensor and detector fields. Picosun will present the examples how our customers can benefit from ALD technology. And if you think carefully, you will be able to find a part in your process which would benefit from atomic layer deposited films.

Biography
Dr. Christoph Hossbach obtained the Dr.-Ing. in Electrical Engineering in 2013. Since 2017 he is General Manager at Picosun Europe GmbH responsible for Germany, Austria and the Netherlands. Earlier he worked as a Senior Scientist at TU Dresden, IHM. His fields of expertise include Atomic and Molecular Layer Deposition, Chemical Vapor Deposition, metrology, as well as tool and component design. Dr. Hossbach is co-founder of ALD Lab Saxony and was involved in teaching and consulting.

Optical inspection key for functional test, validation and qualification for 3D sensing and lidar

Jeroen Sprankenis
Manager New Business Development
NTS Optel

Abstract
In the growing market of Photonics, optics, opto-mechatronics and opto-mechanics customers demand a high very high quality standard with 100% quality products delivered. This means that every single products needs to be tested and validated. NTS Optel is, for many customers, the partner of choice for the delivery of manual or automated optical measurement solutions for optical inspection, functional testing, validation and qualification. Markets we are involved are 3D sensing and lidar. 3D sensing and lidar can be achieved using a number of different technologies. The most used technologies in this fast growing market is stereoscopic imaging, structured Light Pattern and Time of Flight (ToF). Each of these technologies has its common use cases and individual strengths. From the beginning of the first commercial 3D sensing product “The Kinect gamecomputer” we were involved in the 3D sensing revolution. The industry picked up this game changing technology and created al kind of new applications. For example 3D sensing in mobile phones on robots. We are specialized in develop and building customized testers for optical testing of passive and active optical devices such as DOE’s, MLA,s, Wafer Level Optics (WLO) and VCSEL’s on component level but also sub- and complete packaged modules like IR laser projectors, structured light laser projectors, Time of Flight (ToF) sensors, LIDAR, illumination and projection modules. With 30 years of experiance we are the partner of choice of leading customers. With development and realisation of the systems under one roof we are a one stop shop organisation ready for your challanges. Let's work together and accelerate your business!

Biography
Background: Precision Mechanics, Mechatronics, opto-mechatronics and optical engineering. Sinds 2009 working at the NTS group in severall positions. Now responsible for the business development with NTS Optel. In the presentation we will zoom in at severall project examples, expertise, what we measure etc.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Form

Ekaterina Bocharova
department head
FORM

Abstract
Form is an independent, privately owned high-tech company founded in 1992 by two design engineers. Since 1996 Form has focused on automated test equipment (ATE) for microelectronics. The business specialises in R&D, design, manufacturing, service and support for our own Formula@ test system. Today, our own product range includes eight models of ATE, Formula@ for VLSI, memory hardware, semiconductors and relay equipment. There are nearly 500 Formula test systems in operation in total. Additionally, our product portfolio includes the TestBox@ Test Solution, designed for about 700 different electronic components used by our customers. We currently sell our products and services exclusively in the domestic market. Our customers include 94 enterprises in aerospace and defence, fabless design houses, foundries and test houses. To maintain Formula’s ATE operations and provide support for every region from the east to the west of Russia, we have a strong customer service department. This is one of the most important drivers for the innovative activities of our R&D and production departments, as well as our quality management system and CRM. The organisational structure of Form covers the entire life cycle of the Formula@ and TestBox@ Test Solution products. It involves company departments in the processes that arise from the concept of a new ATE product and includes design, manufacturing, metrology, sale, supply, delivery and operational support. There are nine departments in the company with 86 workers in total, including scientists, engineers and other trained specialists. As the leading ATE company in the Russian market, we aspire to become an international enterprise and take our products, knowledge, experience, quality and 20 years of ATE specialisation onto the global market.

Biography
Bocharova Ekaterina Alekseevna, 1984 year of birth in the company of FORMS works more than 7 years.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

The Art of Dispatching: Dealing with today’s Complexity in Manufacturing

Ricco Walter
Managing Director Systema Asia
Systema Systementwicklung Dipl.-Inf. Manfred Austen GmbH

Abstract
Multiple process steps and countless influencing factors create highly complex and often interdependent scenarios that are simply too complex for manual dispatching. With factories already running at maximum capacity, manufacturers look to take the friction out of their operations. In order to optimize equipment utilization while handling complex inventory and bottleneck feed and line balance issues, a tightly integrated dispatching software enables improved equipment loading and throughput. This presentation briefly introduces the new aspect of “process capabilities” and summarizes a real time dispatching solution based on event driven optimization.

Biography
• Managing director SYSTEMA Automation Solutions Malaysia • About 20 years in semiconductor industries • Strong understanding of manufacturing challenges and industry trends • Trusted advisor for Manufacturing Operations Management

Yield Improvement by Abrasion Reduction

Jorgen Lundgren
Senior Field Application Engineer
Entegris

Abstract
This presentation will describe different polymers and their technical attributes and functions in products used for bare die and wafer handling and processing applications. Polymers used in wafer handling and processing has to have a low level of organics which can potentially outgas (outgasing) and low level of anions, cations and metals. Some polymers are required to have ESD (electro static dissipative) properties where different forms of carbon is added to achieve the required ESD specification. Another critical physical attribute is abrasion resistance. Specific polymers have a high abrasion resistance to avoid particle generation. Temperature resistance is another important factor for many Semiconductor applications.

Biography
Senior Field Applications Engineer with electronic engineering degree from Sweden. Been working for Entegris for the last 21 years supporting the Semiconductor Industry in many different technical roles with focus on wafer and reticle contamination control during handling, processing and shipping of sensitive devices. Heading up projects and product qualification of 200mm and 300mm fabs in Europe. Contributor to Entegris/CEA–Leti collaboration FOUP polymer contamination/decontamination Project. Partner in the European TSV-Handy wafer handling Project. Active SEMI participant.

Extend the lifecycle of your industrial IT systems > 20 years

Robbert van Hagen
Business Development Manager
Detron Lifecycle Services

Abstract
IT components like servers, IPC systems and boards that are used in the semiconductor industry should be robust, secure and of high and constant quality. In addition, systems are used over a longer period of time and redesigning an alternative product results in additional cost and risks. During this presentation, Detron gives insight in its Lifecycle management strategy that helps customers like ASML, Philips and NTS choose/design-in the right IT components and extend the lifecycle of these products for more than 20 years.

Biography
Robbert van Hagen has a strong 20-year background in ICT managed services both in the IT and Telecom domain, acting as a sparring partner in the field of mobility, Internet of Things and Lifecycle Management.

Quality Assurance in High-End Semiconductor Production

Mathias Holzapfel
Business Development Manager Semiconductors
Precitec Optronik

Abstract
PRECITEC is worldwide the preferred supplier and partner of high-end standard and customized optical sensor solutions for quality control in production processes of semiconductor and consumer electronics. Using our non-contact and non-destructive technology, deviations in essential steps of the manufacturing process can be detected. Thus, we enable not only a significant increase in the quality of subsystems and finished goods, but also a reduction of time and cost in the assembly processes. PRECITEC equipment is currently used in application scenarios in the semiconductors such as: • In-process wafer thickness measurement (grinding, CMP, etc…) • Fast warpage inspection • Bumps and micro-bumps inspection • Laser dicing groove inspection • In process dicing laser autofocus • And many others

Biography
Mathias Holzapfel is a Business Development Manager at Precitec Optronik with a focus on the Semiconductor industry. His responsibility encompasses Precitec’s worldwide Semiconductor sales. Upon completing his engineering degree in "Photonics and Image Processing" Mathias began his career as a technical sales and applications engineer in the field of diode array spectroscopy. Later he moved on to industrial image processing were he further developed his software and application expertise. These skills and experiences lead him to his current position at Precitec Optronik.

Making Smart Manufacturing Work: The Stakeholder-Driven Requirements Development Process

Alan Weber
VP, New Product Innovations
Cimetrix Incorporated

Abstract
Background Given the level of automation and sheer scale of today’s leading semiconductor “Gigafab” manufacturing plants, the most important tools that production stakeholders have are the applications that provide data analysis, decision support, production scheduling, process monitoring and control, yield management, and a host of other capabilities necessary for running a profitable enterprise in a hyper-competitive industry. However, regardless of the overall system architecture or specific technologies used in these applications, they all depend on good data… and lots of it. And most of this data comes directly from the manufacturing equipment, which may number in the thousands for a high-volume factory. Presentation Focus The question now becomes “How DO the industry’s leading manufacturers ensure the equipment they buy will support their Smart Manufacturing objectives?” This presentation explains how the careabouts of key stakeholder groups are “translated” into specific equipment automation and communications interface requirements which can then be directly included in the equipment purchasing specifications. Through several interviews with leading manufacturers over the past 18 months, we discovered that the best way to accomplish this is through a focused, interactive questionnaire process. By asking very specific questions about people’s daily tasks, problem areas, expectations, success criteria, and other items of constant concern, we can take a generic automation purchase specification outline and generate a complete, factory-specific set of automation and communications interface purchase specifications in a matter of days. Results The process presented here has already been applied by several semiconductor manufacturers to clarify their Smart Manufacturing requirements. Taking the lessons of this approach to heart may be the most important next step you take in formulating you own company’s Smart Manufacturing implementation roadmap.

Biography
Alan Weber is currently the Vice President, New Product Innovations for Cimetrix Incorporated. Previously he served on the Board of Directors for eight years before joining the company as a full-time employee in 2011. Alan has been a part of the semiconductor and manufacturing automation industries for over 40 years. His expertise includes semiconductor design automation, equipment and factory control system architectures, Advanced Process Control (APC) and other key manufacturing applications, SEMI Information and Control standards (especially GEM300 and EDA/Interface A), and Smart Manufacturing Technology. He holds Bachelor’s and Master’s degrees in Electrical Engineering from Rice University.

Non-contact metal layer thickness and sheet resistance measurement on process wafers

Marcus Klein
Managing Director
SURAGUS GmbH

Abstract
Thickness measurement is a crucial yet challenging endeavor in many industries. Processes such as sputtering, plating, polishing or selective etching among others benefit from instant metal thickness measurement. To date, indirect measurements on test wafers often lead to uncertainties resulting from a selective measurement of samples. They also cause additional costs for processing test wafers and consuming tool time. Furthermore, high-resolution measurement near edges enables integrity assessment of near edge areas. These near edge areas receive broader attention these days as they still provide significant potential to increase the yield and decrease costs per chip. Novel tool integrable measurement technology is required to adapt to these challenges and to assure accurate, non-contact and reliable measurements of the layer thickness even at high wafer handling speed. Therefore, non-contact sensors for intool monitoring and detailed offline imaging have been developed based on eddy current technology, a well-known method for layer characterization, and have been adapted to the challenges of in process and edge area measurements. A sophisticated evaluation enables a precise interpretation of the obtained data, including near edge areas. It is shown that the received results are equivalent to destructive thickness and contact 4PP measurements. Eddy Current, though, is a much faster method. In contrast to other approaches, this non-contact method erases impacts of insufficient homogenous contact qualities and therefore leads to a higher repeatability. Examples will be given where the eddy current measuring method has been applied on top of structured multi-layer systems or obtaining precise thickness measurement near edges. This talk is dedicated to initiate a discussion on the shift from measurement on test wafer to measurement on process wafers.

Biography
Dipl.-Wi.-Ing. Marcus Klein has been managing director of SURAGUS GmbH since 2010. He got his master degree in Business and Engineering from University of Technology Dresden focusing on microelectronics and electronic packaging. Past working experiences include Siemens Pte Singapore, Wacker Chemie, Advanced Mask Technology Center and Fraunhofer Institute for non-destructive testing Dresden. He is member in several research projects and expert for eddy-current based measuring solutions for thin films, coated glass, carbon fiber and graphene.

Providing Key Process Enabling Vacuum Capability Through Integrated Sub-Fab Data Management

Andrew Irvine
EMEA Application Manager
Edwards

Abstract
Sub-fab and fab Data management is becoming more and more critical as the semiconductor industry is faced with the conflicting requirements of accelerating innovation, improving efficiencies and reducing costs. New materials and increasingly complicated manufacturing processes are introduced at every node. This comes at a price, with innovation harder to achieve and costs higher to improve overall fab optimization and increase the pace of innovation. The Industry is focusing on all the factors influencing Time-To-Market at the lowest possible costs. A concurrent and parallel development in the semiconductor industry is the drive toward implementing the tenets, or principles and concepts of Industry 4.0 and Smart Manufacturing. These principles include integrating supply chains, creating virtual factories through the use of cyber-physical systems and digital twins, using Big Data infrastructure and technology to provide advanced analytics on tool, process, yield and facility data, and creating and integrating a supporting Knowledge Network of Subject Matter Expertise (SME). Despite the very sophisticated nature of the semiconductor manufacturing equipment and process, there are many unconnected data islands inside a typical HVM fab. One major example of this is the sub-fab as a whole, which is typically not connected to fab monitoring and control software. It houses the critical subsystems that provide process-critical vacuum to the fab. A typical HVM sub-fab contains many thousands of pumps, abatement units and ancillary equipment. Vacuum quality, i.e. the right level and content, is one of most important process parameters. It can affect wafer quality and overall fab costs through its effect on yield or through losses incurred as a result of unplanned vacuum failures during wafer processing. Sub-Fab equipment monitoring and contextualizing sub-fab data with other available process and equipment data is therefore receiving increasing interest.

Biography
Andrew Irvine is the EMEA Application Manager at Edwards, based in Dresden Germany. Having studied Electronic Engineering in Scotland and starting his Semiconductor career at National Semiconductor in Greenock he moved on to Siemens Microelectronics in Newcastle working in Equipment Engineering. Andrew then joined Infineon and held various roles before joining Qimonda in the technology transfer team where he helped to transfer and ramp the memory products. Andrew has been with Edwards since 2010.

Siconnex BATCHSPRAY Technology: Case studies for cost- and space improvements

Fabio Wörndl
Global Director Sales & Marketing
Siconnex customized solutions GmbH

Abstract
Siconnex BATCHSPRAY technology is used, if a high throughput on a small footprint, as well as a low chemical consumption matters. In a case study, that was done together with a European customer, the benefits of moving from a wetbench or single wafer track to a BATCHSPRAY equipment in terms of money and cost savings are shown.

Biography
Fabio Wörndl started at Siconnex in 2011 as Service Engineer. After a technical sales support role for the US market, he became Account Manager in 2016. Since July 2017, Fabio is Global Director of Sales & Marketing at Siconnex and manages the sales structure around the globe. Fabio has a degree in electronics and a diploma in industrial engineering and economics.

Helping OEMs scale to big data volumes

Mike Barrett
Director, Global OEM Sales
PEER Group

Abstract
The market is demanding faster throughput, smaller feature sizes, and higher quality. The fuel that drives these improvements is data – from more sensors, faster sampling, and greater integration of different sources. Collecting larger data volumes allows for deeper insight into critical process and production metrics, as well as the possibility of using advanced analytics and machine learning to speed defect analysis and reduce repair times. However, this explosion of big data can overwhelm traditional data sharing and storage mechanisms. Join us as we discuss cutting edge approaches to managing your data including new storage solutions, best practices for where your data should live, and methods for sharing that data with your analysis systems and global experts.

Biography
Mike Barrett is the Director of Global OEM Sales at The PEER Group Inc., the largest supplier of factory automation software for semiconductor OEMs and factories. He and his global team ensure PEER Group provides software solutions that meet every OEM customer’s unique needs. Mike came to PEER Group with a strong background in software automation, having worked in a variety of engineering and software development roles. He holds an Honours Bachelor of Applied Science in Computer Engineering from the University of Waterloo and is a licensed professional engineer in the province of Ontario.

Liquid system component cleanliness testing at 20 nanometres

David Green
Applications Engineer
Particle Measuring Systems

Abstract
Fluid handling components such as valves, pumps, filters and degassing modules are common sources of contamination in high purity liquid distribution systems. This contamination can eventually reach the processing environment either in the form of solid particulates or, through chemical reactions, as a form of ionic contamination. Due to the significant cost associated with yield impacts, it is of vital importance to ensure that fluid handling components are sufficiently clean before they are used in the production environment. A simple testing program has been established that uses an optical particle counter to characterize the initial and long-term cleanliness of critical fluid handling components for particle sizes down to 20 nanometres. The testing program allows the relative cleanliness of components constructed out of different materials and from different manufacturers to be evaluated. This can save both time and money in the production environment by ensuring that the best components are selected for the designated task.

Biography
David Green graduated from University College London in 2002 with a bachelors degree in Physics. David has spent most of his career designing, building and testing novel particle analysis equipment. Since 2013 David has represented Particle Measuring Systems across the EMEA region as an Application Engineer.

Solutions for Process Matching and Monitory Using Wafer Based Metrology

Thierry Dupraz
SensArray European Business and Application Manager
KLA-Tencor

Abstract
In today’s manufacturing environments there are increasing needs for in-situ monitoring of process tools’ environments. Wafer process equipment manufacturers, IC manufacturers and reticle manufacturers use in-situ wafer-based sensor data to visualize, diagnose and control process conditions. Whether you are developing a new process equipment, ramping a new 300mm manufacturing plant, implementing a new technology node in a 200mm line or increasing manufacturing productivity and efficiency, Wafer and Mask Based Metrology will provide unique feedback on your process. Tool qualification, chamber matching, process monitoring and troubleshooting are some of the typical use cases that are enabled by KLA-Tencor’s comprehensive portfolio of SensArray® products. With wired and wireless sensor wafers and reticles, automation solutions and data analysis systems, SensArray® products provide comprehensive information for a wide range of wafer and reticle processes.

Biography
Thierry Dupraz KLA-Tencor SensArray European Business & Application Manager Thierry Dupraz has been working at KLA-Tencor since 1991, has filled technical, applications and management roles in KLA-Tencor’s Defectivity & Metrology before joining the SensArray division in 2009 to cover and develop the European region business.

How New Macro Defect Inspection Technologies Are Becoming Essential to Increasing Yield and Reducing Wafer Fab’s Costs

Mike LaTorraca
Chief Marketing Officer
Microtronic, Inc.

Abstract
As semiconductors and intelligent devices are adopted into all areas of modern society it’s critical that the inspection processes in manufacturing fabs keep pace. Traditionally, semiconductor wafer manufacturers rely on sampling - at both the die and wafer level. Although sampling speeds up the inspection process, there is obvious risk of missing defective wafers due to sampling. While fabs will probably always rely on sampling to some extent, there are now new macro defect inspection applications that can be added to the wafer production environment to deliver dramatic improvements in many areas. These areas include: recipe-less defect detection; reduction of manual inspection costs; root cause analysis; shipping die with latent defects, excursion control, customer returns, and comprehensive automotive zero-defect strategy enablement. This presentation focuses on why automated macro defect inspection is becoming essential to fabs as they are challenged to improve their quality in the already highly demanding semiconductor manufacturing environment. Exploding markets such as automotive and mobile devices make it necessary for fabs to provide better quality at lower costs. For example, detection of macro defects in-line, prior to final inspection, allows manufacturers to take corrective action at an earlier, less expensive point in time to address any defective die and to prevent die with a high probability of carrying reliability defects, from entering customer products – including automotive devices. Additionally, automated macro defect inspection is ultra-fast and can inspect 3,000 wpd while delivering an actual high-resolution full-wafer color image. The macro defect inspection approach creates a complete, trackable “waferbase” with defect lists and defect maps along with each wafer’s OCR number, image and slot position to help identify production problems fast and take corrective action quicker.

Biography
Mike LaTorraca is the Chief Marketing Officer of Microtronic, Inc., the US-based manufacturer of EagleView - the semiconductor industry's most yield enhancing macro defect inspection system and winner of the 2017 Semicon West Best of West new product of the year award.

Park Systems Inline Automate AFM for Semiconductor Application

Victor Bergmann
Application & Service Manager
Park Systems Europe Gmbh

Abstract
The Park System’s NX-Wafer has been widely accepted by the semiconductor industrial to support inline metrology applications. Park System’s AFM has the common core platform for both research and industrial systems which allows fast & cost-effective delivery of new solutions. Its state-of-the-art hardware design with fully decoupled X/Y and Z flexure scanners allows the 100um x 100um, artifact-free, high resolution, and true 3D profiling and imaging, and its industry leading system noise spec of < 1A enables high resolution roughness measurement of 200/300mm wafers in automated mode. In addition, Park System’s true “non-contact” mode drives significant tip cost reduction and enables exceptional measurement repeatability performance. Semiconductor manufactures and equipment suppliers are adapting Park NX-Wafer’s unique capabilities to monitor trench depth, TSV, surface roughness, CMP dishing and erosion process. The NX-Wafer is the bench mark automate AFM system for Semiconductor industrial. It is playing more and more critical role to meet the inline advance metrology requirement.

Biography
Diploma in Physics, Univ. of Mainz (2013) Ph.D. in Physics, Double Degree Univ. of Mainz/Seoul National Univ. Max-Planck-Institute for Polymer Research (2017) Title of Ph.D. thesis: “Inside perovskite solar cells; charges at interfaces” Research visits to Seoul National University, Korea in 2014, 2015 and 2016 (7 months in total) Since 2017 works as Application Manager at Park Systems Europe.

Enhanced Fab productivity through powerful material flow automation

Burkhard Stegemann
Sales Director
Fabmatics GmbH

Abstract
The “Internet of Things” and growing digitalization in all areas of life will continue to increase the demand for ASICs, analog ICs, high-performance components and MEMS, which are mainly manufactured in older 200mm factories. Fab automation is one of the greatest potentials for these factories to effectively master the increased demand, increasing efficiency, quality assurance and flexibility at the same time. In particular, material flow automation, which is often the missing link between existing equipment in different production areas, can help to increase productivity in an elementary way. This presentation will show how a smart integration and combination of automated systems for material handling, transport and storage as well as lot identification enable a higher utilization of process equipment, a reduced cycle time and a stable fab flow factor to get the most out of existing factories.

Biography
Born in 1969, Burkhard Stegemann studied Physical Technics at the FH Aachen and completed his final year at Coventry University. In 1996 he joined Carl Zeiss in Jena in the department of microscopic wafer inspection. After two years in R&D/ application, he changed to product and project management. As part of the acquisition of the Zeiss business field “optical wafer inspection” by HSEB Dresden GmbH in 2004, Burkhard Stegemann joined HSEB. His responsibilities were sales and service. Since May 2014 Burkhard Stegemann is sales director of HAP GmbH Dresden and due to the merger of HAP and Roth & Rau - Ortner, since September 2016 sales director of Fabmatics GmbH.

Functional Semiconductor process tape ICROS ™ tape

Akimitsu Morimoto
Director
Mitsui Chemicals Tocello, Inc

Abstract
Mitsui Chemicals produces and supplies specialty chemicals and high performance polymers worldwide. We offer a broad range of Chemicals & Intermediates, Chemical Solvents, Specialty Polymers and Engineering Plastics, Functional Materials, Electronic Materials, and Adhesive Resins. Regarding semiconductor manufacturing, Mitsui Chemicals Tocello provides a wide array of product lines featuring high-function adhesive tape such as Non-UV and UV surface protective tape used in silicon wafer back-grinding process, named ICROS ™ TAPE. Today, ICROS ™ Tape is not only used for BG process but also for many other processes in semiconductor manufacturing flow, such as dicing, packaging process due to high functional technologies like heat resistant, chemical resistant property. In his speech, Dr. Akimitsu Morimoto will present specific use case examples to outline how our tape technology helps to overcome the challenges related to precision process in semiconductor manufacturing and how manufacturers can benefit from these solutions.

Biography
Akimitsu Morimoto received his Ph.D in Chemistry from Tokyo Metropolitan University in 2003. Dr. Morimoto has worked for Mitsui Chemicals since 2003 and held various positions related to R&D, process engineering and applications support. Currently, he is working as Director of R&D Group, Customer Support responsible for the company’s global technical customer support organization.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Optical Wire Loop Height and Bond Inspection

Mathias Holzapfel
Business Development Manager Semiconductors
Precitec Optronik

Abstract
3D packaging technology requires loop height and wire crossings to be measured precisely. Precitec´s Optical metrology delivers 2D and 3D images of bonding wires with sub µm resolution to show if crossing wires are connected. Topographic measurements of the bonding enable the analyses of bonding quality. Both wire loop height and bonding quality play an important role in the correct functioning of semiconductors. For this purpose 2D and 3D measurement with CHRocodile sensors deliver very accurate and rapid quality control thanks to more than a million 3D measuring points per second.

Biography
Mathias Holzapfel is a Business Development Manager at Precitec Optronik with a focus on the Semiconductor industry. His responsibility encompasses Precitec’s worldwide Semiconductor sales. Upon completing his engineering degree in "Photonics and Image Processing" Mathias began his career as a technical sales and applications engineer in the field of diode array spectroscopy. Later he moved on to industrial image processing were he further developed his software and application expertise. These skills and experiences lead him to his current position at Precitec Optronik.

Optimized Cu plating solution for next generation packaging

Markus Hörburger
Global Product Manager Semiconductor Advanced Packaging
Atotech Deutschland GmbH

Abstract
Over the past years smartphones have become central to almost every aspect of our lives, which have increased the demand for high speed and reliable data connections. In order to handle these growing data capacity, the next generation smartphones and those equipped with 5G in particular will require even higher functionality and higher speed at shrinking component dimensions. To cover this evolution, new technology solution, such as next generation RF filters are needed. The presentation focus on a new requirement of two types of RF filters which is multilayer RDL with blind microvias and explain the challenges of Cu plating for this packaging technology. Atotech has developed an new electrolytic Cu process that exactly addresses these challenges and offers a suitable solution for potential 5G applications. .

Biography
Markus Hörburger received his diploma degree of business and chemistry from University of Ulm. He joined Atotech in 2014 and is in charge of the Semiconductor and Functional Electronic Coatings business as Global Product Manager. In his function he is responsible for definition of R&D project’s, integration / introduction and marketing related activities for Advanced Packaging, such as ECD (Pillar / RDL) and electroless (ENEPIG) processes respectively Functional Electronics Coating, such as products for Leadframe and Connector industry. Before his actual position he worked at BASF as a Strategic Project Manager to bulit up an Innovation Network.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Plasma Dicing of Si Wafers with Panasonic APX300

James Weber
Business Development Manager
Panasonic Industry Europe GmbH

Abstract
Recently many issues came up when using conventional dicing methods. Such conventional methods are mechanical sawing (blade dicing) or laser dicing. Relevant applications are thin wafers, brittle materials and wafer singulation for very small devices or LED or discrete devices. Plasma dicing is a recommended method to overcome many challenges of wafer separation. Damage free, water free, particle free and high throughput dicing can be realized by using plasma trench etch (dry etch) technology for dicing. Several technical and equipment aspects will be presented and discussed accordingly. Plasma dicing technology can provide solutions for high rate dicing, high quality chip shape without any chipping and high chip strength. The throughput of a plasma chamber depends mainly on wafer thickness and is quite independent from wafer size or chip size. By using plasma for dicing we can achieve more throughput than blade dicing process. Such cannot be achieved by any line-by-line dicing method as long as small chips are required. Significant cost savings can be expected. Typical topics on Plasma Dicing process are explained.

Biography
James Weber, born in Australia, living in Munich, Germany since 2009. Studied Mechanical Engineering at the University of Adelaide, Australia. Working as Business Development Manager for Panasonic Microelectronics in Munich, responsible for sales of Plasma Dicing, Dry Etching, Plasma Cleaning and high accuracy Flip-chip Bonding equipment.

Solutions for processing SiC wafers and slicing SiC ingots with high speed and cost reduction

Gerald Klug
General Sales Manager
DISCO HI-TEC EUROPE

Abstract
DISCO Corporation is a leading manufacturer for equipment and tools for wafer thinning and dicing. Silicon carbide has become an alternative to Silicon when it comes to manufacturing high-power devices. However, singulating SiC wafers is challenging due to its hardness. The main challenge is maintaining high speed processing and best die quality at the same time. DISCO proposes suitable solutions for SiC processing with significant time and cost reduction and best quality. We introduce ultrasonic dicing and stealth laser for singulation and KABRA for ingot slicing. Processing SiC with standard dicing blade at a high speed causes chipping and cracks. Ultrasonic-wave dicing is a technology capable of reducing the processing load by applying ultrasonic vibrations in the blade radial direction. Lower processing load in ultrasonic-wave dicing enables the selection of a blade with smaller grit size improving the processing quality. SD is a technology that forms a modified layer by focusing a laser beam below the surface of a workpiece and then separating the workpiece into chips by breaking. SD is capable of processing SiC at a speed higher than that of ultrasonic-wave dicing, but both technologies prevent burr of metal layers and offer high die strength. So far, producing SiC wafers from an SiC ingot was a big cost issue, which hampered the development of SiC power devices. Slicing by wire saw requires a lot of time and is not cost-efficient. With KABRA, DISCO is introducing the new generation of SiC wafer production with high-speed ingot slicing. The KABRA slicing method forms a flat light-absorbing separation layer at a specific depth by irradiating a continuous, vertical laser from the upper surface of the SiC ingot. . By KABRA slicing, processing time is cut significantly while increasing the number of wafers per ingot. All of the above mentioned processes are offered by the Dicing-Grinding Service at DISCO HI-TEC EUROPE with its facilities close to Munich airport.

Biography
Gerald Klug studied business engineering at the University of Siegen and graduated in 1998 as Dipl.-Wirt.-Ing., completing his thesis at BMW in Munich. He started his career as a designer of coil processing lines for nearly 3 years at a German machine manufacturing company, Heinrich Georg GmbH. At the end of 2000, he joined DISCO as a Sales Engineer for the area of Scandinavia. Meanwhile he has been almost 18 years at DISCO, nowadays operating as General Sales Manager for the whole of Europe.

UBM Metallization Technology for advanced semiconductor devices

Robert Preisser
Director Process Technology
AP&S International GmbH

Abstract
As semiconductor device geometries further shrink more devices migrate from wire bonding to flip chip technologies to overcome the technical limitations of the bonding technologies such as electrical resistance or the geometrical dimensions. An under-bump metallization (UBM) is used as an alternative for the different options of device metallization such as Al-, Al-alloys and Cu to act as electrical contact, adhesion promoter and protection layer between this chip metallization and the following solder bump technology. However the UBM deposition incl. pre- and post- treatment of the incoming wafers are critical to the interface stability and to reliability performance of the complete device. Some of this representative aspects has been evaluated, analyzed and assessed under different processing and/or test conditions using different material science and electrical test conditions.

Biography
CV Robert Preisser Director Process Technology AP&S International, Donaueschingen, Germany • Started my professional career at IBM semiconductor development facility in Sindelfingen, Germany as process engineer with a chemical engineering background in 1974. Held several technical lead positions in various fields of SC technologies, including 3 technical R&D assignments (total of 5 years) to the IBM facilities in Burlington and Fishkill. • Joint 1994 the semiconductor high purity chemistry division of Merck, Darmstadt, Germany as senior manager. Responsible for the development, build- and qualification- of high purity chemical supply units including the global high purity chemical service division • 2012 joint Atotech, Berlin, Germany as VP- for the new established semiconductor metallization division. Founded and led for 4 years a new SC- chemistry research approach at CNSE in Albany, NY, USA. The approach included a R&D cooperation (2012) with Case Western Research University in Cleveland, OH for electrochemical research. Retired from Atotech in 2014. • From 2014 until today part time adjunct professor at Case Western Research University in Cleveland and part time director for SC-processing technology at AP&S in Donaueschingen, Germany. >100 publications in Semiconductor processing, SC- and MEMS- material development and application engineering. Patents in SC-metallization technologies

SystematIC: Innovation in Integration

Richard Visee
CEO
SystematIC Design B.V.

Abstract
SystematIC designs and develops advanced custom IC’s for sensor and power applications in the analog mixed signal domain. In SystematIC’s products optical and magnetic circuits are often designed for a high voltage environment with low power requirements to the IC’s. Trends we observe in the market are towards more integrated functionality, internal diagnosis and testability, minimum external component count at the lowest possible cost. Systematic circuit design techniques are applied in modern mixed signal CMOS IC processes for the product developments to excel in technical performance. Design for testability on waferprobe and final test are important requirements in the chip development. Lead frame customization leads to custom products in a standard assembly production lines. Examples of innovative products are presented in HV, optical and magnetic domain, as innovation in integration is advanced technology in actual products.

Biography
Richard Visée received his Electrical Engineering degree (MSc) at the Electronics department of the Technical University Delft. He proceeded to develop his skills in electronic design at the same department in a two-year in-depth study on the design of low-noise microphone amplifiers. After working as an analog design Engineer for three years, with a strong focus on RF circuit design, he joined SystematIC as a co-owner. Besides working on many various IC design projects in sensor readout and power conversion, he developed SystematIC’s Japanese business relations and now represents the company in projects for Japanese customers. He is also involved in collaborations with European research institutes and guides electronics development for space-related research.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

MEMS and Semiconductor Applications for Wafers from Glass and Quarz

Christian Seibert
Account Manager, Sales
Plan Optik AG

Abstract
Microelectromechanical systems (MEMS) and Sensors provide the magic that makes today’s devices from our everyday life smart. MEMS consist of tiny mechanical and electrical devices such as membranes, mirrors and valves, as well as sensors, actuators and integrated circuits. Without MEMS or sensors, we would not have smartphones, smart homes and wearable smart watches, as well as a huge range of industrial and medical devices that require the functionality provided by MEMS and sensors. This presentation will show different possibilities of using glass in MEMS and Semiconductor Industry, for example as glass carrier wafers, that enable handling and processing of ultra-thin semiconductor wafers that are needed to manufacture chips for smartphones and electronics. Furthermore the use of glass wafers and dies in applications such as automotive lighting and sensing using wafer level packaging (WLP) technology will be shown as well as sneak peak into glass microfluidics and special applications for Silicon/glass compound wafers.

Biography
Christian Seibert is Sales Account Manager for Plan Optik AG, leading manufacturer for high quality wafers from glass, quartz and glass-Silicon. At Plan Optik AG Christian is responsible for customers in US and Canada, helping them to find best wafer solutions and exceed requirements for their MEMS applications and Semiconductor processes. Additionally he is working on product development for Plan Optiks’ stock products and OTS (off the shelf) wafers as well as technical documentation. Previous to this position Christian graduated as M. Eng. in Technical Sales from a dual study in cooperation between THM (Technische Hochschule Mittelhessen) and Plan Optik AG, working in Sales Department on establishing analysis and controlling of Sales. Prior to that Christian finished his first dual study as B. Eng in Electrical Engineering in cooperation between THM and LTI Motion GmbH, provider of high dynamic and precision automation and drive solutions, working on various projects in departments such as application engineering, project- and product management and R&D.

Advances in doped AlN deposition techniques for next generation Piezo-MEMS

Nick Knight
PVD Product Manager
SPTS Technologies Ltd

Abstract
In BAW and Piezo-MEMS devices based on released membrane structures, AlN film stress state is of utmost importance and to maximise yield, manufacturers look to minimise stress variation across the wafer. When Sc is added to the film the problem becomes more demanding, as stress range tends to worsen with increased Sc content. Previous methods to control stress reach a limit of capability, impacting yield or compromising device design and performance. The problem is compounded when variations in Sc content exist in the film centre to edge, either as a result of chamber geometry, or sputter target homogeneity, impacting resonator film properties, such as coupling coefficient. In addition to stress control, a related issue presents itself when Sc is added to an AlN film. During deposition, crystallites can form within the AlScN. Effectively defects in the film, the crystallite presence degrades resonator properties - dead volume amongst the piezoelectric bulk. Formation is abundant in areas of tensile stress, hence the relation to stress control. As with stress profile, crystallite density increases with Sc content so management of crystallite formation becomes another requirement for the PVD process, to ensure coupling coefficient yields are maximised. In this paper we present a novel solution providing symmetrical control and adjustment of stress for AlN films with different Sc content, demonstrating excellent WIW stress performance, the ability to locally tune stress to compensate for centre to edge variations in Sc, and approaches to prevent formation of crystallite defects, maximising yield

Biography
Nick Knight has been a PVD Product Manager for SPTS Technologies since 2010. He has over 20 years experience in the semiconductor capital equipment industry. He joined Electrotech in 1995 as an Equipment Engineer working with PVD products installed in Asia, Europe and US. In 2001, he joined Surface Technology Systems (STS) in the role of Regional Service Manager for Asia, and in 2003 joined their Marketing team as an Etch Product Marketing Manager. In 2010, following the formation of SPTS Technologies, through the merger of STS and Aviza Technology, Mr. Knight returned to the PVD product lines as a Product Manager. He graduated with B.S. in Electronics from Southampton University, UK.

Solmates Large Scale PLD for 5G applications

Matthijn Dekkers
cto
Solmates

Abstract
It is generally recognized that Pulsed Laser Deposition (PLD) is a very flexible and versatile technique allowing fast optimization of new and complex material thin films. The unique features of PLD allow for the integration of “Beyond CMOS” materials and the development of new device concepts. Among these are Pb(Zr,Ti)O3, PMN-PT, BaTiO3, LiNbO3 and other materials of interest for applications in piezoelectric MEMS and MOEMS devices. In this work, we demonstrate the wafer-level integration of PZT layers in the TriPleX waveguide geometry using Solmates’ PLD platform. The refractive index of the waveguiding materials is controlled by the stress-optic effect induced by actuation of the PZT. With this the first stress-optic phase actuators in a silicon nitride-based waveguide platform (TriPleX) in the telecommunication C-band are demonstrated. The efficiency of the actuator is optimized by, amongst others, controlling the PZT deposition parameters. Using a Mach-Zehnder interferometer, a half-wave voltage, Vπ, at 14.5 V at a wavelength of 1550 nm using a modulator with a total length of 14.8 mm was measured. The static power consumption of the stress-optic actuator is in the μW-region as it is only determined by small leakage currents (< 0.1 μA), while the dynamic power consumption at a rise time of 1 ms (1 kHz excitation) is less than 1 mW per modulator. These specifications make PZT actuated stress-optic actuator an excellent choice for next generation optical beam forming networks with a large number of actuators in silicon photonics in general and in the TriPleX platform in particular. The work was performed in the scope of the HAMLET and PIX4LIFE project that have received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement No 688750 and No 68851

Biography
Co-founder of Solmates (2007). Holds a PhD in Applied Physics and has a deep understanding of pulsed laser deposition and related processes. He manages the R&D department within Solmates and holds more than 10 patent applications related to PLD processing. He steer his team towards effective process development in cooperation with companies and institutes.

Activities in Plasma Process Technology at SENTECH Instruments

Frank Schmidt
Group Leader Plasma Technology
SENTECH Instruments GmbH

Abstract
SENTECH Instruments develops, manufactures and sells worldwide advanced quality instrumentation for plasma process technology and thin film measurement. The presentation will give an overview about the product portfolio regarding the available thin film technology tools like Dry-Etching, Chemical Vapour Deposition and Atomic Layer Deposition by using plasma enhancement. Several application examples will be shown to emphasize the capability of using SENTECH tools to reach the costumers. Different approaches like cluster tool configurations, hybrid plasma systems and the combination of plasma process technology with thin film metrology will be presented.

Biography
Name: Dr. Frank Schmidt Current position: Group Leader Plasma Technology at SENTECH Instruments GmbH in Berlin/Germany Former positions: Project Manager at AVANCIS, Project Manager at SOLAR Synergy, Project Manager and Process Engineer at SCHOTT Solar; Process Engineer at JENOPTIK L.O.S.; Process Engineer at SCHOTT Lithotec Education: PhD in Physics at Friedrich-Schiller-University Jena, Institute for Solid State Physics, Low Temperature Physics Group

Meyer Burger: technology competence from Semiconductor wafering to back end processes

Annegret Lewak
Head of Sales MNS
Meyer Burger (Germany)

Abstract
Meyer Burger is a technology group that is present in the semiconductor world for decades. The main expertise is on one hand side at the upstream section: slicing wafers with diamond wire technology – and at printing technologies applied during back end processes on the other hand. The audience will be guided through the main aspects of high tech approach to generate a perfect wafer as a mandatory base line for advanced processes in high – end semiconductor. This requires not only solid engineering of very productive equipment, bur also sound understanding of process and materials. In the second part of the speech we will give a short introduction about the potential of Inkjet technologies to miniaturize features on wafers but also to use this technology to revolutionize solder mask application for PCBs. About Meyer Burger Meyer Burger is a leading global technology company specialising on innovative systems and processes for manufacturing of electronics. The company’s focus is on photovoltaics (solar industry) while its competencies and technologies also cover important areas of the PCB, semiconductor and the optoelectronic industries as well as other selected high-end markets based on electronics materials. The company’s comprehensive product portfolio is complemented by a worldwide service network with spare parts, consumables, process know-how, customer support, after-sales services, training and other services. Meyer Burger is represented in Europe, Asia and North America in the respective key markets and has subsidiaries and own service centres in China, Germany, India, Japan, Korea, Malaysia, the Netherlands, Switzerland, Singapore, Taiwan and the USA.

Biography
Joining the Meyer Burger Group in 2012, Annegret Lewak has been serving in various commercial roles. Positions in Sales and Product management have been in her responsibility on the way to become today Head of Sales in the Meyer Burger Business section of Micro - Nano Systems. Ms. Lewaks holds a Bachelor in Political Science and an international MBA.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Innovations in photoresists and photopolymers for 2D / 3D micro and nano fabrication

Anja Voigt
Business Unit Manager Photoresists
micro resist technology GmbH

Abstract
Different methods for the manufacture of high resolution 2D and 3D features require a wide range of material solutions based on innovative photoresists and photopolymers. As a commercial resist supplier, micro resist technology aims at providing such solutions tailored for diverse lithography processes, comprising both materials and technology support. The following highlights will be presented: E-beam lithography is a versatile patterning method for the generation of high resolution nano-patterns. Combining stepwise greyscale exposure and pattern reflow with a positive tone resist results in greyscale patterns of small dimensions. Greyscale UV lithography of up to 100 micron thick resist films, either by direct laser writing or by conventional mask aligner exposure and a greyscale mask, can generate very deep greyscale micro-patterns. Both very thick films, and considerably smaller pattern features including sharp tips have been successfully fabricated using this technique. Laser interference lithography is another method which allows the manufacture of nanoscale and periodic patterns even on very large substrates. Whereas two photon absorption (2PA) allows the generation of real 3D patterns at micro and nanoscale. The development of photoresist and photopolymer materials tailored to meet the requirements of the specific technologies will be presented.

Biography
Anja Voigt received her diploma in 1993 and her PhD in 1998 in Photochemisty at the Humboldt-Universität zu Berlin. Since 1993 she has been a scientific co-worker with micro resist technology GmbH and responsible for R&D and production of negative photoresists. She has been the product manager for negative photoresists since 2005, and the business unit manager for photo resists at micro resist technology GmbH since 2012.

Jim Jackman
Vice President, Finance & Administration
SEMI

Biography
As Vice President of Finance and Administration, Jim Jackman is responsible for SEMI’s accounting, HR, and IT functions worldwide. He has more than 20 years of progressively responsible experience in public accounting, financial reporting, accounting systems implementation, human resources, and financial planning and analysis. Prior to joining SEMI, he acquired vast experience at leading regional and global firms, including Gallina LLP, Octel Communications, Lucent Technologies, ATMI, and RoseRyan. Jackman holds a BBA from California State University, Hayward, and has been a CPA in California since 1996.

Kokusai Electric Corporation new products offering for 2018

Yoshio Kitahara
New Products offereing as Kokusai Electric
Kokusai Semiconductor Europe GmbH

Abstract
1)Increasing Risk on Obsolete Parts: customers are suffering the risk of manufacturing discontinuity attributed to parts supply obsoleting. So they must realize some solution to secure their uninterrupted chip supply for Automotive, preferably by upgrading their existing aged installed bases but less likely because already some parts obsoleted. 2)Statistical data set requested to submit and store by Automotive OEM: Since Automotive OEMs must secure reliability for Autonomous & Connected car, so they request our customer to provide statistical data of process parametric but most of aged equipment can’t do parametric data collection, but Kokusai can. 3)Limited footprint/height restriction allowed to use: To minimize CAPEX, customer try to replace current aged equipment with renovated models, but SPE OEMs must meet given space/height restriction as it is. As most of renovated tools were designed based on 300mm platform, so likely to need more space and higher ceiling height, besides Kokusai. 4)Latest process technology required for IoT Module chipsets: latest technical paper related to IoT based chips need both older process like POCl3 and modern process like Al2O3 or relevant material. As an example, MEMS Si Oscillator has > 170C thermal budget but Crystal Oscillator not. MEMS Oscillator may require > 5E20 ions/cm3 high P dosed Si layer then now reconsidering use of POCl3 to satisfy such device spec. Also, some MEMS actuator or interlayer Hi-k MIM caps may require Al2O3 and PZT layer or relevant. Since customer need to suppress leak current to be < 1E-8A/cm2 while achieving >10fF/um2 capacitance which likely self-contradictory, so sophisticated tuning and right choice of oxidizer is mandatory as Kokusai did.

Biography
Yoshio Joe Kitahara, graduated from St. Paul's Univ. studying on Statics as Mathematics and joined TEL in 1983 and spent 8 years long both at Japan and Bay Area/SFO primarily doing new product research in Silicon Valley. As a next, joined AMAT starting from Product Marketing job for Endura PVD and went through various products in charge(CVD/Etch/CMP/Inspection & Metrology/Mask production equipment). Since 2011, joined MEMC as Sales GM for Japan, also from 2011, joined Kokusai Electric (former Hitachi Kokusai Electric) as GM of Product Development Planning and Marketing. Since 2017 he became President & Managing Director of Kokusai Semiconductor Europe to date.