The Impact on Process Materials Requirements for 3D Transistors and Vertical NAND
Lita Shon-Roy
President / CEO
Techcet Group, a Techcet CA LLC Company
Abstract
Current 3-dimensional structures present new challenges relating to uniformity, lithographic resolution, high aspect ratio etching and fills, and planarization while addressing continuing need to stay at or below current technology node scaling. For example, printing of structures for logic or memory devices below 20nm, without EUV, requires improved photolithography and hardmask materials used for multi-patterning processes. 3D transistors used in logic devices now demand better ion implant more isotropic doping processes, driving end users to look at alternatives to traditional ion implantation. Gap fill will continue to be a challenge as structures become more 3-dimensional and shrink. Better fill properties and perhaps lower K dielectrics from front end materials will be required. High K Gate dielectric precursors will continue to evolve, as higher mobility materials are needed, while cleaning requirements will become even more stringent, seeking ways of ensuring no net addition of impurities that may shift sensitive threshold voltages.
For Vertical NAND, while less complex than logic devices, have transistor structures that will continue to push the limits of lithography with the extended use of multi-patterning, using even lower temperature dielectrics, required for numerous thin, conformal, and defect free material stacks. These devices will have similar challenging issues to logic devices with regard to high aspect ratio via and trench etches, and subsequent dielectric deposition, metal via and trench gap fill.
What do these challenges really mean in terms of changing material requirements and volume opportunity? In this presentation we highlight those processes that must have better, alternative process materials, and contrast these with materials used for current devices. Finally, market forecasts will be presented on those materials that offer the best opportunity for the future.
CV of presenting author
Lita Shon-Roy , President/CEO of Techcet, has worked in the electronics materials industry in business development and technical marketing for more than 25 years. Her work experience spans from business development, marketing and sales of IC's, equipment, and materials to process development of flat panel displays (TFTs). She has developed new business opportunities for companies such as RASIRC/Matheson Gases and IPEC/Speedfam and helped establish marketing and sales proficiency in companies such as Air Products/Schumacher, Brooktree/Rockwell, and Hughes Aircraft. Lita helped build IPEC as a leader in CMP equipment as Director of International Sales. In 1998, Lita co-founded Techcet Group, LLC. She has authored and co-authored various articles and texts focused on the semiconductor processing, industry forecasting, and the world economy and is now a recognized expert in electronic materials marketing and business development. Lita holds a Master's Degree in Electrical Engineering, with a specialty in Solid State Physics from USC and a Bachelor's Degree in Chemical Engineering from UCSD. She is currently completing her MBA at California State University.