Coming Soon

Jari Kinaret
Executive Director
Chips JU

Abstract
Coming Soon

Biography
Jari Kinaret was born in Finland and holds M.Sc. degrees in Theoretical Physics and Electrical Engineering from the University of Oulu in 1986 and 1987, respectively, and a Ph.D. in Physics from the Massachusetts Institute of Technology (MIT) in 1992. Prof. Kinaret has worked in various roles at research institutes and universities in Copenhagen, Denmark, and Gothenburg, Sweden. From 2013 to 2023, he served as the Director of the Graphene Flagship, a one-billion-euro research project dedicated to exploring the potential of graphene. In October 2023, Prof. Jari Kinaret assumed the role of Executive Director at Chips Joint undertaking (Chips JU), a European public-private partnership that supports research, development, innovation, and future manufacturing capacities in the European semiconductor ecosystem.

Semiconductor-X: Demonstrate a Novel Data Ecosystem for the Semiconductor Supply Chain Accelerating TTM and Improving Resilience

Harald Gossner
Senior Principal Engineer
Intel

Abstract
The presentation demonstrates the novel data ecosystem of Semiconductor-X incorporating secure data exchange between supply chain partners in the semiconductor industry and its suppliers and customers in other industries. It proves the impact on acceleration of decision making and the efficiency increase in documenting sustainibility parameters and regulatory reports. Security aspects and interoperability have been developed by a project team of 30 partners and is currently desiminated internationally.

Biography
Harald Gossner holds the position of a Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich in 1990 and his PhD in electrical engineering from Universität der Bundeswehr, Munich in 1995. For 15 years he has worked on the development of electrostatic discharge (ESD) protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD robustness development for Intel products.He is the co-founder and co-chair of the Industry Council on ESD Target Levels representing more than 60 companies including all leading semiconductor manufacturers. He is President Emeritus of the EOS/ESD Association, Rome, NY, IEEE Fellow and editor of IEEE Electron Device Letters.In his role as technology advisor, he is member of the industry advisory boards of the Bavarian Government and of several Fraunhofer institutes. Since 2024 he is leading the project Semiconductor-X, coordinating the development of a dataspace for a resilient supply chain of semiconductors for Europe. He is also responsible for Intel’s activities to build-up a design ecosystem of innovative designs in digital leading edge technologies in Europe.

Quantum-Safe Silicon: From Chips to Cyber-Resilient Systems

Angelos K. Marnerides
Asst. Professor of Cyber-Physical Systems Security
KIOS Research and Innovation Centre of Excellence at the University of Cyprus

Abstract
The transition to post-quantum cryptography is rapidly becoming a hardware–software co-design challenge. This talk will present ongoing activities within the EU-funded FOCAL project, focusing on crypto-agile architectures, hardware acceleration, trusted execution and programmable edge-to-cloud platforms for practical PQC deployment. Particular emphasis will be placed on how these technologies intersect with the semiconductor ecosystem and can enable scalable, high-performance and quantum-safe systems across automotive, communications and critical infrastructures.

Biography
Prof. Angelos K. Marnerides, Asst. Professor of Cyber-Physical Systems Security at the department of Electrical & Computer Engineering and Faculty Member at the KIOS Research and Innovation Centre of Excellence at the University of Cyprus. He is a Senior Member of the IEEE, has secured over €15M in research and innovation funding, and currently coordinates the €5.8M COCOON and €6.4M FOCAL Horizon Europe projects, while also contributing to European Defence Fund projects. His work bridges advanced cybersecurity research with real industrial, critical-infrastructure and defence applications, including on-going and past collaborations with BAE Systems, Raytheon, Fujitsu, NCSC, GCHQ and the UK Ministry of Defence as well as other EU security and defence agencies. He is also a directly appointed member of the Council for the Cypriot Defence Industry, advising the President of the Republic of Cyprus on defence-industry matters.

Sovereign AI at the Edge: Heterogeneous, Decentralised and Collaborative Compute

Eiman Kanjo
Head of Smart Sensing Lab
Nottingham Trent University

Abstract
Moving AI into the physical world requires heterogeneous systems in which specialised units handle perception, communication, actuation and learning. Beyond existing specialised accelerators and memory-centric designs, the challenge is to coordinate these units across chips and edge devices while minimising data movement. This talk will explore hybrid, decentralised and collaborative architectures combining digital, analogue and neuromorphic computing, low-precision inference, high-precision processing and on-device learning to support sovereign TinyML, edge AI and physical AI.

Biography
Professor Eiman Kanjo is Professor of TinyML and Head of the Smart Sensing Lab at Nottingham Trent University, and Honorary Provost Visiting Professor at Imperial College London. She directs three major initiatives: the EPSRC TinyML Network, the EPSRC GREEN+ Network and the forthcoming TinyML UK Network. She also serves on the EPSRC ICT Strategic Advisory Team and is a public lecturer at the Royal Institution. She was named one of the Top 50 Women in Engineering by the Women’s Engineering Society, received the Edge AI Foundation Outstanding Educator Award in 2025, and received a Turing Network Development Award in 2022. Earlier in her career, she held research roles at the University of Cambridge and the University of Nottingham.