Thursday, November 20, 2025
Electr

Electrification and Power Semiconductors

12:05 Opening Remarks by Session Chair, Uwe Hansen, VP Development Power SC and Modules, Robert Bosch GmbH
12:10
A Novel Approach for the Volume Production of Wide-Bandgap Semiconductor
  Ghassan Barbar, Sales Director, ELEMENT 3-5 GmbH
A Novel Approach for the Volume Production of Wide-Bandgap Semiconductor

Ghassan Barbar
Sales Director
ELEMENT 3-5 GmbH

Abstract
In this work we describe another epitaxial process. Here we present data of aluminum nitride (AlN), graphene interlayers and of SiC on AlN thin films on sapphire and of epitaxial growth of SiC on SiC grown by Next Level Epitaxy (NLE). The new process is using a surface temperature around 250°C by combining PVD (physical vapor deposition) and CVD (chemical vapor deposition). The growth procedure in NLE is similar to the MOCVD growth process with substrate cleaning, start layer and main layer. Compared to the reactive sputter processes and pulsed sputter epitaxy the NLE uses different plasma sources in various combinations.The NLE system is a homemade novel deposition system. In the current configuration, it has a capacity of up to 70 x 200 mm wafer at one time. As Al-source pure Al was used. As nitrogen source nitrogen gas, as Si-source silane and as carbon source for graphene and SiC methane which were introduced by a homemade ion gun. Additionally, argon, oxygen and hydrogen were used. During the process the surface temperature of the wafer was kept around 250°C. The used plasma sources are all designed as stripe sources. The wafer is placed on the carrier which is moving front and back in the growth chamber under the stripe sources. First the substrates were cleaned with a mixture of argon and oxygen and after with argon and hydrogen using the plasma. After the in-situ cleaning first a monolayer of aluminum was deposited followed by low plasma power and low growth rate AlN and after higher plasma power and higher growth rate AlN. The graphene layers were used as interlayer sandwiched between AlN and were compared with AlN grown in one step with the same total growth time. The experiments for SiC growth started recently. As seed for the SiC growth NLE-AlN on sapphire was used. Since AlN is counted as 2H-AlN it can act as seed for 2H-SiC and 4H-SiC.

Biography
Ghassan Barbar (Sales Director) received the chemical engineering degree from the university of Applied Science, Berlin, Germany in 2001. In 2022 he took over the position of sales director at ELEMENT 3-5 GmbH with a special focus on the product management for the ACCELERATOR 3500K. Prior to this, he worked as an independent consultant in the semiconductor industry. Before that, he joined Ebner Group in 2011 and held several roles within the sapphire department (FAMETEC) In 2018, he built up within the group SiC crystal growth division, which is a spin-off company (EEMCO) since 2020. Before that, he worked at AIXTRON in R&D for development of high-k and metal gate for CMOS applications by CVD/PECVD. Ghassan holds over 15 patents in crystal growth of Sapphire and SiC.

12:30
Robust SiC MOSFET Devices for Drive Train Applications
  Stephan Schwaiger, Automotive Electronics, Robert Bosch GmbH
Robust SiC MOSFET Devices for Drive Train Applications
Stephan Schwaiger

Stephan Schwaiger
Automotive Electronics
Robert Bosch GmbH

Stephan Schwaiger

Abstract
SiC technology replaces its silicon competitor in many automotive applications, especially in drive train inverters for high voltage batteries of electric vehicles. Using the higher efficiency in partial load operation, SiC traction inverters outperform Si inverters and allow to extend the range of an electric car. As a result, SiC technology gained market shares and many semiconductor players took significant development efforts to improve the SiC MOSFET performance, i.e. reducing the on-state resistance with the goal to enable smaller and cheaper traction inverters. However, also other improvements, e.g. improvements in switching behavior or the integration of new features like sensing elements improve the applicability on system level.This talk provides an overview of SiC MOSFET technology for drive train applications. It sums up the key performance indicators for a technology enabling a performant design of a drive train inverter. Furthermore, the talk discusses the advantages of integrating sensing elements on chip level and gives an insight on measures to increase robustness necessary to maintain high quality products with low failure rates. The talk provides an insight into recent advances of Bosch’s SiC technology designed for reliable, high performance automotive applications.

Biography
Stephan Schwaiger studied physics at the university of Hamburg and finished with a doctorate degree in 2012. He started in semiconductor industry in Bosch’s central research department working power semiconductors. Since 2015 he works on the development of SiC semiconductors for the section Automotive Electronics at Bosch focusing on technology and device development.

12:50
Topic Coming Soon
  Navab Singh, Director, MEMS Program at the Institute of Microelectronics, Singapore, Institute of Microelectronics
Topic Coming Soon

Navab Singh
Director, MEMS Program at the Institute of Microelectronics, Singapore
Institute of Microelectronics

Navab Singh

Abstract
Coming Soon

Biography
Dr. Navab SINGH [M.TECH/IIT Delhi, Ph.D./NUS Singapore] is a Senior Scientist and Director at Institute of Microelectronics (IME), A*STAR, Singapore, leading MEMS program. As a Senior Scientist/ Member of Technical staff and Principal Investigator of Nanoelectronics program, in 7 years [2005-2011], he developed highly scaled lateral and vertical nanowire gate-all-around FETS, NVM devices and high efficiency silicon solar cells. Prior to that Dr Singh worked on lithography technology development for 9 years [1996–2004] focusing on resolution enhancement techniques. Dr. Singh has authored or co-authored more than 190 technical papers (citations > 1900 & h-index: 22) in referred archival journals and conferences and has filed more than 20 technology disclosures. His nanowire gate-all-around FET papers have been selected for pre-conference publicity by IEDM and SSDM conferences. He is a recipient of George E. Smith Award 2007 for best paper in IEEE Electron Device Letters, Singapore National Technology Award 2008 for his outstanding contributions to the research and development of nanowire-technology platform, enabling the realization of ultimately scaled CMOS integrated circuits and new class of electronic bio-sensors, IME Excellence Award 2009 for industry project developing Surround Gate Transistor (SGT) technology, and A*STAR TALENT award 2010 for Leading, Educating and Nurturing Talents.

13:00 Reserved
13:20 Closing Remarks by Session Chair, Uwe Hansen, VP Development Power SC and Modules, Robert Bosch GmbH