3DIC Assembly at Room Temperature Employing Binary Alloying

Eric Schulte
CTO
SETNA LLC

Abstract
We present an alternative to Tin-based solder caps currently used for 3D-IC chip stacking. We propose a binary metallurgical system which can be bonded at room temperature to create robust mechanical and electrical interconnects. An Atmospheric Plasma process is used to de-oxidize and passivate the bond surfaces, followed by room temperature compression bonding. Subsequent chip layers can be stacked in the same manner at room temperature without requiring thermal excursions. This eliminates the bond process time normally consumed with melting and solidification, thus dramatically increasing bond throughput. Room temperature bonding also eliminates concerns about oxidation of exposed bonding surfaces over very long chip-to-wafer assembly cycles. Following completion and test of the stacked assembly, low-temperature solid-state annealing creates a ductile binary alloy interconnect which is stable to above 600°C. An additional benefit of the Atmospheric Plasma pre-bond treatment is that all chip and bump surfaces are highly activated for very rapid post-bond capillary underfill. Current Tin-based solders have been shown to produce a range of unstable intermetallic compounds with undesirable mechanical and electrical characteristics. The proposed Silver-Indium binary pair favors simple, post-bond low-temperature inter-diffusion of these two metals to form Ag2In, while thermodynamics exclude other nearby metals (i.e. Cu, Ni, etc.). Typical post-bond interdiffusion temperature of the binary metal pair is in the range of 80-120°C, and does not require compression during interdiffusion. Experimental results will be presented.

Biografie
As a Senior Process Engineer in the aerospace industry, and then as a consultant, Eric has provided engineering support for all aspects of infrared and visible focal plane prototyping and production including: hybrid assembly, hybrid packaging, thin film deposition, thin film etching and lift-off, film stack stress management, photolithography, passivation, contact metallization, indium bump patterning and deposition, detector design, yield improvement, process integration/simplification, and technical troubleshooting. Eric holds 17 US patents (with several more in progress) and has received numerous industry and company awards for creative solutions to difficult engineering challenges. He has authored or co-authored 14 technical journal papers and 2 magazine articles in the focal plane field. Eric holds Engineering and Science degrees from Michigan Technological University and The University of Texas at Dallas. Following military service as a Naval Officer in Vietnam, he worked for 10 years as a Process Development Engineer in the Texas Instruments Central Research Labs, and then 19 years as a Senior Process Engineer at Santa Barbara Research Center (Hughes/GM/Raytheon). He retired from SBRC in 2004. In the following 8 years, Eric was a consultant in the focal plane field. Eric is currently Chief Technical Officer for Ontos Equipment Systems which produces surface preparation equipment and processes for the semiconductor assembly industry, including emerging 3D IC assembly technology. Additionally, Eric is CTO of SETNA

Power Semiconductor Wafer Thinning Process Control for Automotive Application

Yann Guillou
Global Marketing Manager
UnitySC

Abstract
Wafer thinning has been used for many years in the microelectronic industry for a wide range of applications such as CMOS, memories, Power Semiconductors, MEMS, RFID and more. Still, in the last years, wafer thinning process has become more critical than ever due to the demand of ultra-thin and high-performance components, and consequently requiring better process control solutions. Back grinding is the most popular process method used to reduce the wafer thickness as it is low cost and high speed technic. However, the mechanical stress and heat applied during this process can generate some damages. These damages need to be carefully understood and control as they impact the performance and reliability of the final device. In this paper we will present new inspection technics with associated results allowing to perform the full wafer characterization after back grinding. The presentation will focus on two complimentary technics compliant with high volume manufacturing: - Phase Shift Deflectometry (PSD): A unique and powerful approach to perform high throughput full wafer surface macro inspection. PSD allows detecting topographic defects with only few nanometer height range on wafer frontside and backside surfaces. Combined with wafer reflectivity and global topography results, PSD provides a reliable method to detect defects such as sliplines, comets, grinding marks, star cracks, and more. - Confocal Chromatic (CC): A technology used to perform the wafer edge inspection (Top, Top Bevel, Apex, Bottom Bevel, Bottom), allowing a combination of high lateral resolution with a large depth of focus. The CC edge inspection can detect typical defects such as chips, shells, cracks, contamination areas and more that can propagate on the wafer.

Biografie
Yann Guillou is Global Marketing Manager at UnitySC

Measurement of Airborne Nanoscale Particles Using Condensation Particle Counters

Richard Remiarz
Business Director
TSI

Abstract
Internal geometries continue to get smaller with each generation of microprocessor and memory chip. The result is that with each generation, even smaller particles can cause contamination issues and affect yield. Just because a 0.1µm light scattering instrument is not measuring any particles doesn’t mean there aren’t 1000s of nanoscale particles present in a process. The laws of physics limit the ability of light scattering airborne particle counters to detect smaller particles, and existing instruments are not able to meet the needs of industry to measure airborne nanoscale particle concentrations. Measuring nanoscale particles requires the use of different technologies. One method of detecting nanoscale particles is to grow them to a larger size. Instruments that count airborne nanoparticles by growing them are called condensation particle counters (CPC). Commercial CPCs have been available for over 50 years. Traditionally, these instruments have been used for research and environmental monitoring. While some have been used in cleanrooms, most commercial instruments are designed for environmental studies measuring higher particle concentrations. These CPCs use alcohol or some other working fluid and these instruments generate significant numbers of airborne particles, potentially contaminating a cleanroom environment. In the last decade, water-based CPCs have been developed that eliminate undesirable chemicals from the cleanroom environment. More recently, high flow rate CPCs have been developed which have greatly reduced false count rates. CPCs specifically designed for cleanroom applications instruments provide the ability of continually monitoring airborne nanoscale particle concentrations at high flow rates without introducing chemicals or particles to the environment. These instruments allow semiconductor manufacturers to improve yields by monitoring particles smaller than can be detected by traditional light-scattering airborne particle counters.

Biografie
Richard Remiarz has been working for TSI for 37 years. He is Business Director for Controlled Environments. Richard holds an Engineering degree specializing in aerosol science and particle measurements. richard.remiarz@tsi.com

Enlarging functionalities - from continuous to pulsed processing - in one plasma etch tool, and for a reasonable budget.

Bruno SIMON
Hardware Engineer
CORIAL

Abstract
CORIAL is a manufacturer of plasma etch and deposition tools with a focus on the development of process solutions for the specialty semiconductor market. The company specializes in the development of modular, easy to use and reliable tools that makes it easier for their clients to widen their sphere of possibilities and reduce their process development times. RIE, ICP, DRIE, and ALE plasma etch technologies are generally employed in the specialty semiconductor market using adapted process recipes but also different equipment. Pushed by budget consideration and rapid evolution of process requirements, there is an increasing demand from academia and R&D centers for more versatile tools. Looking for enhanced functionality for R&D, CORIAL has demonstrated the capability for an etch tool to support ICP, RIE, ALE and DRIE technologies in the SAME reactor. This presentation will outline some key hardware features such as plasma source, reactor design, and pumping system. CORIAL latest advancements regarding software will also be introduced with a presentation of COSMA Pulse, a process control software capable to control and pulse any process parameter with a minimum pulsation period of 10 ms. The talk, will also be an opportunity to prove the capability of CORIAL’s tool to etch materials in both continuous and multiplexed modes with the presentation of the latest process recipes developed by CORIAL process Team for DRIE of SiC, DRIE of Si, DRIE of glass, ICP of GaN, ALE of Si, back sputtering of metals, and more…

Biografie
Bruno SIMON has over 20 years of experience in plasma etch and deposition tools. He joined the CORIAL team in 2006. After 10 years in R&D with a position of Senior Product Engineer, he changed to sales support, managing since a few months Customer Service within the company. Bruno holds a degree in Material Science from INSA Lyon.

Enabling Materials for Semiconductor and Sensor Assembly

Ruud de Wit
EIMEA SU Head Semiconductors
Henkel Electronic Materials NV

Abstract
Henkel's Electronic Materials division is globally active in developing and offering specialized adhesives, encapsulants, coatings, inks and soldering materials for automotive, industrial and consumer electronics applications AND semiconductor and sensor assembly. Using its broad technology toolbox, the Henkel Semiconductor steering unit is successfully developing innovative solutions in liquid, film and B-stage format for : - Advanced semiconductor packaging (like low warpage wafer level encapsulation and 3D interconnect) - RF and Power device assembly (like high conductivity die attach, Insulating Metal Substrates and in-package EMI shielding) - MEMS sensor assembly (like ultra-low and stable modulus <1 MPa) - CMOS Image and Biometric sensor assembly (requiring low outgassing and low temperature cure <80 Celsius) During this Forum presentation several of these new developments for Semiconductor and Sensor Packaging will be briefly highlighted. Of course, more detailed information can be discussed and shared at the Henkel booth B1-1567.

Biografie
Ruud de Wit is active in Semiconductor and Sensor Packaging since 2000 when Henkel started its specialized Electronic Materials division. During more than 25 years of Henkel service, Ruud gained broad experience in multiple roles like technical support, quality assurance, account management and business development. Ruud is currently heading the Henkel's Semiconductor steering unit in EIMEA.

Enabling silicon and metal oxide materials for dielectric and pattern transfer applications

Thomas Gädda
Director
PiBond

Abstract
PiBond develops and manufactures advanced siloxane and metal oxide materials. The main function the materials have been developed for are dielectrics and pattern transfer. Dielectric products include: - Optical dielectrics with wide refractive index range - PMD, ILD and passivation dielectrics - Patternable, high temperature CVD SiO₂ replacements and conformal low k dielectrics Pattern transfer materials include: - metal oxide and siloxane hard masks with excellent etch resistance and other properties

Biografie
Thomas Gädda functions as a director at PiBond and leads efforts in sales and product support/development. During his career he has held various positions at VTT, Silecs and AIST, Japan. He holds several patents and has published ~30 peer reviewed papers. Thomas holds a PhD in Chemistry from University of Southern California and an MS in Chemical Engineering from Helsinki University of Technology.

Enabling 5G RF-GaN Electronics through Innovative MOCVD and Wet Etch Process Technologies

Somit Joshi
Sr. Director, Strategic Marketing
Veeco Instruments

Abstract
Emerging high frequency applications in connected devices and wireless infrastructure are requiring improved power efficiencies at higher output power and smaller form factor at lower cost. GaN is ideally suited for high frequency RF applications (e.g. mmWave) due to its higher power capability relative to Si and GaAs at higher frequencies. But producing these GaN devices in volume with the best performance and cost requires new innovations in MOCVD technology that delivers superior film quality with high yield, low defectivity and high uptime. 3D packaging is the most cost effective approach to integrate these RF devices with Si CMOS modems. The use of Through Silicon Vias (TSVs) has been implemented as a method for stacking die to achieve vertical interconnects despite the high processing costs. In many of these 3D concepts there is a need to thin the wafer to remove all of the silicon while being selective and not etching a variety of other films underneath that include oxides, nitrides and metals. In this talk, we will discuss the innovative next generation MOCVD system and how it enables 5G GaN based RF devices and the use of wet etch for wafer thinning processes in order to reduce costs of 3D packaging.

Biografie
Somit Joshi is an accomplished senior director in the High Technology, Energy sector and has a solid record of sales and marketing success in both domestic and international markets. Currently, as Senior Director Marketing MOCVD, he directs global marketing effort for Veeco’s MOCVD business. Before Veeco, Somit gained extensive experience in creating and executing product and business strategies in the semiconductor market.

High-end equipment for high-tech industries

Klaus Ruhmer
Head of Sales MicroNanoSystems
Meyer Burger (Switzerland) AG

Abstract
Meyer Burger is a leading global technology company specialising on innovative systems and processes based on semiconductor technologies. The company’s focus is on photovoltaics (solar industry) while its competencies and technologies also cover important areas of the semiconductor and the optoelectronic industries as well as other selected high-end markets based on semiconductor materials. The company currently employs over 1,500 people across three continents. The company’s comprehensive product portfolio is complemented by a worldwide service network with spare parts, consumables, process know-how, customer support, after-sales services, training and other services. Meyer Burger is represented in Europe, Asia and North America in the respective key markets and has subsidiaries and own service centres in China, Germany, India, Japan, Korea, Malaysia, the Netherlands, Switzerland, Singapore, Taiwan and the USA. The company is also working intensively to develop new markets such as South America, Africa and the Arab region. The registered shares of Meyer Burger Technology Ltd are listed on the SIX Swiss Exchange (Ticker: MBTN). Meyer Burger's “SPECIALISED TECHNOLOGIES” have evolved to cover a broad range of applications available in new markets. With its extensive expertise in the cutting of hard, brittle and valuable materials, Meyer Burger is recognised as an important provider in future-oriented markets. The innovative PiXDRO inkjet printing technology from Meyer Burger is a future-oriented technology for high-tech industrial applications in the semiconductor industry. With its FLEx platform, Meyer Burger offers a thin-film system as part of an integrated solution or as a separate process module which meets the needs of tomorrow’s technologies. With its plasma and ion beam technologies, Meyer Burger (Germany) AG offers excellent plasma and ion beam technology solutions for surface treatment and sensor production. www.meyerburger.com

Biografie
Klaus Ruhmer received his degree in Electronics and Telecommunications Technology at the HTL College in Steyr, Austria. He is Head of Sales – Micro Nano Systems at Meyer Burger (Switzerland) AG.

Stretch the mechanical limits of electronics

Hadrien Michaud
Founder
Feeltronix

Abstract
Can rubber be “smart”? Current wearable devices rely on rubber as a structural material as it offers a natural skin-like feel and excellent mechanical properties. However, the smart electronic sensing and communication functions are still restricted to a rigid casing, essentially repackaging a printed circuit board. Feeltronix breakthrough platform technology provides design and manufacturing solutions to distributed standard electronic circuits into rubber that can withstand repeated and extreme mechanical deformations (flex, twist, stretch, fold). Our platform is highlighted by: intrinsically stretchable wires, allowing for simple, generalized design; high wire conductivity (between 0.05 and 0.5 Ohm/sq); and reliable integration of standard components (PCBs and flex PCBs modules, packaged components). In addition, Feeltronix-enabled devices are sweat and water-resistant. Importantly, our processes are derived or adapted from the standards used in the manufacture and assembly of electronic circuits, so are therefore designed to scale to high throughput production with high cost-effectiveness. We are focusing our efforts to market our innovation for wearable electronic devices for which new form factors, high mechanical compliance, and skin-like feel are needed. Our current focuses are within the sports, AR/VR, healthcare, and watchmaking industries.

Biografie
Hadrien Michaud received an engineering degree from École Polytechnique (Palaiseau, France) and an MsC in microengineering from EPFL (Lausanne, Switzerland), both in 2013. He then joined the laboratory of Prof Stéphanie Lacour at EPFL and obtained his PhD in 2017 for his work on stretchable metallization technologies for skin-like wearable transducers. He is a founding member of Feeltronix.

Platform for Advanced Characterisation-Grenoble (PAC-G)

Jaime Segura Ruiz
D50 Scientist responsible
Platform for Advanced Characterisation-Grenoble (PAC-G)

Abstract
The Platform for Advanced Characterisation-Grenoble (PAC-G) is the single entry point for commercial services of characterisation, dedicated to micro- and nano-electronics industry, offered by the European Synchrotron (ESRF), the Institut Laue-Langevin (ILL), the Laboratory of Subatomic Physics & Cosmology (LPSC) and the PFNC (laboratory nano-characterisation and sample preparation) of CEA, all of them placed in Grenoble, one of the main clusters for micro and nano-electronics in Europe. The PAC-G provides outstanding non-destructive characterisation for micro and nano-electronics materials, from wafers to packaged electronic devices, printed circuit boards, using the brightest synchrotron X-rays and the most intense source of neutrons in the world, supported by state-of-the-art facilities at the CEA. We provide proprietary client services, as well as being open to collaborative programmes and partnerships (e.g. Horizon2020 projects). PAC-G is your ideal partner and we offer: Non-destructive analysis, Operando and in-situ analysis, Dynamic and longitudinal studies, Flexible experimental design, 2D or 3D imaging. Applications: Radiation hardening testing, Physico chemical and Material structure characterisation, Defectology and failure analysis, Radiation hardening tests, Metrology Residual strain, Microstructure, Elemental analysis, Electronic structure, Magnetic properties.

Biografie
I am electronic engineer with a Ph.D. in applied physics, and a thesis focused on the characterization of semiconductor nanostructures for optoelectronics applications. I worked at the European synchrotron Radiation Facility (ESRF) during three years using a synchrotron nanoprobe for the characterization of single nanoelectronic devices and semiconductor nanostructures. During the last four years, I have been working at the Institut Laue-Langevin (ILL) neutron source in Grenoble, helping the microelectronics industry to use the advanced neutron and synchrotron characterization tools available at the two facilities (ESRF and ILL) for their R&D processes. In this context, I am currently scientist responsible of the new industrial instrument D50 at the ILL.

Partnering for Improved Reliability

Didier Prod'homme
Business Development Manager
SERMA TECHONOLOGIES

Abstract
Among SERMA GROUP electronic services, SEMICON solutions are provided : audits, training, construction & failure analyses, reliability & qualification tests, wafer probing, electrical testing, reverse engineering, microelectronics assembly & production of ceramic substrates, back-end services (sawing, assemblies, packaging) from wafer to qualified components. SERMA TECHNOLOGIES SERMA TECHNOLOGIES is, at the same time, the original company, the legal holding company and the headquarters of SERMA GROUP and run the technological services. Provider of technological engineering and solutions in the Electronic Technologies Management: analysis, control, expertise and consulting services, SERMA TECNOLOGIES assists companies in the electronics sector, the manufacturers/users of electronic components, boards and systems, throughout the industrial life cycle, on various issues such as: development, technologies choices, quality, reliability, maintainability. Applications: Multisectoral services: aeronautics, defence & space, automotive, railway, industrial, energy, medical.

Biografie
Graduated in 1988 from the French “Ecole Nationale Supérieure des Arts & Métiers” (ENSAM), after 2 years of teaching Mathematics and Physics in Porto Novo/Benin, Didier joined IBM Networking Hardware Division (NHD) in Nice/France as a software developer then went to a 6 years expat experience supporting IBM NHD Customers in the US then in PR China. Back from PR China in 2000, Didier joined IBM Microelectronics to manage the whole life cycle of IC development projects/programs. Before joining Serma technologies in 2016 as a Business Developer, Didier held a Partnership Manager position at NXP Software, developing relationships with major HW phone platform makers.

The digital twin in the cloud - smart equipment life cycle management by OEM's

Frank Geissler
Director Sales
AIS Automation Dresden GmbH

Abstract
Life cycle management is more and more an essential topic for equipment manufacturers, as the equipment building and roll out has to be optimized and as additional services have to be provided for a successful business. The AIS cloud solution is therefore the solution for equipment suppliers. With Monitoring App equipment manufacturers are able to manage all their equipment at on central point. The management includes the configuration and setup data as well as general commercial aspects. In addition allows the Monioring App the visualization of KPIs and additional data from the equipment. The RampUp App is the base for an optimized installation of the equipment starting from the assembly at the shop floor to the commissioning at the customer side. Reduced installation times and faster equipment ramp up are only some advantages of the equipment cloud.

Biografie
Director of Sales AIS Automation Dresden GmbH Since June 2014 Sales Planning, Definition of Sales Objectives incl. Market and Customer Strategy, Marketing, Product Marketing and Management, Account Management

EcoPurge - Efficiency in UHP welding

Torben Blumöhr
Product Manager
Dockweiler AG

Abstract
Engineers and welders familiar with ultrahigh-purity (UHP) stainless steel Systems know that purging before welding is a critical step in achieving acceptable oxidation-free welds. The downside is that purging can be time-consuming. Depending on the tube Diameter and system's length, preweld and postweld purging can take an hour. Reducing the purge time is a key factor in making this process as efficient as possible. Purge dams achieve this by sealing off the volume of the tube, meaning that just a small chamber needs purging. However welding engineers have been reluctant to use purge dams for UHP stainless steel Systems concerning the potential to damage the electropolished surface. Extensive testing has been done to ensure, that the EcoPurge meets all requirements of the semiconductor industry. As result of our development we created a reliable purging system, which reduces the gas consumption and welding time tremendously.

Biografie
Torben Blumöhr studied industrial engineering and management (M.Sc.) at the university of Rostock. 2016 he startet his professional career as Product Manager at Dockweiler and is working on the implementation of new products

CMOS based microdisplays, imagers and sensors enhanced by OLED/OPD integration

Bernd Richter
Head of Department Organic Microelectronic Devices
Fraunhofer FEP

Abstract
The close collaboration of classical microelectronics with organic technologies allows the realization of advanced microdisplays and imagers. This work presents the key technologies and the spectrum of devices and applications from ultra-low power displays for mobile applications, displays with embedded image sensors for fingerprint applications up to imagers with extended spectral range based on organic photodetectors.

Biografie
Bernd Richter received his diploma in electrical engineering from TU Dresden in 2003. After graduation he becomes a research fellow at Fraunhofer IPMS, where he was involved in system and IC design. Since then he is focusing on the design and manufacturing of OLED microdisplays and sensors based on the organic on silicon technology. Now he is managing several projects and the department "Organic Microelectronic Devices" at Fraunhofer FEP.

How to reduce your inventory and improve performance

Sam Samson
Global V.P & EMEA CEO
IMS

Abstract
IMS Who are we. IMS, which has been operating in the global markets for 12 years, is responsible for inventory management, procurement and logistics of companies with international deployment. It offers its customers innovative and creative solutions that lead to considerable savings in inventory management and purchasing costs. The company has started its services to the semiconductor industry, but since its establishment, it has served a wide range of industries - from pharmaceutical, automotive, energy food and more. Our advantage. "Our advantage is that we are deployed all over the world and inventory management and procurement is our exclusive specialty, instead of having to contact thousands of suppliers, conduct tenders, and ask for bids - we do this for our customers and at the end of the month the customer receives one invoice from one supplier. With thousands of suppliers all over the world We have extensive experience with large-scale shipment by air, sea and land forwarding, we have fewer faults and better prices for our customers " www.utiims.com

Biografie
Sam (CPA, MA) is EMEA Region CEO and Global VP at IMS. Sam is a Senior Executive & Member of the Board of Directors, with vast multi-disciplinary experience of over 25 years in all aspects of operations, strategic planning & corporate finance, within a global public environment.

Wafer Inspection beside standard AOI: Avoid Wafer Cracking - Minimize Downtime – Maximize Yield

Johann Weixlberger
Sales Director SEMI-EL
ISRA Vision AG

Abstract
C. Probst, J. Weixlberger ISRA Vision AG, Darmstadt In todays semiconductor manufacturing environment a high level of wafer inspection after and between various process steps is applied, well known under the general term AOI. These inspection steps apply mostly to surface defects, mainly topside but also backside and edge of wafer material. But there are always more possibilities of defect to show up – or hide - in locations where standard AOI does not apply properly, e.g. inside wafer material. This defects, also known e.g. as micro cracks, are introduced during wafering process as mechanical processes like grinding and polishing are applied; furthermore in wafer thinning processes like in wafer level packaging (WLP) and MEMS, where bare and bonded wafers are thinned by grinding. Finally dicing is a major mechanical stress to single dies that can cause chipping, cracking and delamination. All these defect sources are not properly covered by standard surface AOI. As ISRA Vision started their activities in micro crack detection already many years ago, especially in solar cell manufacturing, this technology meanwhile was transferred successfully into semiconductor applications. This presentation describes methods, applications and results of this kind of inspection technology for former niche applications, but todays state-of-the-art processes that require more than surface AOI.

Biografie
Authors biography: Christian Probst, age 47, holds a degree in physics and acts since more than 20 years in optical inspection for semiconductor and photovoltaic industry as R&D engineer, R&D manager and managing director. Today he serves general and R&D manager in ISRA Visions semiconductor business unit. Johann Weixlberger, age 55, holds a degree in electrical engineering as well as business administration and acts since more than 25 years in semiconductor industry as application engineer, business development and intl. sales manager. Main applications fields have been niche markets like MEMS from its beginnings, optical and HF devices and wafer level packaging technologies. Today he serves as business development and sales manager in ISRA Visions semiconductor business unit in order to apply new inspection technologies in the wide field of special semi manufacturing processes.

Data Analysis Strategies for Monitoring 20 nm Particles in Critical Semiconductor Process Chemicals

John David
Global Applications Manager
Particle Measuring Systems

Abstract
Real time monitoring and control of particles as small as 20 nm in critical wafer cleaning chemicals is essential for controlling defects and maintaining high manufacturing yields in advanced microelectronics processes. Data analysis strategies can be implemented to determine if particle variations are random or systematic and allow focus of improvement efforts to reduce particle levels with time from source, through distribution, to the wafer fab cleaning tools. Nanoparticle contamination is assessed based on the statistical distribution of the particle measurement rate. The statistical distribution of rate of particle measurement will approach a Poisson distribution for fluids without systematic contamination sources. The deviation from Poisson statistics can be used as a figure-of-merit to quantify the stability of nanoparticle contamination in high purity chemical systems. Example data are presented and discussed, and recommendations made for achieving critical process fluid purity at the 20 nm.

Biografie
Mr. John Davis is the Global Applications Engineering Manager at Particle Measuring Systems. In this role he is responsible for a team who works with customers to create solutions for their contamination monitoring needs. Prior to Particle Measuring Systems, Mr. Davis worked for several years as a product manager of thin film deposition equipment for the high end optics market. Mr. Davis has an MS in Mechanical Engineering and an MBA.

FLEXTURA PVD - A new and highly flexible production tool

Jens William Larsen
Managing Director/Owner
Polyteknik AS

Abstract
With the aim of designing the most flexible PVD production tool the FLEXTURA PVD platform was born. The new Flextura plaform of PVD-systems from Polyteknik is unveiling a new way of modular thinking for PVD-systems. From the single chamber with classic PVD-processes to the efficient cluster systems with highly advanced PVD-processes, the Flextura way of thinking is giving you the possibility to let the investments follow increasing demands of your facility. The Polyteknik Flextura systems are highlighting a unique combination of high quality components, intelligent software,and a straightforward user-friendly operation. Mass Production Applications - High yield mass production of thin films by PVD processing on wafer based products from cassette to cassette. - Proven reliable wafer handling by Brooks MAG7 robot - Advanced high temperature PVD-processing of non-standard semicon solutions. - Multi magnetron chambers for true co-deposition - Automatic loading to batch fixture Academically Applications - Efficient processing and data acquisition of advanced PVD and thermal processes - The bridging PVD-platform from scientific and engineering intelligence to high yield mass production. - Integration of surface analytical characterization and new processes on request. Special Applications - Process frame for epitaxial growth of thin films by reactive sputtering and e-beam deposition on to substrates heated up to 1000˚C - Glancing Angle deposition at wafers in mass production scale - Market leading process software technology for accurate real time control of deposition. - Dynamic in-situ feedback control by PEM in reactive sputtering - HiPIMS sputtering for highly ionised deposition Markets - MEMS sensor production - Power electronics (AlN, GaN) - Advanced packaging (EMI on package, TSV) - LED, HB-LED, OLED - Photovoltaics R&D

Biografie
CEO, Jens William Larsen (M) is a Master of Science from Aalborg University, Denmark. He founded Polyteknik in 1995. He has extensive experience in leading development projects and bringing them to the market together with industrial companies. These projects are typically spanning from development of customer-specified coating processes as well as design and construction of tailored equipment dedicated to special coating processes. The portfolio of Polyteknik is increasing and has recently been further consolidated in a strategic direction focusing on designing a state-of-the-art module-based concept - The Flextura PVD platform. JWL is also engaged in several research and development projects together with both national and international partners.

Cleaning applications for photomask and post wafer dicing

Bernhard Hammerl
Head of Process Engineering
Siconnex customized solutions GmbH

Abstract
The focus of the presentation is cleaning of photomasks and diced wafers. Every fab needs to clean their photomasks after certain usage. The cleaning process can be done in-house or by external vendor. Due to the dicing process the wafer surface become contaminated with particles. In order to improve yield and quality of the chip, it’s necessary to clean them. How can be yield and quality of the chips improved? With Siconnex BATCHSPRAY® Acid 300mm technology it’s possible to reach both, higher quality of the chip and a better yield performance. The presentation shows how the clean processes works on a small footprint and with minimum media consumption. Additionally is shown how Siconnex works, how new process solutions are developed, how issues are solved and what you can expect from our knowledge and long-term experience.

Biografie
Bernhard is Head of Process Engineering at Siconnex in Austria. He is responsible for process research and development. After four years working as a Process Engineer he took over the Process Engineering Department three years ago. His focus is on etching, cleaning and stripping processes in batchspray equipment.

Building Bridges between SEMI Standards, Ind40 and IoT - Integrate Systems from all worlds

Hans Mayer
COO
znt Zentren für Neue Technologien GmbH

Abstract
Technologies, Tools and Sensors coming from Industrie 4.0 and IoT offer new chances to improve productivity in Semiconductor Industry. The Industry 4.0 and the IoT initiatives push a lot of new concepts, technologies and standards for integrating system in production as well as in the consumer world. Due to the broad adoption, many powerful and cost efficient tools enter the market. The challenge for Semiconductor Industry is to keep the established Semi Standard Interfaces and, in parallel, generate benefits from the new Technologies and Standards. The znt-Richter integration platform PAC builds bridges between those worlds. The presentation shows, how you can perfectly interconnect between Systems with Semi, Industrie 4.0 and IoT interfaces.

Biografie
Speaker: Hans Mayer (Ing.) Hans Mayer has 28 years of experience in IT Systems for automation. After 6 years at Siemens AG in Munich in software development for cell phones, he joined znt-Richter. With znt-Richter he implemented many automation projects as software developer and project manager for different industries with a focus on Semiconductor and Solar Industry, Medical Device and Electronic Industry and Automotive Suppliers. Name: Hans Mayer (COO) Company: znt Zentren für Neue Technologien GmbH, Lena-Christ-Str. 2, D-82031 Grünwald

Data Collection Strategies for Smart Manufacturing

Doug Suerich
Product Evangelist
PEER Group

Abstract
Data collection has always been an essential part of semiconductor manufacturing. Now, successful smart manufacturing solutions enable intelligent data analysis and allow both manufacturers and equipment suppliers to turn their collected data into action. Implementing an effective strategy for collecting your data requires a careful balance between accommodating legacy systems, ensuring data security, minimizing costs, and allowing for the future integration of advanced technologies. Join us as we discuss practical, extensible architectures for data collection by both OEMs and fabs.

Biografie
Doug Suerich is the Product Evangelist at The PEER Group Inc., the semiconductor industry’s leading supplier of factory automation software. Doug focuses on big data and remote connectivity solutions that help manufacturers collaborate securely on tools and data in a production environment. Doug has over 20 years of experience leading software teams for a variety of industries including semiconductor, manufacturing, and transportation. Most recently, he was involved in architecting PEER Group’s remote connectivity solution, Remicus™, and he was a champion in promoting the use of cloud computing and latest-generation web technologies. Prior to joining PEER Group, Doug was a software development manager, automation engineer, information systems specialist, and consultant. He has extensive experience designing and integrating robust automation software solutions. Doug holds a Bachelor of Applied Science with Honours in System Design Engineering from the University of Waterloo.

Managing high-tech Fabs at maximum capacity - The renaissance of the Operating Curve?

Gerhard Luhn
Innovation Manager
SYSTEMA GmbH

Abstract
The demand for mobile communication, e-mobility and industrial automation grows relentlessly. Analog products, MEMS and Power Applications are critical enablers of these business areas and therefore the need for these electronic components is growing. Existing 200 mm circuit and MEMS manufacturers are embracing a 200 mm manufacturing “renaissance”. Having reached the nominal capacity limit, these Fabs are confronted with the business opportunity to further increase production volumes. Fabs that originally focused on single-products and mass production (high-volume low-mix) now have to produce many small batches in a highly flexible manner (high-volume high-mix). Operators and process engineers are faced with a bumpy increase of production complexity. Besides this, the sheer quantity of manufacturing data, which is stored in historian database dumps, has grown by orders of magnitude. Still, the beneficial usability of this data has been elusive. While the landscape of specialized applications and tools is growing, those show significant limitations in utility and performance – to such an extent that most data stored in historian databases are not analyzed at all rather than being analyzed poorly. The presentation shows how a real-time holistic, holographic information concept based on Continuous Homomorphic Processing brings value for better management of Semiconductor Wafer Fabs: in “democratization” of (big) data into information. The well-known, but limitedly used Operating Curve is looking for its own renaissance, when it is integrated in a holistic information concept, thereby directly benefiting and integrating into three main dimensions: • Key performance indicators and Operating Curve measures in real-time • Advanced, multi-year Fab Analytics and innovative multivariate capabilities • Continuous Fab optimization and best integrational effectiveness for Fab simulation, Production Forecasting, Dispatching & Scheduling optimization, cost calculations and more

Biografie
Currently, Gerhard is Innovation Manager at SYSTEMA. Together with major renowned industry partners and universities, he is focused on a mathematically-physically grounded methodology to continuously transform data into information. Goal of this method is overcoming the strongly opening gap between growing magnitudes of manufacturing data and the increasing demands for continuous Fab productivity improvement plus global and local knowledge discovery – in real-time. Gerhard holds a Ph.D in engineering science from University Erlangen-Nürnberg. Following social service as blood analyst in University Hospital of Heidelberg, he worked at Siemens Semiconductor in Munich and Corbeil Esonnes (France). In the following years, he built the automation team of Infineon Dresden, worked for Qimonda and was a research fellow at Technical University Dresden. Gerhard holds several patent applications, authors scientific papers, and engages in the ‘democratization’ of data into information.

Carrier Tools for handling and processing of non standard semiconductor wafers

Carsten Wesselkamp
Sales Manager
Plan Optik AG

Abstract
Semiconductor wafers undergo a wide range of process steps, but wafer diameters or shapes sometimes do not fit to the available equipment. Carrier tools adapting smaller or non standard shaped wafers can be used to enable the processing of such wafers. Example: equipment has been set up for 8" wafers but the processing of a 6" wafer needs to be done without changing the setup? Carrier tools adapt from 6" to 8" and the smaller wafers can still run through several processes. These carriers are made from silicon, quartz or a combination of silicon and glass. Customized solutions are available. Unique marking by QR codes for easy back tracing make them suitable for a huge number of re-use cycles.

Biografie
Mr. Carsten Wesselkamp got a degree in Industrial Engineering with a study emphasis on operating technology and production engineering in 1995. He additionally achieved a certificate in work system and process organization by REFA (organization for work study and company organization). After working as assistant production manager for a multinational steel and aluminum producer he joined Plan Optik AG, one of the leading manufacturers of wafers for MEMS and carriers for semiconductor applications in 1996 as one of their sales engineers. Since many years, Mr. Wesselkamp acts as the international sales manager of Plan Optik AG and (together with his team) manages the accounts of Plan Optik AG including all technical and commercial tasks.

Holding out for a HERO - Autonomously Navigating Robots

Burkhard Stegemann
Sales Director
Fabmatics GmbH

Abstract
Since September 1, 2016, the merged companies HAP Handhabungs-, Automatisierungs- und Präzisionstechnik GmbH Dresden and Roth & Rau - Ortner GmbH have been operating under the new name Fabmatics GmbH. The company is an experienced specialist for the automation of material flows and handling processes in semiconductor manufacturing plants and other high-tech production environments. Both predecessor companies have been implementing automation projects with great success for more than 20 years. One of the focal points of Fabmatics is retrofitting 200mm factories in order to make them fit for future market demands. Currently, there are some two-hundred 200mm factories world-wide. In light of rising global cost pressure, a majority of semiconductor manufacturers is expected to modernise their factories and to automate processes significantly as a result. The presentation will show best practice automation projects, focused on material handling and production logistic applications with the mobile robots HERO FAB and SCOUT from Fabmatics, even at positions where automation previously seemed impossible. Learn how a smart integration and combination of automated systems for cassette transportation and storage, lot identification & localization as well as carrier and wafer handling can retrofit older 200 mm fabs in order to increase their competitiveness. Older does not mean obsolete!

Biografie
Born in 1969, Burkhard Stegemann studied Physical Technics at the FH Aachen and completed his final year at Coventry University. In 1996 he joined Carl Zeiss in Jena in the department of microscopic wafer inspection. After two years in R&D/ application, he changed to product and project management. As part of the acquisition of the Zeiss business field “optical wafer inspection” by HSEB Dresden GmbH in 2004, Burkhard Stegemann joined HSEB. His responsibilities were sales and service. Since May 2014 Burkhard Stegemann is sales director of HAP GmbH Dresden and due to the merger of HAP and Roth & Rau - Ortner, since September 2016 sales director of Fabmatics GmbH.

Simplified SiC Backgrinding Processing

Sarah Okada
VP of Products and Applications
Revasum

Abstract
Demand for SiC substrates is growing as the demand for SiC-based power and RF devices increases. Yet the adoption of SiC is slowed by cost and by the difficulty of processing the material. Revasum’s backside thinning of SiC process reduces costs, enabling wide-spread adoption of SiC substrates. Revasum has developed a streamlined grind and CMP process that eliminates the lapping and diamond polishing steps and the associated issues. Utilizing the 7AF- HMG, which has been designed specifically for hard materials and the 6DS-SP chemical mechanical planarization (CMP) system, Revasum has reduced the overall cost to manufacture SiC substrates, in addition to improving quality, productivity and yield. Revasum’s 7AF-HMG combines hardware and software improvements with optimized wheels to achieve finer surface finish <30 Å Ra and higher wheel life resulting in fewer interruptions to change wheels. The finer post-grind surface is similar to a diamond polished surface, but with fewer surface defects and scratches that are introduced by the lose diamonds rolling across the wafer surface. Achieving a better surface finish with the grinder reduces the amount of removal required by CMP. This shortens processing time and decreases the Using Revasum’s 6DS-SP CMP system along with slurry and pads optimized for SiC, we have been able to achieve consistent surface finish of less than 1Å Ra, measured with an AFM, over a 20µm x 20µm area. Simplification of the SiC substrate manufacturing process through elimination of lapping and diamond polishing significantly increases productivity and yields. In addition, Revasum’s optimized grinding and CMP solutions improve wafer quality and reduce costs – essentially removing two barriers to more rapid growth in demand for SiC.

Biografie
Sarah Okada, Vice President–Products and Applications Ms. Okada started in semiconductor industry in 1995 as a marketing assistant in the applications development group. During her career she has been responsible for product management, market research, marketing communications, and new product development. In 2013, Ms. Okada was promoted to director of sales and marketing where she incorporated marketing and sales best practices to develop the new Strasbaugh brand. In 2014, she was elected vice president of products and applications.

Solutions for thin and tiny dies with high die strength and for thinning WLCSP and eWLB wafers

Gerald Klug
General Sales Manager
DISCO HI-TEC EUROPE

Abstract
DISCO Corporation is a leading manufacturer for equipment and tools for wafer thinning and dicing. “Bringing science to comfortable living by Kiru (Dicing), Kezuru (Grinding) and Migaku (Polishing)” is DISCO’s mission. By combining these three core technologies, DISCO provides total solutions to meet the more and more demanding requirements of the Semiconductor industry in terms of manufacturing thin dies with high die-strength and several new approaches for advanced packaging. Discrete devices and RFID dies, universally used in smartphones and mobile devices, tend to have narrow street widths (cut margins), partially covered with low-k and ultra low-k layers, in order to maximize the number of dies formed on the wafer. Furthermore, mobile and IoT consumer products incorporate an ever-increasing number of such circuit components. With low-k and ultra low-k layers on top, singulation processes become challenging. In addition parts of these applications require the use of DAF-layers on the backside of the dies. In order to fulfil all these requirements, DISCO proposes several solutions, also focusing on avoidance of side wall cracks and interfacial layer damages, such as Dicing before grinding, Stealth dicing, Reverse Dicing before grinding and Plasma dicing, combined with Ablation laser grooving by ns- or ps-laser technology. WLCSP and eWLB applications face big issues in wafer thinning, because the wafers, due to consisting of resin mold and Silicon dies and having high bumps on the front side, tend to easily break when thickness becomes lower than the bump height. Nevertheless such low thickness is required due to increasing bump thickness. DISCO offers a unique technology to grind wafers with 200 µm high bumps down to 50 µm wafer thickness. DISCO Hi-Tec Europe GmbH with facilities close to Munich airport, offers certified Dicing and Grinding Production Services. Customers can utilize afore mentioned Disco technologies in production without investing into DISCO equipment.

Biografie
Gerald Klug studied business engineering at the University of Siegen and graduated in 1998 as Dipl.-Wirt.-Ing., completing his thesis at BMW in Munich. He started his carrier as a designer of coil processing lines for nearly 3 years at a German machine manufacturing company, Heinrich Georg GmbH. At the end of 2000, he joined DISCO as a Sales Engineer for the area of Scandinavia. Meanwhile he has been almost 17 years at DISCO, currently Sales Manager in charge of major customers in Europe.

From Smart Shoes to a Cloud Connected Sports Ball - How Sensor Frameworks enable efficient development

Shubhadip Paul
Embedded Software Engineer
NXP Semiconductors

Abstract
The world today is more connected than it ever was. From watches to car infotainment, home alarms to blood pressure monitor, everything has become connected. Everywhere you look, you can find examples of products adding connectivity, sensor algorithms, and machine learning to unleash more information than ever before. As an example, let’s explore the Smart Shoe and Connected Sports Ball. A shoe that was only providing a mechanism to cushion and support your foot is now being designed with the capability of connecting to your smartphone and giving your weight, measuring altitude changes, counting your steps and giving you compass direction. This is just the next generation shoes. A ball that was only to be kicked around and play is now being designed with the capability of connecting to the Cloud and providing motion and pressure data to your Smartphone or Desktop which can help you analyze your technique and help improve your skills. In this presentation, I will provide concrete examples of a hardware and software ecosystem designed for battery powered applications requiring a low powered MCU, Bluetooth or Bluetooth Low Energy (BLE) and Cloud connectivity, along with sensor technologies such as Accelerometer, Magnetometer and a Pressure Sensor all powered by an Intelligent Sensor Software Development Kit (ISSDK). Driven by the power of a Sensor Framework such as NXP’s ISSDK to read digital sensor data form multiple sensors and send them over BLE to a Smartphone or Desktop, multiple intelligent systems can be developed in minimal time with minimal effort. This platform can easily expand beyond a smart shoe or a ball by the consumer, medical and industrial markets allowing the next generation connected devices and sensor end nodes to achieve lower powered processing capability and aggregate sensor data.

Biografie
Shubhadip Paul is a Senior Embedded Software Engineer at NXP Semiconductors, a world leader in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. Prior to that, Shubhadip has worked for Aricent, a leader in Embedded Software. He graduated from UP Technical University with a degree in Electronics and Communication Engineering. Shubhadip is actively involved in developing Software for creating Smart Sensing Nodes using NXP Sensors and MCUs. When he isn’t glued to a computer, he loves to drive and explore new destinations with Scenic Roads and National Parks being National Parks always on the circuit.

High-Scandium Al-Sc Sputter Targets for MEMS Applications

David VanHeerden
Applications Engineer
Materion

Abstract
Modern sputtering processes place increasingly stringent demands on the metallurgical and chemical properties of targets, and consequently offer unique challenges to the development of new target materials. Critical characteristics include not only target chemical uniformity, purity, defect content, and grain size but also second phase structure and morphology, size, and distribution as well as the presence of internal residual stresses. The development of suitable target materials can be the main bottleneck in the development of new technologies and applications. In this paper we present the results of the development of one such new technically challenging and commercially important system, namely high-scandium Al-Sc sputter targets fabricated via melt processing. The sputter targets discussed in this paper typically contain scandium in the range of 10at% to 50at%. The Al-Sc phase diagram shows that with increasing Sc content the target could be made up of an Al3Sc intermetallic in an aluminum matrix, a combination of Al3Sc and Al2Sc intermetallics, or a combination of Al2Sc and AlSc. Each of these composition ranges offers unique challenges in the development of melt processed targets suitable for 200mm deposition tools. The low Sc alloys are highly prone to chemical segregation during casting, while the highest Sc alloys fabricated were made up of two brittle intermetallic phases which exhibit cracking during solidification. The mid-range alloys proved to be the most challenging with a combination of high processing temperatures, extremely brittle phases, large residual solidification stresses, and a very low overall fracture toughness. In this paper we detail the development of targets in each of these compositional ranges and show examples of materials that have been developed that have proved suitable for magnetron sputtering.

Biografie
David VanHeerden is Global Applications Engineering Manager for the Advanced Materials Group at Materion Corporation with a wealth of experience in a wide variety of materials systems including nanomaterials, electronic ceramics, bonding and joining. Author of more then 20 scientific journals and conference proceedings, VanHeerden holds a PhD from the University of Cape Town, South Africa, in Materials Engineering.

MEMS TRENCH SIDEWALL SMOOTHING BY DRY PLASMA HDRF TECHNOLOGY

Yannick Pilloux
Business Development Manager
PlasmaTherm

Abstract
Semiconductor industry has been focused over decades on Dry etch and deposition technologies, while cleaning was mainly wet technology. Optical devices as well as MOEMS for optical Mems, require to smooth the sidewall profile of the devices in order to keep good quality of optical characteristics. While the industry is currently using thermal oxidation, dry plasma etching is seen as innovative technology to smooth devices sidewall. This paper will focus on dry Plasma technology named HDRF, for High Density Radicals Flux, providing efficient cleaning solution without damaging sensitive layer like GaN, TiN, and keep low temperature processing. HDRF is high density plasma source higher than 1E17 cm-3 density, while conventional ICP source is in range of 1E13 cm-3, and is based on O* radicals free of ions while conventional Asher have ions and photons. While shaping MEMS devices is commonly done by using Deep Reactive Ion Etching (DRIE) technology and Bosch process, which is alternate process of isotropic etch and sidewall passivation steps (called loop); Alternated Bosch process generate scalloping, which are peaks and valleys on the sidewall structure. HDRF process step is required to smooth scalloping as it can create electrical arcing or electrical leak, in case of isolation layer requirement. By using fluorine based chemistry in combination with high plasma density, HDRF can smooth scalloping in high aspect ratio structure up to 30:1. It is called micro-isotropic etch step, which is to etch mainly peaks without impacting structure dimension width. Scalloping from 50 to 800 nm (peak to valley) can be reduced to few nanometer by HDRF plasma, within less than 3 minutes per wafer.

Biografie
Yannick Pilloux is Business Development Manager at Plasma-Therm, where he is responsible for the MEMS Market. Prior to Plasma-Therm, he was Product Manager at Tegal and Alcatel Micro Machining System for about 15 years, leading the DRIE technology for MEMS Industry as well as TSV applications. Yannick holds a Master degree in Business Management from CESI Lyon France

Ion Beam Etching Technologies for Sensor Manufacturing

Philipp Böttger
Technical Sales Manager
scia Systems GmbH

Abstract
For the structuring of MEMS substrates, a variety of etching technologies is used, each with individual assets and hence, for different applications. scia Systems provides vacuum equipment for dry etching processes, such as ion beam etching (IBE) as well as reactive and chemically assisted ion beam etching (RIBE/CAIBE) to meet these applications. Ion beam etching or milling (IBM) with the scia Mill 200 uses argon ions to physically remove material on substrates or wafers up to 200 mm diameter. The ion beam source made by scia Systems allows a precise tuning of the ion density and ion energy. Due to the ion bombardment, the argon ion beam milling allows the removal of all materials used in complex layer stacks in contrast to chemical etching. Additionally in contrast to reactive ion etching (RIE), the ion beam milling with inert gases, like Argon, suppresses any after-corrosion effects, which would lead to an increased resistivity when processing metals. Operating with a helium-backside wafer cooling, the substrate temperature will be kept low and allows processing of photoresists. By using a secondary-ion-mass spectrometer the precise measurement of sputtered atoms can be realized and an exact endpoint detection of the etching is possible. Even the measurement of sub-nm thick layers is achievable. A sophisticated substrate holder features rotation for improved homogeneity and tilting for defined etch angles or treatment of sidewalls. Typical applications of IBM are the structuring tunnel-magneto-resistance (TMR) sensors or optical films and the thinning of materials, such as lithium tantalite for infrared (IR) sensors.

Biografie
2016 - Present: Technical Sales Manager, scia Systems GmbH 2015 - 2016: R&D Department, scia Systems GmbH, Chemnitz (Field: Process development for ion beam trimming equipment) 2013 - 2015: Scientific assistant, TU Chemnitz/Fraunhofer ENAS (Field: Development of alternating-voltage-powered LEDs based on semicon-ductor nanoparticles (quantum dots)) 2007 - 2012: Studies of Physics, TU Chemnitz

Park Systems Inline Automate AFM for Semiconductor Application

Yong Li
Sales Director
Park Systems Corp.

Abstract
The Park System’s NX-Wafer has been widely accepted by the semiconductor industrial to support inline metrology applications. Park System’s AFM has the common core platform for both research and industrial systems which allows fast & cost-effective delivery of new solutions. Its state-of-the-art hardware design with fully decoupled X/Y and Z flexure scanners allows the 100um x 100um, artifact-free, high resolution, and true 3D profiling and imaging, and its industry leading system noise spec of < 1A enables high resolution roughness measurement of 200/300mm wafers in automated mode. In addition, Park System’s true “non-contact” mode drives significant tip cost reduction and enables exceptional measurement repeatability performance. Semiconductor manufactures and equipment suppliers are adapting Park NX-Wafer’s unique capabilities to monitor trench depth, TSV, surface roughness, CMP dishing and erosion process. The NX-Wafer is the bench mark automate AFM system for Semiconductor industrial. It is playing more and more critical role to meet the inline advance metrology requirement.

Biografie
Yong Li started his IBM career in 1988 and served as the metrology equipment engineer for 13 years. In August 2000. He joined Veeco Instruments as the NA Eastern region sales manager and expended his role to cover China Semi sales in 2003. After Veeco Instruments metrology group was acquired by Bruker in 2010. Yong took over the worldwide automate AFM sales responsibility. He joined Park Systems in August 2016 as the global sales director.

European bespoke wafer processing & development solutions for : Grinding, CMP, Edge Treatment, Wafer Bonding, Dicing and Cleaning

Georges PEYRE
Sales & Marketing Director
OPTIM Wafer Services

Abstract
OPTIM Wafer Services : presentation of the services offered : Grinding, Dicing, Wafer Bonding with concrete examples of usage. Complete process flow are proposed using when needed CMP process and high capability cleaning. Working in partnership with customers. Projects are starting most of the time with DOE to tune process flow to customer requirements. Provided services are part of customer process flow. OPTIM Wafer Services was created back in 1984 and got high skilled group of people experienced in managing project involving strong links with customers

Biografie
Sales & Marketing Director at OPTIM Wafer Services. Long experience within Semiconductor Industry from Front End engineeering management up to Customer Service and Sales.

Monitoring of Atomic Layer Deposition processes using remote optical emission spectroscopy

FLORIAN MEYER
TECHNICAL SUPPORT ENGINEER
Gencoa Ltd

Abstract
Atomic layer deposition (ALD) is a key process in the fabrication of semiconductor devices. Effective monitoring of these processes is important for reduced setup time of the process as well as detection of contaminants during the deposition. Conventional residual gas analysers, such as quadrupole RGAs, have difficulty monitoring ALD processes due to the high process pressures (typically above 1E-4 mbar) and the presence of hydrocarbons contained within many ALD precursors. These hydrocarbons often contaminate the RGA filaments, rendering the sensor unusable. An alternative gas monitoring sensor that operates directly at pressures above 1E-4 mbar has been built around plasma emission monitoring. A small “remote” plasma can be generated inside a vacuum sensor. Consequently, species that are present within the vacuum will become excited in the sensor’s plasma, emitting a spectrum of light, which can then be used to identify and monitor the emitting species, resulting in a robust, multi-purpose vacuum sensor. Crucially, this sensing method has been shown to be robust when exposed to the ALD processing environment. This presentation will describe the principal of this sensing method and present examples of its use in monitoring ALD precursors such as water vapour, ammonia, trimethylaluminium (TMA) and tert-butylimidobisethylmethylamino (TBTEMN).

Biografie
After finishing his B.Sc. in Electrical Engineering at TU Braunschweig, Florian Meyer joined Gencoa’s R&D team in October 2015 for an internship. In October 2016 he went back to Germany to work as Technical Sales and Support Engineer for Gencoa’s customers in Germany and Europe.

Inline Wafer Edge Inspection

Robin Priewald
CTO
Bright Red Systems GmbH

Abstract
In 2015 the semiconductor's thin wafer market was valued at USD 6.76 Billion and is projected to reach USD 9.17 Billion by 2022, at a CAGR¹ of 3.7% between 2016 and 2022. This market affects MEMS, CMOS Image Sensors, Memory, RF Devices, LEDs, as well as Logic Devices². When the founder of BRS worked in the semiconductor industry, he faced big challenges concerning the growing production of fragile thin wafers. As their edges are very sensitive to mechanical stress, he thought about developing a technology helping semiconductor manufacturers to monitor wafer edge integrity automatically by simultaneously keeping throughput high. Based on the patented Ranging Edge Detection Technology of BRS, the company focuses on yield enhancement for thin wafer production by providing their contactless screening laser-micrometers called Screeners. Therefore BRS-Screeners profile the wafer edge thickness during a common wafer pre-alignment process to quantify upper and lower wafer edge defects while saving precious inspection time and production costs. They also determine wafer alignment parameters as well as wafer bow. Today, the enthusiastic team of BRS develops great products and offers system integration services helping the semiconductor industry to reduce production costs and to deliver only high quality products. 1) Compound Annual Growth Rate 2) Thin Wafer Market by Wafer Size, Process, Application and Region - Global Trend and Forecast to 2022, Publisher: marketsandmarkets.com, Publishing Date: January 2016.

Biografie
Robin H. Priewald received the Diplom-Ingenieur degree (MSc) in electrical engineering from Graz University of Technology, Austria, in 2009. He also holds a PhD degree from the College of Engineering, Swansea University, Wales, UK, which he acquired under a KESS fellowship on the topic of numerical modelling of an inverse electromagnetic measurement problem in non-destructive testing of steel structures in 2013. Already during his PhD time, he collaborated with a newly founded enterprise, Bright Red Systems GmbH, on numerical optimisation methods and modelling of a newly patented measurement principle. Since 2013 he took over responsibility for research and product development at BRS GmbH, with focus on optical measurement for quantitative characterisation of geometrical object edge features, particularly for edge inspection in the semiconductor industry.

Small Scale Production

Bernd Gruska
International Sales Manager
SENTECH Instruments GmbH

Abstract
SENTECH develops, manufactures, and globally sells innovative capital equipment centered on thin films in semiconductor technology, microsystems, photovoltaics, nanotechnology, and material research. SENTECH provides innovative solutions for non-contact, non-invasive optical characterization using ellipsometry and reflectometry. SENTECH plasma systems are known for deposition of low temperature high quality oxides and nitrides, as well as low damage etching, e.g. for AlGaN-recessing. SENTECH offers cluster solutions combining etch and deposition processes for sensor, MEMS and photonics applications. Etching (ICP-RIE, RIE and ashing) and deposition processes (ICPECVD, PECVD, PEALD and ALD) can be executed one after the other without breaking the vacuum. Clusters with cassette stations are used to increase throughput, automate and combine processes. Solutions are available for semiconductor devices, sensors and MEMS. Based on SENTECH proprietary PTSA-ICP plasma source, the clusters are especially suited for low damage and low temperature processing.

Biografie
Bernd Gruska, International Sales Manager