The Energy Needs of the Semiconductor Industry and how to Meet them

,

Abstract
The Energy Needs of the Semiconductor Industry and how to Meet them

Biography
Aude Fournier is Global Market Executive at TotalEnergies.She joined the company in 2017, following the acquisition of Direct Energie, a French energy supplier.She has 20 years of experience, including 16 years in Energy and 4 years in Strategy and Management consulting.Aude is part of OneB2B Solutions, a team aiming at supporting global companies in their decarbonation journey.Dedicated to the Semiconductor & Electronics industries, her objective is to provide her partners with all the solutions they need, globally, based on TotalEnergies’ portfolio (renewable electricity, aggregation or flexibility services, biogas, cooling fluid…).

Trends in Emerging MEMS

Fitzgerald, Alissa
CEO
A.M. Fitzgerald & Associates, LLC

Abstract
End uses for MEMS are expanding into new areas beyond consumer electronics. These include ADAS and autonomous piloting systems, microfluidics for genomic analysis, portable ultrasonic devices, metaverse applications, and environmental monitoring.In view of these increasingly demanding MEMS applications for which high precision, robustness and small size are essential, new device architectures are emerging, particularly the use of piezoelectric thin films.Drawing from her company’s product development work, as well as from her view of current trends in MEMS and sensor R&D, Dr. Fitzgerald will provide a perspective on emerging MEMS architectures and materials for near-term business and growth opportunities.

Biography
Alissa M. Fitzgerald, PhD, has 30+ years of experience in MEMS design, fabrication methods, multiphysics simulation, and product development. She has personally developed over a dozen distinct MEMS devices such as piezoresistive cantilevers, pressure sensors, ultrasound transducers, and infrared imaging arrays, and she holds 11 US patents.Dr. Fitzgerald advises clients on the entire cycle of microelectronic product development, from business and IP strategy to supply chain and manufacturing operations. In addition to her primary focus on industrial and commercial activities, she continues to engage in collaborative scientific research, serve on academic conference abstract review committees, participate in peer reviewed academic journal articles, and offer guest lectures at academic institutions such as UC Berkeley and Stanford University.Dr. Fitzgerald is a member of the SEMI-MSIG Standards Committee and served as a board director on the MEMS Industry Group (MIG) Governing Council from 2008-2014. In 2013, she was inducted into the MIG Hall of Fame. She serves as a board director for Rigetti Computing (NASDAQ:RGTI), a full stack quantum computing company. Dr. Fitzgerald received her bachelor's and master's degrees from MIT and her PhD from Stanford University in Aeronautics and Astronautics.

Not applicable

Gabrelian, Artem
Doctoral Researcher
Aalto University

Abstract
Not applicable

Biography
Artem Gabrelian is a doctoral researcher at Aalto University's Electronics Integration and Reliability group. With a master's degree in Electrical Engineering and a strong focus on Semiconductor Devices and Material Science, his current research is centered on the design and analysis of state-of-the-art MEMS/NEMS systems.

Co-Optimized Heterogeneous Augmented Reality Systems Enabled with Wearable and Personalized Artificial Intelligence

Kang, Seung
Senior Vice President of Semiconductor Strategy
Adeia

Abstract
The proliferation of AI into new verticals will drive the co-integration of silicon devices, optical devices, and sensors into a unified platform. One can envision an AI-enabled augmented reality system that is always on, wearable, and personalized. This can serve as a flagship heterogeneous system co-optimized for computing, energy efficiency, and seamless user interface, while also prioritizing small form factor, comfort, and trendy design. From a semiconductor hardware perspective, a key enabler is the co-integration of an energy-efficient AI system built on silicon with an ultra-high-resolution III-V display device and state-of-the-art sensors. Such a system must function in all wearable environments, including bright sunlight and extreme weather conditions. Due to the heterogeneous nature and a tiny form factor requirement, this system necessitates an advanced three-dimensional integration. This presentation will provide an overview of such an emerging platform and its key technological attributes from the perspective of heterogeneous semiconductor integration and co-optimization.

Biography
Dr. Seung Kang serves as Senior Vice President of Semiconductor Strategy at Adeia, where he oversees strategic semiconductor programs encompassing technology, design, and system co-optimization. Prior to joining Adeia, Dr. Kang held a distinguished career at Qualcomm Technologies, Inc., where he spearheaded the Advanced Memory Program, pioneering early R&D and IP validation across the semiconductor ecosystem. His leadership also extended to the development of foundational logic IP for semiconductor nodes ranging from 7 nanometers down to 3 nanometers, supporting Qualcomm's flagship mobile, automotive, AI, and IoT products. Before his tenure at Qualcomm, Dr. Kang made significant contributions at Lucent Technologies Bell Laboratories and Lawrence Berkeley National Laboratory. He earned his B.S. and M.S. degrees from Seoul National University, Korea, and a Ph.D. from the University of California, Berkeley. Dr. Kang is a highly accomplished inventor, holding 250 U.S. patents and over 1000 patents granted globally. His research contributions are widely recognized, with over 100 published papers. He served as a Distinguished Lecturer for the IEEE Electron Device Society from 2014 to 2018 and has been a Specially Appointed Visiting Professor at the Center for Innovative Integrated Electronic Systems, Tohoku University, Japan.

Adaptive Probe Card Cleaning: How AI can add value to Smart Factory Automation

Renzella, Nunzio
Technical Pre-Sales Engineer
Advantest Italy

Abstract
The cleaning of probe cards needles it’s a decisive factor in ensuring the wafers testing is performed with high accuracy and precision. The performance and reliability of semiconductor testing equipment, particularly probe cards, are crucial for maintaining optimal manufacturing yield and product quality. However, as semiconductor technology advances, the demand for higher accuracy and increased testing throughput presents challenges in maintaining probe card cleanliness and performance consistency. Traditional cleaning methods (fixed cycle cleaning method usually set to wafer prober) often lack adaptability and struggle to effectively address evolving contamination sources and patterns.Enter adaptive probe card cleaning, a revolutionary approach leveraging AI/ML techniques and strategies to tackle these challenges head-on. By integrating real-time monitoring, data analytics, proprietary algorithms, and dynamic adjustment of cleaning parameters without the need for human involvement, adaptive cleaning systems optimize probe card performance in semiconductor testing environments. This proactive maintenance approach not only reduces downtime and enhances testing efficiency but also significantly extends the lifespan of probe cards, minimizing the frequency of costly manual cleaning. The adoption of adaptive probe card cleaning technology, and important component for adaptive control systems required for smart factory automation, translates into substantial savings, ensures consistent performance and longevity of probe cards, and provides valuable data-driven insights, giving a competitive edge (it has been proven with customers throughout Asia and Europe that are seeing cleaning cycle times slashed significantly).This presentation delves into the principles and benefits of adaptive probe card cleaning, drawing on real customer implementation results to demonstrate cost savings while maintaining testing efficiency and performance in semiconductor manufacturing.

Biography
Mr. Nunzio Renzella, the Technical Pre-Sales Engineer of Innovative Test Solutions for Advantest Field Service at Advantest Italy, holds a Bachelor in Electronics Engineering from La Sapienza University (Rome - Italy).He was a high school teacher before entering the semiconductor industry where he has worked for 30 years.Nunzio has held various roles encompassing program management, Equipment Engineering, Process Engineering, System/Application Engineering. His experience and technical knowledge in testing have given him the right skills to promote innovation.

Subfab360 ATC - Smart Control System for the reduction of emissions and energy consumption in the Subfab

Hammer, Stefanie
General Manager
algorismic gmbh

Abstract
The progress in the digitalization of semiconductor manufacturing has opened the door to implementing innovative software-driven approaches for optimizing production. The showcased solution, Subfab360 ATC, plays a significant role in this integrated smart manufacturing strategy through the incorporation of a software-based active tool coupling (ATC).Existing solutions, such as dry-contact couplings or in-device optimizations, already offer substantial opportunities for cost savings. Differing from current solutions, Subfab360 ATC employs an application-driven IT data integration architecture that connects wafer tools and subfab units, including abatements and pumps. By utilizing the software interfaces of existing hardware and subfab equipment, along with significant process information, additional avenues for device optimization can be unlocked. This, in turn, contributes to heightened energy efficiency, diminished harmful gas emissions, reduced water consumption, and overall cost reduction.Subfab360 ATC translates real-time process gas data from manufacturing tools (via Interface A or SECS/GEM) and information about N2 purge flows to enhance abatement performance. Through the software-based approach, a more precise, quasi-analog mapping of the process gas with the burner's settings is achieved, leading to a consumption pattern tailored to demand rather than fixed abatement settings. This efficiently reduces the usage of natural gas, oxygen, cooling water, CDA, as well as fresh water and the generation of wastewater. Thus, Subfab360 ATC enables achieving Scope 1 improvements that go beyond current technology. On an administrative level, Subfab360 ATC ensures dedicated user access to crucial EHS data.

Biography
Stefanie HammerGeneral Manager algorismic GmbHEducation: Steinbeis University Berlin, GermanyBachelor of Arts - Digital Business & InnovationExperience:10 Years Industry ExperienceDigitalization & Software ManagementDigital Business Model DevelopmentInternational Project Management

The Art of Integrated Photonics Sensing

Kat, Pim
CEO
Amazec Photonics B.V.

Abstract
Coming Soon

Biography
Pim Kat started his career at Sun Electric systems in 1982, developing automotive testing equipment. In 1987 he moved to Hoogovens research where he worked as researcher for 9 years.In the 1996 he co-founded the company BIHCA Systems as part of the HIT group. In 2003 this company became Technobis and eventually Technobis group in 2006. Technobis is one of the early pioneers using integrated optics for sensing applications.After the acquisition of the Technobis Group by ACC in 2019 he became the CTO of PhotonFirst (the new name of Technobis Fiber Technologies) and started a new company Amazec Photonics in 2020. This company will use the incredible resolution of Integrated Photonic Sensing for the development of new medical equipment for the early detection of heart failure.

Power and Thermal Management in Advanced Chiplet-Based Packaging

Kweon, YoungDo
Sr Director of Chiplets FCBGA Development
Amkor Technology Inc

Abstract
Chiplet-based packaging has several benefits, such as yield enhancement through logic die partitioning, system form factor reduction, and on-time to market through heterogeneous integration. However, chiplet-based packaging requires an optimized interconnection among semiconductor device dies for high bandwidth, low latency, and low power in the small form factor as advanced chiplet-based packaging. Thus, there are several challenges, such as PDN (Power Distribution Network) optimization, TDP (Thermal Dissipation Path) creation, and thermal stress minimization in the complexed chiplet-based heterogeneous integration. To solve these challenges, it needs to consider power delivery optimization while managing thermal dissipation.Amkor can support an efficient thermal dissipated chiplet-based packaging solution to succeed customers business. As known, semiconductor IC (Intergrated Circuits) power densities are still increasing yearly; moving to high performance colling systems, such as boiling liquid carries away heat generated by computer servers. Based on this kind of advanced cooling method at Data Center, packaging thermal resistance portion of Θ_JA is increased. Thus, it is important to make a better thermal performed FCBGA packages with TIM (Thermal Interfacial Materials) of Data Center application, and advanced chiplet-based packaging requires higher thermal dissipation performance continuously. For example, polymer TIMs have a limit to perform a low Θ_JC on the thermal dissipation requirement because of a higher interfacial thermal resistance as TIM I. Therefore, advanced chiplet-based heterogeneous integrated FCBGA with Indium alloy TIM is one of solution because there are many positive customers experimental data. This means that Indium alloy TIM as TIM I could provide 2x longer semiconductor device lifetime relatively. In addition, a molded FCBGA can support to create a new thermal dissipation path and to reduce semiconductor device ILD (Interlayer Dielectric) thermal stress for advanced 2.5D and 3D chiplet-based heterogeneous integrated packages.

Biography
Mr. YoungDo Kweon is currently working for Amkor Technology HQ in USA as R&D program manager. He has been working in development of several packages and assembly new platforms since 1988. Recently, he is focusing on higher thermal dissipation solutions of advanced chiplet-based heterogeneous integrated FCBGA packaging.Mr. Kweon received BS degree in Metallurgical Engineering from Hanyang University in 1987, MS in Semiconductor Engineering from Samsung Semiconductor Technology Institute in 1995, and MS with CALCE Electronics Package Research Center in Mechanical Engineering from University of Maryland at College Park in 1998. He has held several patents and published papers.

Session Chair

Guerrieri, Stefano
Engineering Fellow
ams-OSRAM

Abstract
Session Chair

Biography
Stefano has an academic background in solid state and device physics and he has worked over the last 25 years in CMOS technology development. In the early phase of his career, he worked at Applied Materials and STMicroelectronics' central R&D in Agrate Brianza (Italy) where he acquired experience in CMOS process development. From 2008 to 2014, he worked in Micron Technology as principal process integration engineer where he played a key role in the development of innovative CMOS image sensor technologies like BSI and Light pipes. From 2014 till 2019, Stefano move to imec in Leuven (Belgium) to work on the development of CMOS image sensors and there he covered different roles from single contributor to director of the pixel technology program. At imec, Stefano acquired experience also on III-V, GeSi and Quantum dots pixel technologies. As of September 2019, Stefano joined austriamicrosystem (ams) as Engineering Fellow with focus on innovation of optical sensors by cooperating with internal R&D, start-ups and academia. As of 2023, Stefano has been coordinating a cross-BU organization of key experts in sensor technologies within ams-OSRAM worldwide.

Sensors for monitoring vital signs in wearable devices

Arzberger, Markus
Senior Director
ams-OSRAM International GmbH

Abstract
It started with step counting. Activity tracker wristbands first brought the concept of daily lifestyle monitoring to public attention: the early adopters rapidly acquired the habit of counting the number of steps they walked each day – and of sharing their count with friends, family and colleagues. The capabilities of the first wearable devices were limited. Thanks to massive improvements in the performance of the components that enable activity measurement, products such as smart watches, smart rings and smart wristbands on the market today can measure far more physical parameters and measure them much more accurately.The adoption of wearable technology has given rise to the idea of the ‘quantified self’. This marks a profound shift in the way people think about personal health. Previously, people could follow a set of guidelines or principles that were associated with good health outcomes. This advice generally revolved around healthy eating, taking regular exercise, sleeping well and so on. People could take occasional health checks at a clinic, but there was no way for a person to measure continuously the effect of their lifestyle on their health.The introduction of wearable devices offered the promise of more information and created a demand from consumers to know more about their health status in real-time: actual measurements that show whether their lifestyle is making them either more or less healthy. This is part of a trend, supported by the increased use of data analytics, artificial intelligence and other advanced technologies in western healthcare systems, called ‘4P healthcare’: participative, predictive, preventive and personalized.The key measurements of health are the vital signs that medical practitioners have long relied on: factors such as heart rate, blood oxygen saturation (SpO2), blood pressure, body temperature, and heart activity as measured electrically by an electrocardiogram (ECG). Thanks to sophisticated optical and electrical semiconductor systems and software from ams OSRAM and others, wearable devices can perform these vital sign measurements well – in some cases, almost as accurately as the specialist equipment in hospitals. We will show the recent developments of the sensors and sensor components enabling this progress.

Biography
Markus Arzberger is Senior Director and Head of the Automotive and Vital Signs Product Line at ams OSRAM. He has more than 20 years of experience in product and business development in the optoelectronic industry. Markus is passionate about understanding customer needs and solving them by generating new solutions that take advantage of leading-edge optoelectronics technologies. He holds a Ph.D. in Physics from the Technical University of Munich, with research focusing on low-dimensional semiconductor physics including laser devices.

Automotive Photonic Journey

Lex, Wolfgang
Senior Vice President Mobility & Illumination
ams-OSRAM International GmbH

Abstract
Since 40 years the photonic developments have made huge progress from simple indicator lamps up to now LED in pixelated Headlamps and Stadium illumination. This disruptive change from incandescent lamps to solid state technologies was a result of very constructive collaboration between system providers, Semicon industries and end customers. Meanwhile, penetration of traditional light sources is more or less done. New photonics applications are on the horizon which will continue to change our way of life. Photonics journey just began.

Biography
Wolfgang Lex is Senior Vice President of the Business Line OS Mobility & Illumination at ams OSRAM. He has 40 years of experience in the semiconductor and automotive industry. He started his career at SIEMENS Semiconductor and joined OSRAM in 2002. Wolfgang Lex has held various management functions worldwide with a strong focus on automotive.

Session Chair

Münther, Jan
Head of Security Engineering
ams OSRAM AG

Abstract
Session Chair

Biography
Session Chair

AI powered high sensitivity metrology boost yield

Chang, Athena
CTO
Angstrom Excellence ltd

Abstract
Metrology of semiconductor process characterization is crucial in both the initial process development/ramp-up phases and in-line inspection drives continuous process improvement. Smaller node sizes in Logic, 3D stacking trend in extreme HAR memory, and new materials adoptions continuously demands ultra-high sensitivity metrology with extreme measurement accuracy and reliability. AI and virtual metrology is integrated to assist with wafer metrology and inspection, defect detection, classification, and yield prediction, ultimately enhancing overall performance.

Biography
Dr. Xuena Zhang holds a B.S. in Physics from USTC, and an M.S. and Ph.D. in Physics from the Max Planck Institute in Germany, and she was a postdoctoral Fellow at Stanford University in US. She has extensive experience in optics, Ebeam, X-ray equipment, and is the inventor of a number of U.S. patents. Dr. Zhang has held various roles at KLA, Applied Materials, and other cutting-edge equipment companies, including scientist, R&D leader, and global product director. Her expertise lies in process/device integration, semiconductor metrology, and inspection in R&D, product launch, mass production, and global product management. Currently, she serves as the chairwoman and CTO of Shenzhen Angstrom Semiconductor Technology Co. Ltd., leading the R&D and marketing efforts for semiconductor metrology tools.

Performance Analysis and Implementation of Automated LLM-basedTechniques for Crosslanguage Code Conversion and Acceleration of HardwareSoC Development

Romashchenko, Vladyslav
Research scientist
Anhalt University of Applied Sciences

Abstract
Developing complex systems often necessitates collaboration between software and hardware teamsusing high-level and low-level programming languages. For narrowly focused companies, which typicallyhave fixed sized number of specialists in application design, this programming language barrier canresult in code inefficiencies, extended development cycles, a significant number of bugs, and challengesrelated to efficient architecture design and debugging strategies. Recent advancements in MachineLearning (ML) and Large Language Models (LLM) such as CodeT5, Copilot, GPT-4o, AI-HDLCoder etc. haveopened up new possibilities for automating code generation tasks. However, the proposed models arenot cross language based in terms of code programming, and need a short, clear description of atechnical task based on Natural Language Processing (NLP) techniques. The proposed work, on the otherside, represents the novel instrument demonstrating the AI potential to bridge the gap between pythonhigh-level developers and low -level hardware programmers that are using the VHDL language to realizenumerous FPGA-based architectures. Exploring different approaches of python instruments and usingknowledge of traditional code converters, the proposed work tries to solve the challenges of automatedPython to VHDL code generation without additional verification / validation steps and simplify the pitfallsof software obsolescence. Sufficient results or comprehensive approaches need to influence the researchand industry application development backgrounds for further matched cooperations and investigationsof code generators and compilers, empowering the Industry 5.0 by new generation of code conversionframeworks for rapid prototyping and fast migration of FPGA-based hardware designs, which can lead toplanned decrease in additional financial expanses or minimization of development time for a certainproject under application development phase.

Biography
Vladyslav Romashchenko2018-now — Research Scientist and Doktorand. Field of Study: Automated VHDL code Synthesisers and Code Generators. Hochschule Anhalt. Germany2016-2018 — Master of Engineering. Double Degree Programme. Field of Study: Elektro und Informationstechnik. Hochschule Anhalt. Germany2014-2018 — Master of Engineering. Double Degree Programme. Field of Study: Telecommunications in Economy and Business, Odessa National Academy of Telecommunication. Ukraine.2019-2015 — Bachelor of Engineering. Field of Study: Telecommunication, Odessa National Academy of Telecommunication. Ukraine.2009-2013 — Smila Engineering Professional College, Field of study: Maintenance of computerized, integrated and robotic systems.Yevhenii Holopotyliuk08.02.1999HSA, Master, Electrical and ComputerEducation:1 Hochschule AnhaltMaster, Electrical and Computer Engineering (MA)Dec 2022 - Present2 Odessa National Polytechnic UniversityMaster, Information and technology (126)2021 - 20233 Odessa National Polytechnic UniversityBachelor, Information and technology (126)Aug 2018 - Jul 2021Experience:1 Hochschule Anhalt / Köthen (Anhalt) (Deutschland)Februar 2023 - September 2023Wordpress Developer2 BeSale/ Odessa (Ukraine)August 2019 - November 2023Founder, Development Team Lead3 CosmoPay/ Odessa (Ukraine)September 2018 - Juni 2019Founder, Development Team Lead4 ООО "Тавис"/ Nowa Kachowka (Ukraine)Mai 2015 - September 2015Junior Full Stack Web Developer

Maximizing Equipment Productivity: Harnessing the Power of AIx

Eaton, Brad
Sr Director Marketing
Applied Materials

Abstract
In the rapidly evolving semiconductor industry, maximizing equipment productivity is crucial for maintaining competitive advantage and optiming operational effficiecy. This presentation will explore the use of the AIx analytics platform to enhance productivity in in production semiconductor fabs. AIx leverages predictive component failure models to minimize unscheduled downtime, ensuring continuous operation and efficiency. Additionally, AIx employs advanced AI/ML models to monitor hundreds of process chamber parameters across a fleet of tools simultaneously, effectively managing fleet process matching variability.in the near future, AIx is set to introduce self-diagnosing capabilities, which will significantly expedite repairs and maintenance, further enhancing operational efficiency.

Biography
Brad Eaton is the Senior Director of Strategic Marketing at Applied Global Services. In this role, Brad leads a team responsible for driving capabilities for the AI^X analytics platform utilized by Applied field engineers to enhance and support Applied Materials service contracts. With more than 24 years of extensive experience in the semiconductor industry, Brad has been instrumental in the development of both equipment and integrated circuits (ICs) for the automotive and consumer electronics sectors and holds more that 90 patents and technical publications.

Integrated (PE)ALD solutions for interface engineering in Power Electronics

Hossbach, Christoph
Manager, Account Sales
Applied Materials GmbH

Abstract
Challenges typically associated in the most advanced nodes of leading-edge applications, where interfaces drive the majority of the device properties, are increasing being seen in specialty devices, such as Power Electronics. From 2DEG control in GaN HEMT devices to mobility enhancement in SiC devices, integration of multiple steps in a system capable of, for example, pre-clean, PEALD, preferably with a remote plasma source, and ALD. While ALD is the best-in-class solution for high density and conformal layers, addition of pre-clean and/or PEALD deposition without vacuum break in-between the steps allows new surface and interface engineering capabilities, resulting in a dramatic increase in the ALD adoption.

Biography
Christoph Hossbach is part of Applied Materials European Central Sales team as an account sales manager and as product sales specialist for Picosun products. In 2017 he joined Picosun, which became part of Applied Materials in 2022. Before 2017 Christoph has worked as a Senior Scientist at Technical University of Dresden, where he received his Dr.-Ing. in Electrical Engineering in 2013. His fields of expertise include Atomic and Molecular Layer Deposition and related applications, Chemical Vapor Deposition, metrology, as well as design of tools and components. Dr. Hossbach is co-founder of ALD-Lab Saxony and Atomic Layer Process Innovation Network (ALPIN).

Panelist

Frey, Christophe
Vice-President of EU engagements & Managing Director
ARM

Abstract
Panelist

Biography
Currently based in Sophia Antipolis France, he has been the Managing Director of Arm France since 2014. Under his leadership, Arm’s French entity has experienced significant workforce growth, multiplying its staff by four. He also serves as Vice-President of European Engagements. In this role, he focuses on strengthening Arm’s presence within the European semiconductor ecosystem.In 2024 he became an operating Partner at C4 Ventures investment fund, where he brings his 30 years of experience in the semiconductor industry, operations, and management in an international context.He holds a MS degree from PHELMA Grenoble and has held various roles in design, management, and program management at STMicroelectronics in Crolles, France, for 12 years. He played a key role in establishing the Crolles2 alliance with Philips and Motorola, an experience that led to his first international professional immersion in Austin, Texas. He then took the opportunity to join the startup SOISIC, where he served as Vice-President of Engineering before the company was acquired by Arm in 2006.At Arm, he further enriched his international experience with a four-year stay in Silicon Valley, California. As Vice-President of Operations for the Physical IP division, he oversaw project management and quality control teams while managing the division’s operational budget.Then, as VP of workplace, he coordinated the management of Arm buildings globally for five years, including crisis management during the COVID-19 pandemic.

Elevating Power Efficiencies Through Advanced Packaging Innovation

Gerber, Mark
Senior Director, Engineering, Marketing & Technical Promotion
ASE

Abstract
Coming Soon

Biography
Mark is Senior Director Engineering, Marketing & Technical Promotion at ASE, and provides technical support for customer activities focused around Flip Chip, Interconnect, and SiP Packaging Technologies, within 5G, AI, Mobile, Automotive and IoT.With over 25 years of semiconductor packaging experience, Mark previously worked at Texas Instruments, Motorola SPS, and Dallas Semiconductor in various areas of manufacturing, assembly and testing of electronics components and systems, with an emphasis on new product introductions (NPIs) and the development of new technologies and processes. Mark holds a Bachelor’s degree in Mechanical Engineering from Texas A&M University, has written 25+ papers and holds over 32 semiconductor packaging patents.

MEMS & Sensors Packaging Innovation to Accelerate AI Everywhere

Lai, Ryan
Sr. Director, Advanced Semiconductor Engineering, Inc.
ASE Inc

Abstract
Sensing technology has become pivotal to accelerating AI everywhere. It is driving innovation in packaging, and devices are brimming with greater function and performance integrated by innovators who strive to closely emulate human sensing. As application expands, the amount of data being generated is growing exponentially with sensors capturing and collecting data related to movement, light, heat, pressure, magnetic field, air wave, gas, and/or biologic signal. The addition of sophisticated AI compute functionality at the edge adds to the complexity and elevates the crucial need to mitigate any environmental crosstalk or interference that may cause latency and disruption. Today, sensing and AI edge computing are working together to deliver unprecedented system performance and efficiency. ASE’s Ryan Lai will explore the role of sensing in AI, describe several approaches that are making significant impact within the market, and share more how ASE’s innovative portfolio is evolving in alignment with game changing applications that will help our world become smarter, healthier, greener, and much more efficient.

Biography
Ryan Lai currently serves as Sr. Director of Central Development Engineering at Advanced Semiconductor Engineering, Inc. (ASE), based at ASE ChungLi. Since joining ASE over 13 years ago, he has performed a variety of roles, which currently include overseeing MEMS & Photonics Engineering teams while founding multidisciplinary departments, as well as managing both the Modeling/Measuring Lab and Advanced FA Lab. Ryan also leads Bumping R&D activities and is optimizing sensor production lines through continuous process & equipment refinement.Prior to joining ASE, Ryan held industry positions that enabled him to build expertise in front end semiconductor fabrication processes, OLED display R&D, sensor packaging technology, and custom sensor IC development. He holds 48 patents through his extensive collaborations with academic and industry partners that extend from pathfinding to transforming innovative ideas into commercial products. Ongoing is Ryan’s steadfast commitment to achieve next-level package performance, extend product lifecycles, reinforce materials characteristics, and, accomplish ESG goals. Ryan holds a Master of Science degree in Material Science from University of Southern California.

Staying Ahead of What’s Next, An Advanced Materials and Semiconductor Equipment Perspective

Arcamone, Julien
Vice-President of Corporate R&D
ASM

Abstract
As Europe strives to assert its leadership in the global digital economy, the semiconductor industry plays a vital role in driving innovation, sustainability, and growth. Advanced materials and deposition processes are the foundation for electrification & digitalization in a sustainable manner as part of the EU twin green & digital transition. The presentation will discuss how ASM’s technological innovations in Europe and globally are enabling growth through materials innovation, and will also highlight the necessity to collaborate along the electronics value chain as well as through public private partnerships.

Biography
Since 2023, Julien Arcamone is the Vice-President of the Corporate R&D of ASM, the leading semiconductor equipment supplier in ALD and Epitaxy. Based in Leuven at imec, he leads teams in Belgium and Finland that develop ASM’s novel ALD and epi processes that will enable future advanced logic and memory devices.Prior to that, he was 15 years with CEA-Leti, where he started as staff research scientist in NEMS. Then he held several positions, notably VP of Business Development for Asia, his last one with Leti being Head of the Connectivity & Computing Devices Department. In that position, he managed R&D teams dedicated to active RF and quantum devices, advanced CMOS and memories devices, and their related advanced computing approaches (Edge AI, In-Memory Computing), as well as the teams in charge of developing 3D integration technologies.He graduated in 2003 from INSA Lyon in Materials Engineering, with a focus on semiconductor materials & devices. Then, he received a PhD in Electronic Engineering in 2007 from the Autonomous University of Barcelona (Spain), and the HDR (Habilitation à Diriger des Recherches) from Grenoble-Alpes University in 2017. He is an IEEE Senior Member, and was part of IEEE MEMS conference’s TPC in 2016 and 2017. Dr. Arcamone has authored or co-authored more than 80 peer-reviewed scientific publications and 1 book, and is the co-inventor of 9 patents.

Total Defense High Tech

Reijmer, Aernout
Chief Security Officer
ASML

Abstract
Our industry is increasingly confronted with cybercrime and corporate espionage activities, attempting to exfiltrate intellectual property, engineering information, and customer confidential information for commercial gain or to disrupt business operations. These attacks extend beyond corporate boundaries to our supplier and customer ecosystems. The geopolitical relevance of cyber security has grown tremendously in the recent years in our sector, looking at the nefarious interest to obtain intellectual property and knowledge required for manufacturing high tech products.This presentation proposes a collaborative approach to reduce Cyber Risk in the High Tech / Semi and Defense industry.

Biography
•As CISO at ASML, Aernout implemented significant security capabilities for ASML (including a 10 fold increase in investments and even more for organization) in the domain of Information, IT, Human and Physical Security.•Executed for 8 consecutive years the Security Roadmap, running a portfolio of security projects, working away a historic backlog and achieving decent maturity level.•Spearheaded SIA’s and SEMICON CISO workgroup (US), the same for multinationals in NL, with the NL CISO Circle of Trust.•Became CISO of BT Global Services at the early age of 33 through a track record of solid execution and delivery.•While at BT, responsible for global security outside the UK. Brought security maturity to operational excellence level in 30 (mostly newly acquired) entities

Jumping the Barriers of Future Lithography

van de Kerkhof, Mark
Director EUV Research
ASML

Abstract
In the past years, EUV lithography has been adopted for manufacturing of state-of-the-art Integrated Circuits, with critical dimensions down to 10 nm. With the introduction of a larger NA=0.55, these dimensions will become smaller still. This will further tighten requirements on CD and pattern placement control to ensure yielding devices with dimensions below 10 nm, raising questions on the limits of the shrink that may be achieved in manufacturing reality, in terms of both exposures and chemical and etching processes.At the same time, investigations have started to push these limits even further by increasing the NA even further to NA=0.75 or beyond, or alternatively to lower the wavelength below 13.5 nm.This presentation will discuss the principles of EUV Lithography, its challenges and limitations for NA=0.33 and NA=0.55, and possible options to jump the barriers holding us back from doing lithography at critical dimensions down to 5 nm.

Biography
Mark A. van de Kerkhof is the Director for EUV Projects at ASML Research, based in Veldhoven, The Netherlands.He received an M.Sc. in Applied Physics from Eindhoven University of Technology, and a PhD in EUV-induced Plasma, also at Eindhoven University of Technology. He began his career at ODME, working on the development mastering processes for DVD and Blu-Ray. In 1999 he joined ASML as senior designer and later project manager, working on development of miscellaneous sensors as well as projection optics in both DUV and EUV scanners. He currently is Director for EUV projects at ASML Research, as well as assistant professor for Plasma Physics at Eindhoven University of Technology.He holds over 100 patents and authored or co-authored more than 50 scientific papers. He frequently presents at conferences about both photolithography and plasma physics. He is a Fellow of SPIE.

Novel Interconnect Solutions for improved signal Integrity performance

Schlaffer, Erich
Programme Manager
AT&S AG

Abstract
Title: Novel Interconnect Solutions for improved Signal Integrity performance5G Telecommunication & High Resolution Radar Applications are pushing RF components into new designs, new materials, new packages, new substrates and improved PCB concepts.This Abstract addresses the future market requirements and examines the development of novel Interconnect solution, suitable for high-frequency circuits.Regardless of the application and the product, the aim is to increase the data transfer rate (GB/s). This requirement is implemented by increasing the frequency. Examples include radar systems in the automotive business, but also applications from telecommunications, which are used in Millimeter Wave frequency bands (30-140 GHz) or for signal transmission up to 50 Gbps.Furthermore, we will propose advanced novel solutions tackling integrity losses & challenges in order to increase signal speeds and thus fulfill demands especially for high-frequency applications.An additional factor for Signal loss reduction are Design constrains like Miniaturization and Modularization.One of the key enabling Technologies which is carried out in this Abstract is Embedding of active and passive components in the stack up of an Interconnect Solution. Bare dies are embedded in a multiple layer Stack up of a PCB and interconnected with galvanic copper. Direct copper via connection induces less signal losses as compared with SMT mounted or wire bonded RFICs. The embedded Components can be interconnected single sided or double sided. The double sided method allows a separation of the signal path to the Antenna or other Signal routed elements and the thermal path to the Heat sink. Furthermore, it´s an efficient method to shorten the signal path from the RF IC towards the Antenna and open up the possibility to use the external plane for placing SMT components. Embedding is paving the way to apply vertical integration and reduce the overall footprint and miniaturize the design of an electrical Circuit. Therefore smaller Traces with lower Tolerances are required. A so called modified Semi Additiv Process Structuring method gives the possibility to reduce the width of Signal Traces and the Space in between Traces to approx. 25µm with max. 5% Tolerance.Less impedance changes due to improved line-width control ensure high level of signal integrity.Because of the manufacturing method more accurate line-shape and smooth copper surfaces reduces losses by minimizing the losses skin effect.

Biography
Author: Erich SchlafferAT&S AG, Austria Technologie und Systemtechnik AGE Mail: e.schlaffer@at.ats.netMobile: +4367689554398BiographyErich is an Austrian citizen with a technical college for electrical engineering in Kapfenberg. He joined as Process Engineer of AT&S in December 1998 and was responsible as Department Head for mechanical drilling, laser drilling, routing and electrical test. From 2008 - 2012 he was responsible for the development of a novel Photovoltaic Module Programme.Since 2012 he is developing Concepts for High Speed and Radio Frequency applications as a Programme Manager in R&D.

BLACK Semiconductor : a journey to connect chips.

Huyghebaert, Cedric
CTO
Black Semiconductor GmbH

Abstract
This presentation will adress the journey of Black Semiconductor and the pathway towards the development of a new enabling technology that targets to solve key industry data communication bottlenecks. Founded in ​​2020 by Dr. Daniel Schall and Sebastian Schall, Black Semiconductor is developing a new way to build networks of chips leveraging a novel material: graphene. These new chip networks will speed up data communication between chips for unparalleled performance, improved energy-efficiency, and reduced manufacturing cost. Black Semiconductor has the ambition to enable mass production of graphene semiconductors in full compliance with existing industry standards – a pioneering achievement for the industry. The company’s technology and hardware facilitate optical chip-to-chip connections, allowing countless chips to interact almost as if they were one.

Biography
Cedric Huyghebaert is currently CTO at Black semiconductor a startup which wants to enforce a paradigm shift in chip to chip communication through graphene based photonics. Before that he acted as Program manager of exploratory processes and modules at imec, dealing with material exploration and early module integration for functional applications. He was the initiator and the technical lead of the 2D experimental Pilot line division in the Graphene Flagship, a project which has the ambition to enforce the adoption of 2D materials by the semiconductor industry. He started in 1999 as a junior researcher in the materials and component analyses group at imec. He studied the oxygen bean interactions during sputtering profiling of semiconductors. He received his PhD in Physics in 2006 at the KULeuven in Belgium. In 2005 he joined imecs pilot line as a support integration engineer, especially dealing with the process contamination control. He was part of the packaging group from end 2007 till begin 2010, working as a senior integration engineer dealing with 3D-stacked IC integration. From 2010 to 2019, he led the nano-applications and –material engineering (NAME) group at imec. He (co-)authored more than 200 peer reviewed journal and conference papers. He has a h-index of 42 and his work was cited >7000 times (google scholar).

Panelist

Shanks, Stephaney
Vice President
BlueHalo

Abstract
Panelist

Biography
Dr. Stephaney Shanks was recently named the Vice President of Health and Performance Technologies Division. Prior to that, she was the Director for Integrative Health and Performance Sciences. Throughout her career, she has fostered a culture of collaboration and excellence to drive innovations that will solve complex human health-relevant challenges. She has collaborated with groups across the United States and is passionate about developing technologies that function in real-world environments. Stephaney has authored several peer-reviewed manuscripts on this topic and a book chapter related to rapid detection capabilities for national security applications. Stephaney received her Ph.D. in microbiology from the University of South Florida that served as the foundation for her development and evaluation of portable biosensor technologies for the Army while at the Center for Biological Defense in Tampa, FL. She then joined UES in 2013 in Dayton, OH, with an initial focus on real-time systems for detection of human performance and disease biomarkers. Over the past decade, Stephaney has led numerous teams across contracts for the Air Force Research Laboratory’s 711th Human Performance Wing worth over $200M that have focused on development of wearable, real-time technologies to detect signatures of human molecular responses resulting from stress to infectious agents and exposure to environmental contaminants in military-relevant scenarios. During this time, she has also served as the Industry Chairperson for the NanoBio Materials Consortium since 2020 where she has had the opportunity to work with numerous groups across the public and private sectors to advance the technology readiness level of wearable technologies and to develop roadmaps to set the direction of future wearable technologies that are designed to improve physiological and cognitive performance, as well as to advance the future of medical readiness of the warfighter and to revolutionize the healthcare industry. Stephaney has also participated in the NextFlex Human Monitoring System Technical Working Group for several years where she has assisted in helping roadmaps to improve the manufacturing readiness level of novel human performance-focused technologies. During her time as the NBMC Industry Chairperson, she also had the pleasure to assist in the development and implementation of the NBMC Internship program in collaboration with AFRL that provides opportunities for college graduates and graduate students to engage in hands-on research focused on developing novel monitoring, augmentation, and diagnostic capabilities. Lastly, Stephaney is an inaugural member of the SEMI Smart MedTech Initiative’s Governing Council that aims to reduce the time needed to deliver better digital health products and solutions through focus on topics such as Wearables and Artificial Intelligence applications to drive tangible improvements in healthcare delivery and outcomes.

Topic Coming Soon

Ancel, Patrice
In-Vehicle-Technologies Leader
BMW

Abstract
The vast majority of innovations in cars relies on software and electronics. Owing to the large number of suppliers and ECUs the software and electronics are distributed over, robust and performant in-vehicle networking (IVN) technologies represent a fundamental part of the infrastructure for modern zonal architectures in vehicle. The requirements on these communication technologies thereby are also continuously increasing while time-to-market & costs are shrinking. What does it change, to the E/E innovation process of IVN technologies? This presentation will show, how BMW’s IVN development department manage the innovation, based on examples with Automotive Ethernet (E/E Backbone) & SerDes (cameras and displays).A brief introduction to innovation and the rational for standardization.E/E zonal architectures and semiconductor supply chain impact on the in-vehicle networking (IVN) technologies. What has changed?How BMW’s IVN department manage time-to-market, costs competitiveness & the best customer experience.A look into the future trends & technologies

Biography
Patrice Ancel is SW Embedded engineer. For the last 21 years, he worked in the automotive industry; most of which at BMW. After successfully introducing Ethernet as a networking technology in the BMW 7 Serie in 2008 between the Head-Unit and the Rear Seat Entertainment, he worked as manager in the BMW-I power electronic development project for the BMW I3 and I8. Since 2020 is leading the In-Vehicle-Technologies for BMW

Driving Collaboration and Digitalization: The Role of Virtual Factories in Production Planning

Mayr, Matthias
Specialist Virtual Factory
BMW Group

Abstract
In a world shaped by globalization, sustainability, and digitalization, industries face the challenge of adapting to rapid changes and escalating consumer demands, leading to shorter development cycles and increasingly complex system landscapes. BMW has responded to these challenges by not only adapting but also redefining the future through the digitization of its vehicle factories as well as the virtualization of its factory planning.BMW's digitization initiative has thoroughly documented all vehicle production facilities using 3D scanning technologies, creating a digital repository with panoramic images and point clouds. This repository, utilized by over 40,000 employees, supports diverse use cases such as virtual factory tours, precise measurements, and data exports for external collaboration, enabling seamless global interaction.Further, BMW has developed a platform for virtual and collaborative 3D production planning. This platform, integrating 3D data from various source systems, serves as a centralized visualization tool that constructs detailed virtual factories. It is set to become an indispensable tool for planners and viewers, promoting efficient, real-time collaborative planning and early virtual validation within the context of the entire virtual factory. Thereby it enhances the decision-making processes and minimizes the reliance on physical prototypes.This shift from static digital archives, often in 2D, to dynamic and collaborative 3D planning environments highlights the transformative role of virtual factories on production planning and operational efficiency. Through these innovations, BMW is setting new benchmarks in manufacturing excellence and sustainability.

Biography
Matthias Mayr has held various functions in vehicle safety and virtualization of production systems at BMW. Since 2021 he is specialist for the BMW virtual factory. His core responsibility is the rollout and design of all applications regarding the virtual factory to the wide spectrum of the BMW Production Systems organisation.

Smart Sensors for Smart Life – How Advanced Sensor Technologies Enable Life-Changing Use Cases

Finkbeiner, Stefan
CEO
Bosch Sensortec

Abstract
Smart and tiny sensors are catalysts for addressing major modern challenges like enhancing environmental health and elevating human well-being.The rapid development of hearables and wearables promise entirely new fields of applications improving the user’s well-being and lifestyle by integrating many different functions in multiple connected devices. MEMS sensors play a crucial role in the realization of such innovative devices. The presentation shows how cutting-edge sensor technology enables innovative devices for advanced use-cases. There will be a special focus on connected devices and the extended usage of algorithms on the sensor which enable even more complex applications. This leads to completely new use-cases such as full-body motion tracking, indoor navigation and air quality tracking.The examples underscore the synergy between MEMS sensors and smart algorithms, unlocking vast potential across diverse fields. The presentation concludes with an outlook on innovative use cases ahead.

Biography
Dr. Stefan Finkbeiner has been CEO and General Manager at Bosch Sensortec GmbH since 2012.In 2015, Dr. Finkbeiner was awarded with the prestigious lifetime achievement award from the MEMS & Sensors Industry Group. In 2016, 2022 and 2023 Dr. Finkbeiner has been elected Manager of the Year by the Markt & Technik Magazine.He joined Robert Bosch GmbH in 1995 and has been working in different positions related to the research, development, manufacturing, and marketing of sensors for more than 20 years. Senior positions at Bosch have included Director of Marketing for sensors, Director of Corporate Research in microsystems technology, and Vice President of Engineering for sensors.Dr. Stefan Finkbeiner received his Diploma in Physics from University of Karlsruhe in 1992. He then studied at the Max-Planck-Institute in Stuttgart and there received his PhD in Physics in 1995. He was born in 1966 in Freudenstadt, Germany.

Presentation of FAMES Pilot Line

Dauvé, Sébastien
CEO
CEA-Leti

Abstract
The FAMES Pilot Line is a pioneering project, aimed at advancing semiconductor technologies in Europe. FD-SOI advanced nodes (10 and 7 nm), eNVM, 3D integration, RF components, small inductors for Power Management IC (PMIC) are addressed. This ​initiative, led by CEA-Leti and gathering 11 RTOs in Europe, aligns with the ambition of the EU Chips Act, which seeks to bolster EU semiconductor capabilities and ensure technological sovereignty. The FAMES Pilot Line includes a significant CAPEX investment plan for advanced semiconductor pieces of equipment. The FAMES Pilot Line will be opened to user projects through open calls and custom projects, thereby creating a vibrant semiconductor ecosystem in Europe.

Biography
Sébastien Dauvé was named CEO of CEA-Leti effective on July 1, 2021, after more than twenty years of experience in microelectronics technologies and their applications, including clean mobility, medicine of the future, cybersecurity, and power electronics.Sébastien Dauvé started his career at the French Armament Electronics Center, where he worked on developing synthetic-aperture radar. In 2003, he joined CEA-Leti as an industrial transfer manager and supervised several joint research laboratories, in particular with the multinational Michelin.In 2007, Sébastien Dauvé became a laboratory manager, then head of an R&D department in the area of sensors applied to the Internet of things and electric mobility. During this time, he supported the dissemination of new technologies in industry, including the automotive industry (Renault), aeronautics, national defense (SAFRAN), and microchips with the industry leader Intel. He played an active role in the creation of start-ups in application fields ranging from health to infrastructure security, leading to dozens of new jobs. In 2016, he became Director of the CEA-Leti Systems Division.From sensors to wireless communication, Sébastien Dauvé has played an active role in the digital transformation, focused on coupling energy frugality and performance. He has made cross-disciplinary approaches central to innovation by harnessing the expertise of talented teams with diverse backgrounds. Their goal is to provide technological tools for meeting the major societal challenges of the future.Sébastien Dauvé is a graduate of the French Ecole Polytechnique and the National Higher French Institute of Aeronautics and Space (ISAE-SUPAERO).

Session chair

Berger, Pierre Damien
MEMS Industrial Partnerships Manager
CEA LETI

Abstract
session chair

Biography
CEA LETI is a leading MEMS R&D lab working for industry, with more than 150 people working on these topics – world’s largest MEMS R&D institute.Pierre-Damien was previously the MinaSmart (European Digital Innovation Hub) director at Minalogic. He worked before as CPS European projects manager, Head of Smart Devices Program, Industrial Partnership Manager and VP Business Development & Communication at CEA-Leti.With more than 25 years of experience, 10 years in industry, 15 years in R&D serving industry, his experience has allowed him to master the right balance between business and innovation - Understand and listen to needs, identify and select innovative solutions, enhance the functions that meet expectations, communicate to radiate.

Bioelectrical Energy Harvesting and Human Tissue Stimulation

Teepe, Gerd
CEO
Celtro GmbH

Abstract
To date, almost all medical electronic devices are powered by batteries or through external energy transfer. Technologies have advanced in key domains, opening opportunities to remove the batteries from medical implants. Those are specifically:1. Moore’s Law has further reduced the size of electronic components in conjunction with power requirements significantly. Modern semiconductor technologies are now able to operate in the nanowatt range.2. The reduction of mechanical structures also reduces the size of the electrodes, which are now able to capture electrochemical potentials from the intra-cell space, that were previously unattainable.3. Previous cardiac pacemakers were connected to the tissue via few connections and mostly leads. However, new technical possibilities are able to drastically increase the number of connections to the tissue for energy harvesting and increased reliability.This talk will present on the CELTRO-project to demonstrate and build autonomous pacemakers, opening the technology to further battery-free implants in the human body.

Biography
Dr.-Ing. Gerd Teepe studied electrical engineering at RWTH Aachen University, Germany, where he earned a diploma and a PhD degree. He has been working in the semiconductor industry for 37 years with the following chip companies: NEC, Motorola, AMD and GLOBALFOUNDRIES. He held managerial positions for departments in research, development, marketing and product management. He worked out of Tokyo, Geneva, Toulouse, Munich and Dresden, where he lives together with his wife since 2004.Gerd Teepe is co-founder and CEO of Celtro Inc., a startup company based on the concept to harvest energy from living tissue to power medical implants.

Product Security for Trusted Electronics: A Holistic Approach

Papapanagiotou, Konstantinos
Advisory Services Director
Census S.A.

Abstract
Electronics are more prevalent than ever in our lives. We are becoming more and more dependant on them as they play a signicant role in critical domains such as healthcare, communications, automotive, and even defense. Undoubtedly, the regulatory compliance landscape is becoming more complex and strict, aiming to protect the society from risks related to the use of such electronic devices. Regulations like NIS 2 and the EU Cyber Resilience Act set specific requirements for manufacturing trusted electronics. At the same time attacks occur, which demonstrate that the industry is not well prepared or mature enough. Furthermore, new technologies that are introduced bring about exiting capabilities but also challenges for cybersecurity.In this presentation we will provide an outline of the steps that need to be taken to create trusted electronics. The approach that we will present takes into account lessons learned from other sectors, such as medical devices, to introduce security activities throughout the product development lifecycle. Starting from security reqiurements and threat modeling, and continuing until product validation, testing, and field operation, we will present how you can ensure that a secure product can be built without interruptions or delays in the production timeframe.

Biography
Dr Konstantinos Papapanagiotou is the Advisory Services Director at Census Labs S.A. Prior to that, he worked for OTE S.A. (member of Deutsche Telekom Group) where he was responsible for the cyber security solutions offered to corporate customers. In the past he has led cyber security consulting teams in other private sector organizations.Dr Papapanagiotou has more than 20 years of experience in the field of cyber security both as a corporate consultant and as a researcher. During that time, he participated in numerous cyber security projects in public and private sector organizations, in Greece, Europe, and the Middle East.He holds a PhD and BSc from the Department of Informatics and Telecommunications at the University of Athens, Greece, as well as a MSc in Information Security with distinction from Royal Holloway, University of London. For more than 10 he served as an Adjunct Lecturer at the Hellenic American University, as well as the University of Athens and University of Piraeus, teaching Information Security to postgraduate and undergraduate students.

Atomic Layer Etching of SiO₂ using SF₆

Venugopal, Rakshith
Master's student
Center for Hybrid Nanostructures, University of Hamburg

Abstract
In the relentless pursuit of advancing semiconductor technologies, the demand for atomic layer processes has given rise to innovative processes. Atomic layer deposition has already played a significant role in the ongoing miniaturization features. In the meantime, atomic layer etching (ALE) is gaining increasing traction which offers better control over material removal at the atomic level. Our research focuses on using Sulfur hexafluoride (SF₆) and Ar Plasma to perform the ALE for etching silicon dioxide (SiO₂). In our ALE loop process, firstly SF₆ is injected to be adsorbed onto the SiO₂ surface. Secondly, Ar plasma is generated, following which, F radicals are produced which react with the surface to modify it into purgeable gaseous products. Here we show our ALE process on silicon dioxide wafer using SF₆ and Ar Plasma, obtaining a constant etching rate of around 0.14 nm/cycle across independent multiple-cycle runs. Combining the systematic exploration on operating pressure, temperature, plasma power, and SF₆ dose, it is confirmed that the SF₆ does not etch surfaces directly but forms a self-limiting layer, with etching initiated only by the presence of Ar plasma and F radicals. Additionally, detailed atomic force microscopy characterization over multiple cycles reveals minimal changes in surface roughness, presenting a conformal surface etching. Our research provides a dependable, reproducible, and highly controlled ALE process for SiO₂ etch-related nanofabrication process.

Biography
I am Rakshith Venugopal, a Master of Physics student at the University of Hamburg. I currently am working on my master thesis at the Center for Hybrid Nanosctructures (CHyN). After completing my Bachelor of Science in India, I started my journey in pursuing a master's in Hamburg. I gained a passion for nanosciences after starting my masters which pushed me into choosing the topic " Atomic Layer Etching of SiO₂ using SF₆" as my Master thesis topic.Contributing Authors: Prof. Dr. Robert H Blick, Dr. Robert Zierold, Jun PengCenter for Hybrid Nanostructures, Universität Hamburg

Competitive and Sustainable Advanced Packaging (CSAP) - a new approach to FO-PLP

Farrugia, Mark Luke
General Manager
Chip Integration Technology Center (CITC)

Abstract
Fan-out wafer level packaging (FO-WLP) is a well-established technology, enabling high-resolution redistribution layers and complex electrical routing. An emerging variation, fan-out panel level packaging (FO-PLP), offers further advantages in processing area and cost. Scaling FO-PLP to larger areas reduces production costs per product, making it appealing for diverse applications. However, FO-WLP and FO-PLP face challenges in discrete power devices. Power devices, like silicon and silicon carbide diodes and MOSFETs, rely on vertical geometries, necessitating high-performance vertical interconnects through the molding compound (TMV). While fan-out technologies show promise—lower RdsON, improved thermal dissipation, and compatibility with thinner dies—commercial adoption lags due to higher package costs.We present CSAP technology: Competitive and Sustainable Advanced Packaging . This technology merges advanced packaging processes with printed electronics. CSAP replaces conventional compression molding with laser-drilled vias by a cost-effective, fully additive printing processes. In our proof-of-concept work, we create packages for silicon MOSFET dies and initial electrical results demonstrate the viability of this innovative approach. In particular, the clip and vertical contacts are realized by printing the vias and the seed layer. An electroplating process is used to grow a thicker layer of Cu to ensure good electrical and thermal conductivity. The seed layer is printed into the desired shape and added only at the locations where metallization is required, thereby reducing the material use in the fabrication process.By quantifying the package costs using a model, we demonstrate that CSAP significantly reduces packaging costs compared to traditional Fan-Out Panel Level Packaging (FO-PLP), making it an attractive technology option for devices that require feature size larger than 60 um.

Biography
Mark Luke is a Canadian born Maltese, now living in the Netherlands for the last 16 years. He graduated in Mechanical Engineering from the University of Malta and joined the semiconductor industry right after. He Started as a process engineer in STM’s Malta assembly plant and later joined STM’s Package Development center in Grenoble, France. In 2007 Mark Luke joined NXP in Nijmegen working on various breakthrough innovation projects and was very active in the transition from gold wire to copper wire. Currently he is the General manager of CITC.

Chips Joint Undertaking: Working Together to Strengthen European Industries

Kinaret, Jari
Executive Director
Chips Joint Undertaking (Chips JU),

Abstract
The Chips Joint Undertaking is funded by the European Union (represented by the EC), Participating States, and Private Members (AENEAS, EPoSS, and INSIDE Industry Associations).The Chips JU is the European tri-partite partnership that will boost the development and adoption of advanced nano-electronic chip-technologies and systems manufactured in Europe, supporting European sovereignty, digitalisation of society, energy transition, and more, respecting the European values and this to the greater good of the European citizen society and environment. The Chips JU will develop, together with the European nanoelectronics community and the Member States, in the coming years a strong portfolio comprising several pilot lines for advanced nanoelectronics’ technologies, a design platform for the design of advanced chips, a broad set of projects that make use of those technologies to innovate all along the value chain in all industrial domains: mobility, energy, health, robotics, and of course chip manufacturing. This portfolio of actions will be supported with a network of competence centres all over Europe that will facilitate the access to those actions for European start-ups, SMEs, universities, and larger companies.

Biography
Jari Kinaret was born in Finland and holds M.Sc. degrees in Theoretical Physics and Electrical Engineering from the University of Oulu in 1986 and 1987, respectively, and a Ph.D. in Physics from the Massachusetts Institute of Technology (MIT) in 1992.Prof. Kinaret has worked in various roles at research institutes and universities in Copenhagen, Denmark, and Gothenburg, Sweden. From 2013 to 2023, he served as the Director of the Graphene Flagship, a one-billion-euro research project dedicated to exploring the potential of graphene.In October 2023, Prof. Jari Kinaret assumed the role of Executive Director at Chips Joint Undertaking (Chips JU), a European public-private partnership that supports research, development, innovation, and future manufacturing capacities in the European semiconductor ecosystem.

Wide Band Gap Pilot Line: a Major Boost for Europe’s Innovation and Competitiveness

La Via, Francesco
Research Director
CNR IMM

Abstract
The European semiconductor industry excels in market segments driven by wide bandgap material capabilities, such as automotive, industrial, and specific telecommunication areas. The growth projections of industry & automotive market segments outperform the growth of the semiconductor industry. Between 2021 and 2030, McKinsey estimated a CAGR of respectively 13% for automotive electronics and 9% for industrial electronics. Through its strong position, the European Union should drive the growth and maturation of WBG material platforms in power and telecommunication applications. A pilot line can help the Union to drive the necessary process, architecture & material innovations from lab to fab effectively. Furthermore, the ultra-wide-band gap (UWBG) semiconductors, e.g., Ga₂O₃, AlN and diamond, have become the subject of intense research with an expected increasing interest due to the compounds' outstanding physical properties. The goal of the Pilot Line is to significantly expand the competitiveness of the European semiconductors industry by strengthening the entire value chain and enabling a fast adoption of advanced WBG technologies to high-value applications. The first results coming from the WBG pilot line will be the improvement of the efficiency of the high–end portion of the advanced power discrete device portfolio in Europe, and the development of the related value chain based in Europe. The second effect will be the creation of new and very innovative product families based on modern semiconductor materials and power devices having features and performance not covered by the current market. The WBG pilot line will build on the current facilities operating in Finland, Italy, Poland, France, Germany, Austria, and Sweden, where industrial processes will be defined and optimised, and demonstrators will be qualified to be then tested on the market.

Biography
Francesco La Via was born in Catania, Italy, in September 1961. He received the M.S. degree in physics from Catania University, Catania, Italy, in 1985. From 1985 to 1990, he had a fellowship at STM, Catania. In 1990, he joined the CNR IMM in Catania as a researcher. During this time, he was a Visiting Scientist at Philips NatLab, Eindhoven, The Netherlands. In 2001 he became senior researcher of the CNR IMM and he is responsible of the research group that work on the new metallization schemes for silicon and silicon carbide. From 2003 he is responsible of the division of CNR-IMM that developed new processes for silicon carbide epitaxy and hetero-epitaxy. From 2020 he become Research Director. He is responsible of several industrial research projects and coordinator of two European projects: CHALLENGE (http://h2020challenge.eu/) and SiC Nano for picoGeo (http://picogeo.eu/). In this period, he has published more than 350 papers on JCR journals and 4 edited books. He has presented several invited contributions to international conferences and has organized several conferences and tutorials. He has 6 patents on SiC technology and growth. The main research interests are in the field of silicon carbide growth, power devices, detectors and MEMS.

Horizon Europe ICOS (International Cooperation on Semiconductors): EU and Non-EU Strengths, Weaknesses, Dependencies, Opportunities for International Collaboration

Balestra, Francis
Director of Research
CNRS-Grenoble INP-Sinano Institute

Abstract
This presentation will deal with the ICOS CSA project dedicated to International Cooperation On Semiconductors. International cooperation is key for speeding up technological innovation, reducing cost by avoiding duplicated research, boosting the resilience of the semiconductor value and supply chains, and is one of the objectives of the EU Chips Act. The objectives and first important ICOS results will be highlighted, including the analysis of the semiconductor economic and technological landscapes in Europe and leading semiconductor countries, the identification of areas for potential cooperation and the proposition of opportunities for bilateral or multilateral research collaborations, particularly in the areas of advanced functionalities and computing.

Biography
BALESTRA Francis, CNRS Research Director at CROMA, is Director Emeritus of the European SiNANO Institute and President of IEEE Electron Device Society France, and has been Director of several Research labs. He coordinated many European Projects (ICOS, NEREID, NANOFUNCTION, NANOSIL, etc.) that have represented unprecedented collaborations in Europe in the field of Nanoelectronics. He founded and organized many international Conferences, and has co-authored more than 500 publications. He is member of several European Scientific Councils, of the Advisory Committees of International Journals and of the IRDS (International Roadmap for Devices and Systems) International Roadmap Committee as representative of Europe.

AI-Driven 3D X-Ray Inspection: A Game-Changer for Advanced Semiconductor Packages

Drolz, Isabella
Vice President Marketing & Product Strategy
Comet

Abstract
Coming Soon

Biography
Isabella Drolz serves as the Vice President of Marketing & Product Strategy at Comet AG’s X-ray Systems Division. The division develops advanced X-ray/CT systems and AI software solutions under its brands Comet Yxlon and Dragonfly. Comet Yxlon provides X-ray and CT inspection solutions from lab to fab environments, while Dragonfly offers AI-powered software that enables scientists, researchers, and industrial customers to perform complex image analyses and extract actionable insights in a repeatable, reliable, and cost-efficient manner, driving product yield.In her role, Isabella oversees Market and Product Management, Global Application & Training Centers, Marketing, and the Academia Program. She holds a degree in industrial engineering, a Bachelor of Science in International Business Administration, and an MBA from Southern Nazarene University in Oklahoma City, USA. With a strong background in mechanical and plant engineering, Isabella has held several management roles focused on market-driven product and business development.

Deep Tech Collaboration for Power-Efficient Semiconductors

Haferl, Stephan
Chief Executive Officer
Comet Group

Abstract
As artificial intelligence (AI) accelerates the demand for high-performance computing, the need for powerful but energy-efficient microchips becomes ever more important. Today’s power-hungry chips present significant challenges across industries, from mobile devices to data centers. While advanced packaging techniques offer promising avenues for enhancing microchip power efficiency, their inherent complexity necessitates robust partnerships within the deep tech ecosystem.Collaboration from chip design to packaging is vital for developing increasingly complex semiconductor structures and devices. Working together to create advanced inspection methods that effectively verify the integrity of sophisticated packaging solutions, minimizing defects that could lead to disfunctions and higher power consumption, is equally demanding and important. In this context, future-proof X-ray inspection solutions play a pivotal role in maintaining both performance and energy efficiency.By fostering innovation and co-creation, the semiconductor industry can usher in the next generation of energy-efficient devices, effectively addressing the pressing challenges posed by power-hungry microchips

Biography
Born 1972, Swiss and Norwegian citizen; Master's degree in mechanical and process engineering from the Swiss Federal Institute of Technology (ETH), Zurich, PhD with work on thermodynamics and fluid dynamics.Stephan Haferl has been working for the Comet Group successfully in various management positions since 2007. His strong track record includes proven performance in business development, innovation, technology, and product management, among other areas.Before, he held the positions of General Manager at Bartec-Meta Physics SA and Chief Operating Officer at Bartec Bacab SA.

From Good to Great: How X-Ray Technology is driving yield in Advanced Packaging

Driller, Christian
Vice President R&D
Comet Yxlon International GmbH

Abstract
The semiconductor industry faces numerous challenges in the development and manufacturing of advanced packages. From a technical standpoint, these challenges include miniaturization, thermal management, and interconnect technologies. From a market perspective, challenges arise from higher production mixes due to application-specific integrated circuits (ASICs) and customers' intolerance for failures, particularly in critical automotive applications. These challenges have resulted in constantly increasing costs for designing and manufacturing ICs.Consequently, the industry is adopting two key approaches. Firstly, it is embracing lights-out manufacturing, which involves fully automated factory operations that offer increased productivity, improved repeatability, and consequently, enhanced quality. Secondly, new testing strategies are being implemented to provide data for advanced process analytics, enabling a shift from reactive to predictive actions. These strategies aim to improve traceability, yield, and overall operational efficiency. In the monitoring of interconnect characteristics such as diameter, height, co-planarity, and bump quality, inspection tools play a crucial role. Advanced X-ray technology, in particular, holds significant potential in driving the development of defect-free advanced packaging solutions through identifying root causes of failures.

Biography
Since 2020 Christian Driller has been VP of R&D at Comet Yxlon, developing high-end x-ray and CT inspection solutions. He formed an agile R&D organization, focusing on customer problems, while forming a passionate and target driven team. In 2017 he joined Comet Yxlon as VP of Business Excellence, driving the professionalization across all functions of the company. His career began 2012 in automotive as Business Consultant at Porsche Consulting focusing on optimizing and restructuring R&D departments within the automotive industry and suppliers. Driller holds a master’s in finance from ESB Reutlingen University and a Bachelor of Engineering from Baden-Wuerttemberg Cooperative State University with Dr. Ing. h.c.F. Porsche AG as his cooperating company.

Paving the Way for High-Performance Electronics: The Future of III-V Semiconductors in Integrated Photonics

Singh, Nick
CTO
Compound Semiconductor Applications Catapult

Abstract
The future of electronics will be driven by III-V semiconductors requring acclerators like CSA Catapult to help transform these materials into real-world applications.

Biography
Nick is the chief technology officer at CSA Catapult and is responsible for the technical strategic direction of the organisation, focusing on power electronics, photonics, quantum, RF and microwave, and advanced packaging. Prior to joining the Catapult, he was CTO of PhotonFirst (Netherlands), a pioneer of PIC sensing and advanced packaging in markets such as aerospace, medical, automotive and energy. He began his career in electronics and semiconductors in the mid-nineties in France.He worked at Oxford Instruments Plasma Technology for over a decade, leading international teams to develop equipment and processes for epitaxy, ALD, PECVD, RIE, ICP etching. Nick was Group CTO at Scienta where he was responsible for technology and applications developments in XPS, graphene, OLEDs and plastic electronics. He was also CTO of a start-up for eight years which he helped scale up to deliver innovative Net Zero solutions.Nick is a fellow and chartered engineer of the UK’s Institute of Engineering & Technology (IET). He has a PhD in plasma physics and an electrical and electronics engineering degree, specialising in RF and power electronics, from University Paul Sabatier Toulouse.

Session Chair

Raithel, Stephan
COO
DAS Environmental Expert GmbH

Abstract
Session Chair

Biography
Stephan Raithel joined DAS in 2016 and since then holds the position of the COO Gas Treatment. In his position he is overseeing all aspects of DAS’ gas treatment products, such as development, engineering, product management, procurement, customer care and production.From 2007 until 2016 he was working for SEMI, the global semiconductor equipment and materials association, where he held various positions within the association – from operations management, SEMI standards and PV Roadmap program to the role of the Managing Director of SEMI Europe.Before his start in the semiconductor industry, he was employed as a project manager in the financial ,creative services and consumer goods industry.

Reduction of NOx Emission from Waste Gas Treatment

Davies, Guy
Chief Business Development Officer
DAS Environmental Expert GmbH

Abstract
The reduction of nitrogen oxides (NOx) emissions from waste gas treatment represents a critical environmental objective driven by regulatory requirements and sustainability goals across many industrial sectors. This contribution discusses the mechanisms of NOx formation, emphasizing thermal and fuel-related pathways during combustion processes, and strategies for NOx reduction. These encompass both primary and secondary measures. Primary measures target the optimization of combustion parameters to minimize the formation of thermal NOx, whereas secondary measures involve advanced technologies such as Selective Catalytic Reduction (SCR) for effective NOx and particulate matter abatement. In response to the need for effective NOx and particulate matter (PM) abatement, DAS EE has developed a novel stand-alone solution, TSUGA. This innovative product incorporates Selective Catalytic Reduction (SCR) with ammonia for NOx reduction and a membrane filter for particulate matter removal. SCR-DeNOx technology has emerged as a leading solution due to its capability to convert nitrogen oxides into harmless nitrogen and water vapor through catalytic reaction with ammonia or urea. This technology not only reduces NOx emissions but also addresses particulate matter, making it a versatile tool in emission control strategies. Combustion control strategies are also discussed in detail, highlighting their role in mitigating thermal NOx formation by adjusting combustion conditions. Ongoing research continues to refine these approaches, aiming for greater efficiency and broader applicability across diverse industrial processes. Ultimately, the implementation of these strategies is crucial for minimizing environmental impact while ensuring compliance with evolving regulatory frameworks worldwide.

Biography
Dr. Guy Davies is Chief Business Development Officer and a member of the Management Board of DAS Environmental Expert GmbH. He joined DAS in 2011 and has since focused on the company's strategies for product development, innovation management and internationalization.

Virtual twin experiences for sustainability in semiconductor ecosystem

Rei, Manuel
Semiconductor Industry Solution Experience Director
Dassault Systèmes

Abstract
Semiconductor devices are becoming smaller and more complex in design, playing a crucial role in the advancement of various technologies. These devices are essential in every industry, including defense, healthcare, computing, communication, automotive, and energy. The design and simulation of such devices are not only complex but also time-consuming and costly. As we are moving ahead with “More than Moore”, semiconductor manufacturing is getting highly complex. The materials used during the manufacturing process, such as silicon, requires extensive extraction and purification processes. Traditional way of manufacturing and packaging are unsustainable, as it depletes natural resources and amplifies the industry's environmental impact. With latest trend of 3D integration and chiplets, industries are trying to lower such impact. Foundries are exploring different ways of sustainable and energy-efficient production methodologies. The main sources of emissions from semiconductor foundries arise from the energy needed to operate their extensive production facilities. Factories, which account for about 80% of semiconductor manufacturing emissions, significantly influence their greenhouse gas profiles. These emissions primarily come from tooling, which includes hundreds of production tools like lithographic equipment, ion implanters, and high-temperature furnaces. Moreover, cleanrooms that require precise climate and humidity control, along with gas abatement facilities, waste pumps, water chillers, and water purification systems, also contribute substantially to the emissions¹.In this paper, we would like to present our virtual twin approach, which leads us in finding more sustainable solutions for such issues. Virtual twin can help realizing different techniques to reduce the industry's carbon footprint, minimizing waste, and creating processes that align with green technology principles. We provide different virtual twin experiences from equipment, process to clean room, which helps not only in reaching sustainability goal but also helps in training future task force virtually. In this talk, we will present how virtual twin pave the way towards a better ecosystem, which helps to analysis, and evaluate everything in prior and how our virtual twin solutions fill the gap for design and operations agility and resilience.¹ (Source: McKinsey & Company)

Biography
Manuel joined Dassault Systèmes in 1986 and has over 35+ years of experience supporting high-tech and automotive global companies, including relocations in South Korea and USA for the deployment of Dassault Systèmes solutions within Samsung Electronics, LG Electronics and IBM hardware divisions. He leads High Performance Semiconductor Industry Solution Experience, leveraging virtual twins to turn semiconductor complexity into business profitability , and deployed at customers such as NXP, Broadcom, Samsung Electronics, Qualcomm and STMicroelectronics.

The EU Semiconductor Strategy: Adapting to a Changing Geopolitical Landscape

Saint-Martin, Léo
Partner
DECISION Etudes & Conseil

Abstract
Léo will offer a comprehensive retrospective on the evolution of the global geopolitical landscape since the early 2010s and its impact on the semiconductor ecosystem. This analysis will focus particularly on how export control regulations have shaped the industry. Additionally, Léo will explore the evolution of the EU's industrial policy in response to these changes.Looking forward, Léo will outline the EU's strategic roadmap to address its strategic dependencies and identify key industrial opportunities in alignment with a potential "Chips Act 2.0."In conclusion, Léo will examine potential future geopolitical scenarios and assess their implications for the EU semiconductor industry.

Biography
Léo Saint-Martin is partner at DECISION Etudes & Conseil. Léo joined DECISION in 2016 to manage a team of economists and bring his expertise in market research and economic analysis in the fields of electronics components and systems.Léo is the project manager of the economic analysis of the semiconductor industry within the ICOS project (International Cooperation On Semiconductors) since 2023 on behalf of DECISION.Léo is also the project manager of the ECSA project (Microelectronics Training, Industry and Skills) and of the European Chips Skills Academy project since 2019 on behalf of DECISION. DECISION is in charge of the skills monitoring and of the quantification of the European talent gap within these projects which will run until 2027.Léo has also been the manager and the main redactor of studies made by DECISION for the European Commission, French government bodies, industry associations and industrials on topics related to the semiconductor value-chain, the electronics value-chain and end-user industries (automotive, defense & security, industrial & robotics, cloud computing…).Before joining DECISION Etudes & Conseil, Léo has conducted a number of theoretical and empirical research projects in economics and statistics focusing on local and international development issues.Léo holds a master’s degree in economics from Paris-Dauphine University, a bachelor's degree in economics and law from Paris Ouest Nanterre-La Défense University and an advanced certificate in corporate finance from HEC Paris.

Cathodoluminescence analysis of wide-bandgap semiconductors for power electronics

Coenen, Toon
VP Business Development Materials
Delmic B.V.

Abstract
Power electronic devices have diversified over the last years, where devices based on novel wide-bandgap materials such as GaN and SiC with superior electrical and thermal characteristics have emerged. Further along the horizon other materials with even wider bandgap such as Ga₂0₃ , Diamond, and AlN are being considered and studied for power electronics applications. As these new materials become more mainstream a better understanding of their growth/epitaxy, processing and defect structure is needed in order to have reliable performance in power devices. This requires a proper view of material properties at the nanoscale where materials variations and defects manifest themselves. Spatially-resolved cathodoluminescence (CL) imaging, in which the electron-beam-induced radiation is collected inside an electron microscope, is a techniques that holds great potential for nanoscale semiconductor materials analysis. The luminescence that is emitted from these semiconductor materials carry a signature of the electronic properties which can be used for characterization. The electron beam can locally excite the material with < 50 nm resolution and it can easily supply the required energy to excite (ultra) wide-bandgap semiconductors making it an ideal nanoscale probe. Here, we will present the latest developments in Cathodoluminescence for power applications. In particular, we will describe how CL can be used for fundamental research/R&D and for specific front-end manufacturing steps, with a particular emphasis on epitaxy. We will demonstrate some of the latest results on GaN and SiC in terms of defect analysis/quantification such as the imaging and compositional analysis of AlGaN in high-electron mobility transistors. We will connect this to some of the latest developments in CL imaging such as time-resolved CL imaging and demonstrate how this could impact the analysis of power semiconductors. We will describe our latest work on creating stable, reliable, high-resolution CL imaging while reaching time-resolutions of <100 ps, needed for wide bandgap materials analysis given their short excited state lifetimes. Our approach is based on a ultrafast blanking system in a scanning electron microscope which is connected to ultrafast CL detection using single-photon detectors as well as a state-of-the-art streak camera system.

Biography
Toon Coenen studied chemistry and physics at Utrecht University where he obtained an MSc degree in 2010. He continued for a PhD at the NWO Institute AMOLF in Amsterdam, the Netherlands, in Professor Albert Polman’s group. There he co-developed the first version of the SPARC cathodoluminescence (CL) detection system and used it to investigate the nanoscale optical properties of nanophotonic systems. During his PhD he also was a visiting scientist at Stanford University in the group of Professor Mark Brongersma. Then he moved to Delmic, a Dutch tech company specialized in integrated optical/electron microscopy solutions such as Cathodoluminescence microscopy. There he first worked as an application specialist and product manager, and director of Materials Science further developing the CL technology, including developments in time-and angle-resolved CL microscopy. Currently, he is VP Business development for the Materials Science division at Delmic, where he is responsible for the strategic roadmap and business development for semiconductor applications of cathodoluminescence, focusing on the analysis of next generation compound semiconductor devices for photonics, displays, RF, and power electronics applications.LinkedIn: nl.linkedin.com/pub/toon-coenen/27/133/46b/Google scholar account: http://scholar.google.nl/citations?user=N3z1wh8AAAAJResearchGate: https://www.researchgate.net/profile/Toon_Coenen

Embracing the Paradigm Shift - Addressing Value Chain Challenges in a new Landscape

Frenkel, Barbara
Member of the Executive Board Purchase
Dr. Ing. h.c. F. Porsche AG

Abstract
Barbara Frenkel reflects on the forecasts she made regarding the collaboration with the semiconductor industry at SEMICON Europa 2022. She addresses the developments that have taken place globally in the automotive industry since then. Furthermore, she discusses new challenges arising from the transformation to e-mobility and the emergence of new regulations for the automotive sector.

Biography
1963 Born in Hof (Saale), Germany1982 A-Level Certificate of education (Abitur) in Hof 1982 Studies in chemistry at Bayreuth University and rubber technology at Hannover University1984 Various posts in development, production, sales and quality assurance, Helsa-Werke, Gefrees1997 Quality Auditor, Valeo Thermal Systems, Rodach1999 Manager Supplier Development Europe, TRW Automotive, Alfdorf2001 Head of Quality Systems and Methods of Dr. Ing. h.c. F. Porsche AG2006 Head of Central Training of Dr. Ing. h.c. F. Porsche AG2013 Head of Sales Network Management & Development of Dr. Ing. h.c. F. Porsche AG 2017 Head of Region Europe of Dr. Ing. h.c. F. Porsche AG2019 Member of the Supervisory Board of Dr. Ing. h.c. F. Porsche AG2021 Member of the Executive Board Purchases of Dr. Ing. h.c. F. Porsche AG

New Approaches and Innovations to Improve Effective Use of Vacuum Assets in Cleanroom and SubFab​

Johnson​, Paul
Chief Architect​
Edwards Vacuum

Abstract
Edwards is developing new technology solutions and business models to minimize risk and uncertainty from maintenance events on process-critical vacuum assets. We are already successfully deploying our domain knowledge with on-prem AI solutions, enhancing tool uptime and efficiency, UD prevention and MTBS extension, and identification of wider vacuum infrastructure issues. ​​Building on this, we are developing a long-term easily scalable approach to data capture and analysis. This is driven by several innovations including cloud-based technologies addressing data volume, AI scope and accuracy, and a flexible document-based data store, to allow easy extension to additional data sets.​​We have also developed a Wi-Fi solution to the first-mile equipment connection problem, allowing for economically viable data collection and analytics will that benefit many fabs. ​​Together with portable data analytics tools it will accelerate demonstration of AI solutions to process issues, and subsequent deployment at scale for all fabs. In the presentation we will discuss these current and new approaches and technologies, illustrated with relevant case studies.​

Biography
Name : MR.Paul Johnson​Job Title: Chief Architect​Department: Business Transformation, Semiconductor Service​Education: ​Bachelor of Engineering degree in Electrical & Electronic Engineering, University of Sunderland​Experience:​Paul joined Edwards Vacuum in 2023, he is focused on building new software tools to aid predictive maintenance within the vacuum & abatement space. ​He started his career in Semiconductors in 1993 at Fujitsu Microelectronics, before moving to Applied Materials in 2000, working in a range of increasingly senior roles in Field Service. ​He then joined Netflix in 2010 as Director of Engineering where he oversaw software development including various projects using Artificial Intelligence to predict failures. ​He is now bringing this experience with Artificial Intelligence and big data systems to semiconductor manufacturing. ​

Challenges in Scaling SiC Power Chip Manufacturing: A Material Supplier's Perspective

Puttock, Mark
Sr. Director - Advanced Technology Engagements, Office of CTO
Entegris GmbH

Abstract
The era of SiC-based power chips has undeniably begun. Factories are producing substrates and chips to meet current demand, but given that these chips aim to improve end-use efficiency, is the manufacturing process of SiC chips itself running efficiently?The answer is, not yet. But that should not be surprizing as high volumes have not been running for long enough for teething problems to be solved. Here we will touch on some of the areas where SiC material properties present the chip makers with challenges. These challenges are at varying levels of resolution and will no doubt be solved in time. This resolution will enable SiC power chips to take its predicted place in the future eco system.Our examples shown are based on Entegris's view which is determined by our particular contact points. So, this may not be an exhaustive list. What we see are challenges relating to:1. CMP (Chemical Mechanical Planarization): SiC is harder than Si.2. Handling: SiC is more brittle than Si.3. Implantation: SiC is more difficult to implant than Si.4. Thermal processing for wafer growing and epi processes: SiC processes are hotter than Si.For each of these areas, we will provide insights and considerations, highlighting the path toward achieving efficient, high-volume SiC power chip manufacturing.

Biography
Mark has worked in the semiconductor industry for over 30 years with a background in Physics and Plasma processing. From 2014, as a team member of the Entegris CTO office, Mark follows technology trends and collaborates with Entegris’ global product development teams to develop timely and differentiated new materials and components for the world’s leading semiconductor manufacturers.

Nano-analysis of optoelectronic materials in structured semiconductors

Bonino, Valentina
Beamline scientist
ESRF

Abstract
Under the impulse of device miniaturization, the size of the active area of devices have been reduced to the micro and sub-micrometric scale. The synthesis of finely tunable structures with defined properties at the nanoscale level becomes therefore fundamental. In this context, some examples of synchrotron characterization will be given to showcase the capabilities of the nanoprobe beamline ID16B of the European synchrotron - ESRF. Examples will mainly focus on the characterization of the composition and the optical properties and their correlation in GeSn and III/V semiconductors materials.In infrared emitters based on Ge_1−xSn_x micro-disks with Sn concentrations up to 16.9% no metal segregation was observed by annealing at temperatures as high as 400 °C for 20 min, as it was the case for the reference blanket layer. This study demonstrated how microstructuring offer a solution to the instability of high Sn concentration Ge_1−xSn_x layers [1]. This approach enables the use of thermal annealing processes to improve the properties of this alloy. The origin of the optical emission was investigated in multi-quantum well core/shell nanowires of III-V semiconductors [2]. Two emissions peak at about 2.7 and 3.0 eV were shown to be related respectively to lateral facets and to the interphase with the top facets. Fast recombination rates below 400 ps were observed, revealing possible applications for fast on−off operation in light-emitting diodes (LEDs).These studies highlight the potential of multimodal characterization of semiconducting materials for next-generation nano-optoelectronics.[1] V. Bonino, ACS Appl. Mater. Interfaces 2022, 14, 22270−22277[2] J. Segura-Ruiz , Nano Lett. 2021, 21, 9494−9501

Biography
Valentina Bonino received her Ph.D. from the University of Torino, Italy, on the effect of X-ray radiation on cuprates and oxides. After, she worked as Postdoc in the same project, focusing on the thermal effects induced in the time and the space domains. Currently, she is beamline scientist at the nano-analysis beamline ID16B of the European Synchrotron Radiation Facility. She works in the domain of material science and she is interested in the optical properties of semiconductors having related compositional and/or structural non-homogeneities.

From Full Product to Nanometers: Risks and Mitigations of Hardware-Based Attacks

Courbon, Franck
CEO
Ethicronics

Abstract
The semiconductor industry is the backbone of modern electronics, but it faces unique challenges in cybersecurity. With increasing complexities in semiconductor design and manufacturing, the risks posed for instance by counterfeit, compromised or not secure hardware are greater than ever. This is especially true for fabless companies operating in sectors like defence, telecoms, aerospace, automotive, critical infrastructure and consumer electronics. This talk will present some practical attacks, highlight the need of a scalable solution for electronics hardware assurance and present the journey of Ethicronics to bring one of the missing puzzle piece for digital security - hardware assurance at scale.

Biography
Franco-British Dr Franck Courbon graduated from 3 Masters in 2011/2012 (Glasgow University MPhil., INSA Lyon MRes., Saint-Etienne University MEng.) and a PhD. in 2015 in microelectronics/hardware security from the School of Mines of Saint-Etienne).Franck spent 3.5 years at Gemalto Security Labs (now Thales-DIS where he undertook his MRes/Meng project and PhD.) working on image processing, laser fault attacks and hardware reverse engineering. From 2015 to 2022, Franck worked at the University of Cambridge (Postdoc, Fellowship, EPSRC IAA project leader) on electronics low level reverse engineering, memory content extraction, laser fault attacks and supply chain security.Franck has 100% publication success rate, has supervised more than 120 University of Cambridge Computer Science and Engineering students and mentored/lectured dozens of Cambridge Judge Business School students. Last but not least, Franck introduced to +1000 13 to 16years old Cambridgeshire students the world of hardware-based cybersecurity, opportunities with starting a company, chances of doing long studies and working in electronics/cybersecurity no matter their starting poing, current grades and differences. Franck is Founder & CEO of Ethicronics (Central Cambridge, UK, 06/2022) -full time since November 2022. Ethicronics specialises in scalable software solutions to address complex electronics hardware security challenges. The company develops a tamper-proof, transparent, ready-to-use software that eliminates counterfeit and compromised electronics hardware.This is particularly vital for fabless companies in sectors including Defence, Telecoms, Aerospace, Automotive, Critical Infrastructure, and Consumer Electronics. Part of an InnovateUK Semiconductor Delegation in Switzerland and Germany made of some of the most ambitious innovative UK Businesses, Ethicronics -with value co-creation in mind, is looking for leading scientific institutions, semiconductors players, fabless companies and cybersecurity authorities to explore partnerships opportunities.Franck has brought together key grant funding, skilled and impact-driven team, unique technology and world-leading partners. The Cambridge-based company has been supported by Cambridge Accelerate, NCSC for Startups, Defence And Security Accelerator (DASA)/Thales, and Innovate UK (including a £2.5M UK/APAC collaborative project), Ethicronics is a 2024 finalist in multiple prestigious awards (Infosecurity Europe, NATO, IET, Cambridge Independent Technology and Science Awards) and received the 2024 Business Weekly Graduate Business of the Year Award, positioning itself as a world leader in hardware assurance.

Attracting Diverse Talent to the Microelectronics Industry

Maguire, Nessa
CEO
EudaOrg

Abstract
Not applicable

Biography
Nessa is the CEO of EudaOrg. Nessa holds a Masters in Applied Positive Psychology and Coaching Psychology, with a strong research interest in building inclusive cultures. A published researcher, Nessa has fifteen years international experience advising private companies and government bodies in supporting diverse needs across education and the private sector. EudaOrg was established in 2021 by psychologists and experts in organisational change Nessa Maguire and Allison Kuschel, to provide technology and advisory services in diversity, equity, and inclusion to commercial companies and sectoral bodies.

The Chips Act and Europe’s Path to a Stronger, Resilient Semiconductor Ecosystem

Kalbe, Gustav
Acting Director of DG Connect C, Digital Excellence and Science Infrastructure
European Innovation Council

Abstract
Coming Soon

Biography
DG Communications Networks, Content and Technology, European Commission, Acting Director of DG Connect C “Digital Excellence and Science Infrastructure” and Head of Unit of the High Performance Computing and Quantum Technology unitDr. Gustav Kalbe studied Applied Physics at the Université Catholique de Louvain, Belgium. In 1991 he studied Applied Optics at the Imperial College of Science in London. In 1995 he completed his studies and earned a PhD in Physics at the Université Catholique de Louvain, Belgium.He started his professional career as a project manager in photonic networks at the incumbent telecom operator in Belgium. He was R&D manager when he left the company.In 1998 he joined the Directorate General Information Society & Media of the European Commission where he started working as Project Officer managing research projects of the European Framework Programs for Research. Over the years he had several assignments in quantum technologies, photonics, and cybersecurity.In 2014 Gustav Kalbe became Head of Unit for Administration & Finance in the European Commission, in Directorate General Communications Networks, Content and Technology.In 2016 he was appointed Head of Unit of the newly created High Performance Computing and Quantum Technology unit in Directorate General Communications Networks, Content and Technology.In 2018 he became responsible for the establishment and operation of the European High Performance Computing Joint Undertaking. He occupied the post of Interim Executive Director of the Joint Undertaking until its autonomy by the end of 2020.In January 2021, he was appointed Deputy to the Director of DG Connect C “Digital Excellence and Science Infrastructure”.Since May 2022 Gustav is the Acting Director of DG Connect C “Digital Excellence and Science Infrastructure”.

Session Chair

Dielacher, Bernd
Business Development Manager
EV Group

Abstract
Session Chair

Biography
Dr. Bernd Dielacher is business development manager at EV Group (EVG) where he evaluates global market trends and develops growth opportunities for EVG's bonding, lithography and nanoimprint businesses with a particular focus on the MEMS, biomedical technology and power device market.Bernd holds a master’s degree in Microelectronics from Vienna University of Technology and received a PhD in Biomedical Engineering from ETH Zurich.

Latest innovations in MEMS wafer bonding

Uhrmann, Thomas
Director Business Development
EV Group

Abstract
MEMS and sensors play a crucial role in many of today´s applications. As their complexity and integration continues to increase, innovative manufacturing technologies become essential to fulfil the requirements of next-generation applications. Wafer bonding is a key technology for MEMS and sensors encapsulation but also for advances in system integration. This presentation will discuss the latest developments in high-vacuum oxide-free wafer bonding, a technology that enables not only conductive bond interfaces but is also well suited for heterogenous material integration at low- or even room-temperature. In addition, recent innovations in high-volume 300 mm MEMS wafer bonding will be highlighted in this talk.

Biography
Dr. Thomas Uhrmann is director of business development at EV Group (EVG) where he is responsible for overseeing all aspects of EVG’s worldwide business development. Specifically, he is focused on 3D integration, MEMS, LEDs and a number of emerging markets. Prior to this role, Uhrmann was business development manager for 3D and Advanced Packaging as well as Compound Semiconductors and Si-based Power Devices at EV Group. He holds an engineering degree in mechatronics from the University of Applied Sciences in Regensburg and a PhD in semiconductor physics from Vienna University of Technology.

Challenges of new chiplet integration – how organic interposers challenge BEOL equipment

Brandl, Elisabeth
Business Development Manager
EVG

Abstract
The innovations of chiplet integrations took interesting turns in the last few years as this platform promises high performance application system at low-cost and faster-to market solution in comparison to SoC integration. Several approaches for the modular chiplet implementation have been introduced, where performance requirements, cost considerations and scalability need differ. Although the chiplet integration on Si interposers is a very important technology, a trend towards the utilization of organic materials, for example in high density build up organic substrates can be observed.As in all advanced packaging technologies, form factor is crucial. Temporary bonding offers support for organic interposers during thinning to reduce the formfactor in z-direction and allow for better heat management as these organic interposers have limited heat dissipation capability.Already established chiplet packaging technologies like chip-first or RDL first FoWLP are still facing the manufacturing challenge of high warped wafers originating in the CTE difference of chiplets and mold. This challenge is also valid for high density build up organic substrates and needs to be addressed. There are two major approaches for handling high warpage wafers. Either the wafers are forced flat, which works with thinner, flexible organic wafers or the equipment must comply with the wafer warpage. The later approach is used with thick and stiff wafers and is linked to a higher process complexity. We will show the manufacturing considerations of each warpage handling approach with their advantages and challenges in respect to the temporary bonding, debonding and further downstream processes with process and equipment compatibility.In this presentation, we will also give a short overview on the different chiplet integration platforms with their advantages and challenges. In more detail the integration of organic materials as in RDL/ organic interposers will be shown and the equipment challenges, especially wafer warpage in temporary bonding and debonding equipment and possible solutions will be introduced.

Biography
Elisabeth Brandl is business development manager at EV Group for temporary bonding and metrology. She holds a Master degree (DI) in technical physics from the Johannes Kepler University Linz specialized on nanoscience and - technology.Since 10 years she works at EVG and was, amongst other topics responsible for the UV laser debonding launch. She published several articles and papers in the field of temporary bonding and metrology.

Sharper scans, faster ramp up

Hållstedt, Julius
Head of Segment - Semi and Electronics
Excillum

Abstract
High-density interconnects. Micron-scale solder bumps. Sub-micron defects. As semiconductor architecture grows more complex with 3D heterogenous integration and ever decreasing dimensions, critical reliability issues arise with smaller defects. To achieve faster ramp-up with better yield, the next generation of inspection tools need to be faster with a major increase in 3D imaging resolution down to sub-micron level. Whether the aim is to understand failure mechanisms, improve design or increase yield in next-generation 3D heterogenous integration, a new era of nanoscale technologies demands a leap forward in nano-CT and laminography resolution. In this communication we will show how the Excillum NanoTube N3 x-ray source enables the X-ray path forward for advanced packaging metrology.

Biography
Julius Hållstedt has since 2009 worked in global deep/high tech companies with development, implementation and market introduction of various X-ray analysis solutions for both research and industrial applications.He is currently the head of segment for semiconductor and electronics at Excillum, with the main focus on addressing the metrology challenge the industry is facing due to the increased complexity with smaller dimensions, increased dense packing and 3-dimensional structures causing many existing measurement techniques to run out of steam.Excillum based in Kista, Sweden develops and manufactures the world's most advanced X-ray sources based on unique technology originally developed by researchers at KTH and Julius' main task now is to create business and partner collaborations with global players to implement Excillum's solutions in the leading electronics and semi R&D and manufacturing sites around in the world.Julius Hållstedt obtained his Masters of Science degree in materials science in 2002 and his doctorate in solid state electronics in 2007 from the Royal Institute of Technology (KTH), Stockholm.

Electrically Tunable Dual-Band VIS/SWIR Imaging and Sensing

Ballabio, Andrea
CEO
EYE4NIR

Abstract
Short-wave infrared (SWIR) imaging and sensing sees an increase in commercial interest, given the wide range of use cases that are possible to implement, from automotive, to industrial automation, agri-food and many more. Silicon has an absorption cut-off at 1100nm in wavelength, therefore to detect SWIR other materials are needed. Germanium given its direct band gap of 0,8eV is a suitable material to be used to detect SWIR, however to exploit lower cost and potential scalability, epitaxial Ge-on-Si is considered to be used in devices. Ge-on-Si photodiodes have been firstly reported more than twenty years ago opening the way for the integration of IR photodetectors on Si. A tremendous development has been done, moving from vertically illuminated, stand-alone devices, to waveguide integrated arrays of photodetectors and CMOS integrated imagers. Usually, the Ge epilayer act as the absorbing material for the SWIR radiation, while Si acts only as a substrate. Here we report on a dual-band Ge-on-Si photodetector where light detection can take place both within the Ge epilayer and the underlying Si substrate: the device responsivity can thus be tuned from the VIS to the SWIR spectral range by means of an external bias. This principle of operation has been transferred into a CMOS process in order to fabricate CMOS image sensor, capable of detecting selectively visible and SWIR light. Sensing applications are also where the device was used to discriminate among different chemicals and plastics by exploiting the device spectral response in the two bands and the specific absorption spectra of the materials.

Biography
Andrea Ballabio graduated cum Laude in M. Sc. in Material Sciences (2014) at the University of Milano-Bicocca. He received his Ph.D. in Physics cum Laude (2018) from Politecnico di Milano working on optoelectronic and photonic applications. He as been a post-doc fellow at the Politecnico di Milano working on the growth and morphological characterization of germanium single-photon devices for SWIR applications. In 2021 co-founded EYE4NIR, where he is currently the CEO, with the aim to develop Ge based SWIR image sensors for the automotive and industrial markets.

Accelerating Your Journey to the Autonomous Fab: Opportunities and Pitfalls

Potter, Jamie
CEO & Cofounder
Flexciton

Abstract
In today’s rapidly evolving semiconductor industry, the pursuit of an autonomous fab is more pertinent than ever. Envision a fully optimised operation that maximises the output of sellable wafers at optimal cost levels—with minimal manual intervention. This is an agile, adaptable fab capable of swiftly responding to market fluctuations: ramping up throughput during high demand and scaling back to minimise costs during downturns.In this presentation, Jamie Potter, CEO of Flexciton, will share strategic pathways to accelerate your journey toward achieving this vision. For the first time, he will reveal exclusive insights from Flexciton’s “2024 Front-End Fab Insights: Autonomous Technology Adoption” survey, highlighting the current state of adoption, key barriers, and significant opportunities ahead. Attendees will discover new perspectives on leveraging smart manufacturing technologies to transform operations and drive competitive advantage in the semiconductor landscape.

Biography
Jamie is passionate about solving the hardest industrial problems. For the past 10 years, he has been developing optimisation solutions for various sectors, with a focus on semiconductor manufacturing. As an entrepreneur at heart, after spending a few years working in an industrial consultancy, Jamie co-founded Flexciton in 2016. He was initially directly involved in developing and implementing the first release of Flexciton scheduling software at the Seagate Springtown wafer fab. Along with his role as the company CEO, Jamie leads the commercial and operations teams. Over the past 7 years, Jamie has worked on over a dozen operational improvement projects with various semiconductor manufacturers. Jamie is a smart manufacturing enthusiast with an ambition to bring new technology to the semiconductor industry to enable new levels of efficiency.Jamie has graduated with honours in MMath from Oxford University, UK. In 2018 he was featured in Forbes' “30 under 30 list”.

Topic Coming Soon

Kutter, Christoph
Director of Fraunhofer EMFT
Fraunhofer EMFT

Abstract
Coming Soon

Biography
Christoph Kutter is director of Fraunhofer EMFT, an institute of the Research Fab Microelectronics Germany (FMD), of which he is currently co-spokesperson. He also holds a professorship specializing in solid-state technologies at the University of the Federal Armed Forces in Munich. His focus at Fraunhofer EMFT is on silicon technologies, MEMS, flexible electronics, biosystem integration and heterogeneous integration of various solid-state technologies.Christoph Kutter is currently Vice President of the VDE (Association for Electrical, Electronic & Information Technologies), a member of acatech (National Academy of Science and Engineering) and the BBAW (Berlin-Brandenburg Academy of Sciences BBAW).From 1995 to 2012, Christoph Kutter held various management positions at Infineon Technologies AG and Siemens AG, including Head of Communications Product Development, Head of Chip Card Development and Head of Central Research. Christoph Kutter was responsible for several central improvement projects to increase efficiency in research and development as well as for the management of the company-wide innovation initiative.From 1990 to 1995, Christoph Kutter worked as a research assistant at the High Magnetic Field Laboratory (Max Planck Institute for Solid State Physics) in Grenoble, France.Christoph Kutter received his Dipl. Phys. from the Technical University of Munich and his Dr. rer. nat. from the University of Constance in 1995.

From Advanced Silicon Carbide to Ultra-Wide Bandgap Devices: A Research Perspective

Jank, Michael
Head of Department
Fraunhofer IISB

Abstract
The talk will review recent research activities on Silicon Carbide (SiC) MOSFETs and give an outlook on the novel ultra-wide bandgap materials Aluminum Nitride (AlN) and Gallium Oxide (Ga₂O₃).The reduction of resistive components is a first order measure for improvement of power switches. Whereas in medium to high voltage SiC devices (i.e. > approx. 2 kV) the drift region plays a dominant role with respect to static losses, contact and channel optimization are in the focus for lower voltage classes. Recent architectural approaches towards low resistivity SiC devices, including 3-dimensional channel arrangements as well as super-junction structures for high-blocking voltage, low resistivity drift regions will be discussed.Based on its long-standing expertise in nitride materials, Fraunhofer IISB pioneered the PVT growth of AlN crystals and is able to provide up to 40 mm epi-ready wafers to its research partners. A Pilot Line value chain leading to the successful preparation of 2.2 kV AlN/GaN high electron mobility transistors (HEMTs) with superior power density was established in a national research cooperation.The presentation will conclude with an outlook involving materials properties and related device architectures.

Biography
Michael Jank earned a PhD in electrical engineering, electronics and information technology from Friedrich-Alexander University of Erlangen, Germany, in 2006. After his dissertation on simplified CMOS integration concepts, he established a research group for novel thin-film materials, processing and devices for systems on flex and display applications at Fraunhofer IISB. Since 2023 he is responsible for IISB’s R&D activities into Semiconductor Devices and Processes, focusing on discrete and integrated Silicon Carbide power electronics.

What measures is the semiconductor industry taking to replace PFAS in production processes?

Kircher, Marco
Scientific Employee, Clean Room Sustainability Mangager
Fraunhofer IPMS

Abstract
No microelectronics without PFAS! This has been true for 50 years, but emerging regulation, impulses from industry and the existing environmental risks require rapid and effective action from science and the microelectronics industry. What measures are currently being taken in the research field to develop alternatives. We will give a broad overview of various solutions from lithography to passivation and etching, covering almost the entire manufacturing process of microelectronics.

Biography
Marco Kircher has almost a decade of experience in MEMS development at Fraunhofer IPMS and completed a degree in electrical engineering with focus on biomedical engineering at TUD. He specializes in innovative ultrasonic sensors for medical applications and participates to various industry and EU projects, including e.g. the projects Position II and ThrombUS. His work in the production of MEMS has provided deep insights into process development, now applied to make microelectronics manufacturing process more environmentally friendly. Within the »Green ICT @ FMD« project, Marco is leading all developments in resource-optimized microelectronics and MEMS-production, bundling the know-how in the Research Fab Microelectronics Germany.

Future of Energy-Efficient Compute

Gupta, Gaurav
VP Analyst
Gartner

Abstract
Current compute paradigms are constrained in power-performance efficiency to support rising AI and generative AI applications, further straining energy requirements. This presentation will discuss upcoming disruptions have the potential to disrupt the future of compute so product leaders must prioritize innovation and change.

Biography
Dr. Gaurav Gupta is a VP Analyst in the Emerging Trends and Technologies team. Dr. Gupta's research areas include semiconductor manufacturing process, chip design trends, AI analytics in chip manufacturing, semiconductor equipment spending, and chip industry economics and supply chain. Dr. Gupta also covers emerging areas, such as autonomous vehicles, Quantum Computing, and future of energy-efficient compute.Prior to joining Gartner, Dr. Gupta worked as a Knowledge Expert at McKinsey & Co. where he advised clients across the globe in the semiconductor and electronics industry with a focus on business transformation (cost, operations, and growth) and product strategy (launch/development/planning). He has a strong technical background in the semiconductor industry in process, yield, R&D, and integration, having worked at Intel, IBM and GlobalFoundries prior to the stint with McKinsey & Co.

Closing the Loop: A Circular Economy for the Semiconductor Industry

Thompson, George
Director, Semiconductor Supply Chain
Genpact

Abstract
The semiconductor industry, a cornerstone of modern technology, faces mounting environmental challenges due to its traditional linear model of production, consumption, and disposal. This presentation explores the transformative potential of circular economy principles within the semiconductor sector, focusing on resource recovery, product life extension, and responsible end-of-life management.Our discussion will encompass three critical areas:1. Strategic implementation of take-back programs and refurbishment initiatives2. Navigating the complex transition from linear to circular business models3. The pivotal role of policy frameworks and industry collaboration in accelerating circularityThrough an examination of real-world use cases, we will highlight how industry leaders are successfully integrating circular principles into their semiconductor operations. These examples will illustrate both the challenges and the tangible benefits of adopting circular practices.The presentation will conclude with an analysis of key obstacles and opportunities for widespread adoption of circular economy principles across the semiconductor industry. We will explore how this paradigm shift could not only mitigate environmental impact but also drive innovation and create new value streams within the sector.By addressing these crucial aspects, this talk aims to provide a comprehensive overview of the circular economy's potential to revolutionize the semiconductor industry, offering insights valuable to industry professionals, policymakers, and researchers alike.

Biography
George Thompson is part of the Semiconductor and Hi-Tech team in Genpact’s Supply Chain Service Line. George and team are focused on helping clients achieve breakthrough results in their supply chain performance. Prior to joining Genpact in 2022, George held several supply chain positions at GlobalFoundries and IBM. George has a passion for leveraging digital innovations to improve results and reduce effort for teams.

Half-bridge GaN by Fan-out Panel Level Packaging

Tang, Qingyuan
Vice General Manager
Guangdong Fenghua Semiconductor Technology Co., Ltd.

Abstract
Gallium nitride (GaN) power devices have been widely used in the fields of fast charging with their high voltage and high frequency performance. However, high-power industrial applications such as motor control and inverters have still not been developed. Fan-out panel level packaging (FOPLP) is an attractive packaging technology which brings many benefits, such as low inductance, thin package height, and ease for multi-die integration. In order to give full play to the advantages of GaN power devices and expand the application of GaN in other aspects, it is important to improve the power density, reduce the parasitic inductance, and reliability of the packages.In this paper, Silicon (Si) chips and GaN field-effect transistors (FETs) were integrated into a quad flat no lead (QFN) package. The GaN FETs and Si chips were interconnected through re-distribution layer (RDL) Cu plating process and formed a half-bridge GaN module. Chip positioning, RDL layout and warpage behavior were optimized by package stress simulation. Thermal performance of different designs was studied by finite element analysis (FEA) tools. One watt heat dissipation was applied on the GaN chip to simulate package heat performance, and balancing of the heat dissipation was optimized by RDL design. In addition, thermal stress was optimized as well based on the Von Mises stress analysis on bumping area. Warpage and package stress on chips were minimized by tuning the package structure. A suitable Cu thickness was identified with consideration of current carrying capability and heat dissipation. The reliability performances including temperature cycling and high temperature accelerated test (HAST), were evaluated based on Joint Electron Device Engineering Council (JEDEC) requirements.By overcoming the technical challenges faced during the GaN FOPLP process, we successfully fabricated a small GaN half-bridge package with dimensions of 6mm×7mm×0.45 mm. By using only three layers of Cu RDL, the required electrical performance of the device was achieved, and the package warpage (46 micrometers) was controlled to minimize the mechanical stress. 30% of printed circuit board (PCB) area reduction was achieved by compared to the discrete package circuit layout.

Biography
Qingyuan Tang earned his Ph.D. from City University of Hong Kong, P.R. China, in 2011 in Electronic Engineering. After graduated, he worked in Sierra Wireless, Nexperia, and Facebook before for different technical positions. He is now working as a Leader in Guangdong Fenghua Semiconductor Technology Co., Ltd. for R&D management.

Energy-Efficient AI Using Stochastic Magnetic Tunnel Junctions

Alder, Nicolas
Research Assistant
Hasso Plattner Institute

Abstract
(Pseudo)random sampling is a costly and widely used method in AI algorithms. We introduce an energy-efficient algorithm for uniform Float16 sampling, utilizing a room-temperature stochastic magnetic tunnel junction device to generate truly random floating-point numbers. By avoiding expensive symbolic computation and mapping physical phenomena directly to the statistical properties of the floating-point format and uniform distribution, our approach achieves a higher level of energy efficiency.

Biography
Nicolas Alder is a PhD student at the Hasso Plattner Institute, specializing in energy-efficient artificial intelligence. With a strong academic foundation in Data Engineering and Computer Science, Nicolas has been involved in cutting-edge research at the intersection of AI, hardware, and sustainability. He serves as a Research Assistant at the AI and Sustainability Chair and is a part of the MIT-HPI Joint Research Program. Nicolas has also gained industry experience through roles at Volkswagen, the Hasso Plattner Foundation, and BearingPoint, focusing on AI and data science.

Empowering the semiconductor industry with advanced cybersecurity

Lisci, Philipp
Regional Sales Director
HCLTech

Abstract
The presentation on ‘Cybersecurity in the Semiconductor Industry’ by HCLTech highlights the key challenges and solutions for securing semiconductor manufacturing environments. It focuses on vulnerabilities in fab environments, notably those arising from the use of outdated operating systems and legacy ports, which pose significant security risks. The presentation also explores impact of cybersecurity breaches on OEM after-sales services and discusses the evolving regulations from the Bureau of Industry and Security of the U.S. Department of Commerce. HCLTech's approach emphasizes compliance with the latest SEMI security standards, such as E187 and the implementation of DevSecOps practices for cloud applications. It stresses the importance of secure collaboration within the global supply chain and the integration of Digital Rights Management solutions. Furthermore, it outlines HCLTech's holistic cybersecurity services, which includes audits, vulnerability management, incident response and secure software development – tailored to meet the requirements of the European Cyber Resilience Act (CRA).

Biography
Philipp Lisci is an accomplished IT professional with over two decades of experience in the technology sector, specializing in network security, performance management and virtualization solutions. He has made significant contributions at leading organizations such as Palo Alto Networks, Riverbed and VMware, where he played pivotal roles in advancing cybersecurity, optimizing application performance and enabling cloud transformation. Philipp's extensive technical expertise, specifically in cloud security and enterprise networking, has enabled organizations to strengthen their security postures and IT efficiency. Renowned for his leadership and mentoring skills, he is passionate about fostering talent and sharing his knowledge within the IT community. His strategic vision and commitment to innovation continue to drive significant value in the tech industry.

Next-Gen Telecom: Leveraging Advanced Packaging and Compound Semiconductors

Chandrappan, Jayakrishnan
Head of Technology
Head of Technology - Advanced Packaging, Compound Semiconductor Applications Catapult

Abstract
The rapid evolution of telecom networks, driven by the demand for higher data rates, energy efficiency, and enhanced connectivity, necessitates the integration of advanced materials and packaging technologies. Compound semiconductors, such as GaN and SiC, offer superior performance in power efficiency, high-frequency operation, and thermal management, making them ideal for next-generation telecom applications. This presentation explores the role of advanced packaging techniques, including heterogeneous integration and 3D chip stacking, in maximizing the potential of compound semiconductors. We will discuss challenges such as thermal dissipation, interconnect scaling, and signal integrity, and present solutions that leverage novel materials and integration strategies to improve performance, reduce power consumption, and accelerate the deployment of telecom innovations.

Biography
Dr. Jayakrishnan Chandrappan is the Head of Technology - Advanced Packaging at Compound Semiconductor Applications Catapult, UK. He established the packaging facility and team at CSA Catapult, focusing on semiconductor package design, modeling, micro-assembly, and rapid prototyping for NetZero, Future Telecoms, and sensing. Jay also spearheaded the establishment of the Driving Electric Revolution Industrialisation Additive Manufacturing facility for 3D packaging.With over two decades of international experience in the semiconductor industry and industrial research, Jay brings a wealth of expertise spanning semiconductor material engineering, microelectronics, optoelectronics, advanced packaging, and reliability testing. Prior to his tenure at CSA Catapult, he held leadership and technology roles at esteemed organizations including Global Foundries Inc. (US), the Institute of Microelectronics (IME) at A*STAR Singapore, and served as a Scientist in the Ministry of Electronics & Information Technology, Government of India.Jay is also a co-founder of two start-ups and has been honored with Europe’s prestigious Marie Skłodowska-Curie fellowship. He is a recipient of the Royal Society of Chemistry’s Emerging Technology Showcase Award. He is an external advisory board member for the University of Bristol and the University of Leeds in the UK. Additionally, he contributes as a Board of Studies member for Cochin University of Science & Technology (CUSAT) in India. Jay is a valued member of SEMI, the Europe APC committee, and the International Microelectronics Assembly & Packaging Society (IMAPS) UK Chapter.

Driving Sustainability in Semiconductor Packaging

Farbos de Luzan, Pierre
Head of Sustainability, Electronics
Henkel

Abstract
Henkel Adhesive Technologies aims to be the leader in sustainable adhesive solutions for the electronics industry, fostering climate action, circularity, and safety worldwide.Within our wirebond and advanced packaging solutions portfolio, we innovate to reduce greenhouse gas emissions through sustainable use of raw materials and enhanced adhesive efficiency.Moreover, we prioritize responsible chemistry, avoiding or replacing harmful substances to ensure a toxic-free product portfolio that benefits both people and the planet.At the keynote, Pierre Farbos de Luzan, Head of Sustainability at Henkel Electronics, will discuss Henkel's ongoing efforts, solutions, and challenges in promoting sustainability in semiconductor packaging.

Biography
Pierre is the Head of Sustainability for global Electronics business at Henkel, leading the development and implementation of sustainability strategies with the aim to deliver innovative and sustainable solutions for climate action, circularity and safety.Prior to that, he was driving the development of sustainability services for Accenture across APAC, Middle-East and Latin America regions, delivering complex and high-value projects for international clients across strategy, sustainability, supply chain and operations.Pierre holds a bachelor degree from HEC Montreal (Canada) and master degree from ESSEC Business School (France).

Fire Risks & Challenges in Semiconductor Manufacturing Environments

Donaghy, Mark
Business Development Manager
Honeywell

Abstract
The semiconductor manufacturing process taking place inside the Wafer FAB present’s extreme fire risks and challenges on a FAB facility, there are two main building types - manufacturing facilities (FAB & assembly & test and packaging and offices. The manufacturing building is typically a large-volume, high-ceiling structure with intricate and convoluted architecture that does not lend itself to traditional smoke detection, maintenance access for regulatory checks may also not be easy to achieve. Within these complex buildings, there are several functional rooms with their own individual fire risks.Honeywell Building Automation serve’s the Semiconductor market globally through a variety of life safety solutions including :Fire Systems & Sensors - Protect people and premises with leading integrated and networked solutions including voice alarm and emergency lightingAdvance Detection - Proactive early warning detection solutions to overcome specific challenges and keep mission critical semiconductor FAB’s running Software Solutions - Provide software that supports remote-assisted inspection and maintenance, alarm transmission, site monitoring, digital complianceProjects Support - Work directly with end-users, consultants, and system integrators to support the standardization of fully compliant, EU integrated fire systemsOur comprehensive approach to safety can help support increased productivity, performance, and operational uptime.

Biography
Mark Donaghy is an experienced international business development leader currently based in the UK with 13 years’ experience in the areas of automation & robotics, battery manufacturing and fire & life safety. Mark holds a construction Batchelors in construction management and a further degree in leadership & management from the Royal School of Military Engineering. Mark spent 22 years in the British Army (Royal Engineers) deploying on global operations throughout his career in UK Armed Forces. Mark began his second professional journey outside of the military in 2012 and has been a part of the Global automotive industry working for companies such as Porsche Consultancy, KUKA Systems Battery BU, ABB Robotics & Honeywell. Mark is spearheading the business development in Europe for Battery Gigafactory's & Semiconductor manufacturing verticals, supporting clients with life safety solutions strategies & design (fire & gas advanced detection). Mark is also part of a global Building Automation team that provides expertise & guidance in early warning detection solutions to overcome specific challenges and keep mission critical European sites running.

Towards accessible, European hybrid quantum-HPC compute systems

Verberk, Rogier
Director Semicon & Quantum
https://www.tno.nl

Abstract
Quantum Inspire was the first system to demonstrate the feasibility of an all-European, freely accessible quantum computer. Since then it has had improvements in the quantum backend, but it will also be connected to the European network of supercomputers. Through collaborations within QuTech (TNO + Technical University of Delft), on national level (QuantumDeltaNL), and on European level (Flagship, Euro-HPC) we will soon be able to provide the general public the functionality to execute hybrid quantum algorithms using local HPC nodes connected to our quantum backends. This demonstrates how quantum computing gets closer to mainstream technologies and applications.

Biography
Coming Soon

Advancing AI through Advanced Packaging

Kumar, Arvind
Principal RSM and Research Manager, AI Hardware Technologies
IBM

Abstract
The era of generative AI is accompanied by an unprecedented increase in compute, memory, and bandwidth requirements of AI workloads. Chiplet architectures and advanced packaging offer a promising path to meeting these demands through much more tightly integrated compute and memory units, enabling higher compute densities and bandwidths with lower latency and power. Heterogeneous integration coupled with open interface standards can also enable targeted architectures to accelerate specific use cases through co-packaging of diverse chiplets from different sources. I will discuss how IBM’s deep investments in AI and advanced packaging can lead to new opportunities through the emerging chiplet ecosystem.

Biography
Dr. Arvind Kumar is a Principal Researcher at the IBM Research where he leads a team focusing on next generation AI Hardware and heterogeneous integration. He has presented several invited talks and served as a panelist and short-course instructor in this area at major conferences. He holds over 60 patents and is an IBM Master Inventor. Dr. Kumar earned SB, SM, and PhD degrees in Electrical Engineering and Computer Science, all from MIT.

IBM Quantum System One

Riel, Heike
IBM Fellow
IBM Research

Abstract
Coming Soon

Biography
Coming Soon

Advanced packaging industry trends driving the need for new eBeam based metrology and inspection solutions

Schmid, Ralf
General Manager
ICT GmbH - Applied Materials

Abstract
Advanced packaging technologies require new metrology and inspection solutions as conventional systems are challenged. Electron beam based systems which have proven their capabilities in semiconductor and display industries can overcome these challenges. Electron beam solutions for advanced packaging metrology and inspection are presented.

Biography
Ralf Schmid is a physicist and received his PhD in physics from the University of Tübingen working on electron-beam testing in 1996. He continued his work on electron-beam systems for semiconductor and display applications in Siemens, ETEC Systems, and Applied Materials. Since 2013 he is general manager of ICT GmbH, center of excellence for electron beam metrology and inspection technology of Applied Materials.

Welcome and Closing Remarks

Marent, Katrien
EVP & Chief Marketing and Communications Officer
imec

Abstract
No abstract

Biography
Katrien has an engineering degree in microelectronics. She joined imec in 1992 as analog design engineer and specialized in design of low-noise readout electronics for high-energy physics. In 1999, she became press responsible and scientific editor at imec's business development division and was responsible for authoring and editing the research organization's numerous company technical documents and publications. In 2001, she was appointed corporate communications director at imec. Her responsibilities expanded in August 2007, when she got the position of external communications director including corporate, marketing and outreach communications. In October 2016, she became VP corporate, marketing and outreach communication. Since April 2020 she is Executive Vice President & Chief Marketing and Communications Officer and member of the executive board of imec.

The Versatile Future of Semiconductor Systems

Van den hove, Luc
President & CEO
imec

Abstract
The last few decades have seen a remarkable increase in technology applications, culminating in the AI revolution. Thanks to Moore's Law, technological advances are enabling more powerful applications, especially for the rapidly growing computing needs of AI. Maintaining Moore's Law and adopting new architectural approaches are key to efficiently handling the exponential increase in computing power required, leading to a demand for more flexible chip architectures and platforms.Significant advances in the semiconductor industry have been driven by state-of-the-art infrastructure, a global ecosystem and skilled talent. Legislative initiatives such as the Chips Acts provide an ideal framework for increasing collaboration and impact in the semiconductor sector. These elements are essential for the advancement of various technology platforms, laying the foundation for advanced computing systems in future applications.

Biography
Luc Van den hove is President and CEO of imec since July 1, 2009. Before he was executive vice president and chief operating officer. He joined imec in 1984, starting his research career in the field of silicide and interconnect technologies.In 1988, he became manager of imec’s micro-patterning group (lithography, dry etching); in 1996, department director of unit process step R&D; and in 1998, vice president of the silicon process and device technology division. In January 2007, he was appointed as imec's EVP & COO. Luc Van den hove received his PhD in electrical engineering from the KU Leuven, Belgium.In 2023, he was honored with the Robert N. Noyce medal for his leadership in creating a worldwide research ecosystem in nanoelectronics technology with applications ranging from high-performance computing to health.He has authored or co-authored more than 200 publications and conference contributions.

NanoIC Pilot Line: Accelerating Beyond-2nm Innovation Across the Ecosystem

De Boeck, Jo
EVP & CSO
imec

Abstract
Autonomous vehicles, personalized medicine, 6G networks, robotics, and quantum computing are all driven by the next generation of semiconductor technologies, including breakthroughs like systems-on-chip based on beyond-2nm logic nodes. These innovations are of strategic importance since they have the potential to catalyze the transformation toward a sustainable society while fostering employment and economic growth. The whole semiconductor ecosystem will need to collaborate to enable core technological breakthroughs, elevating these to higher levels of maturity, and introducing them into cutting-edge products and services. The European Chips Act supports this through pilot lines for advanced semiconductor technologies. The pilot line for the development of beyond-2nm systems-on-chip (SoC), the NanoIC pilot line, is hosted by imec. As a world-leading semiconductor R&D hub, imec has built up a unique infrastructure over the last 40 years, including a highly advanced 300mm cleanroom for research purposes. The NanoIC pilot line will extend this infrastructure, enabling the industry to explore beyond-2nm system-on-chip technologies. These SoCs are built around the most advanced logic technology node, combined with next-generation memory and cutting-edge optical and electrical interconnects. This presentation will elaborate the benefits for the ecosystem of this truly pan-European endeavor.

Biography
Jo De Boeck received his engineering degree in 1986 and his PhD degree in 1991 from the University of Leuven. Since 1991 he is a staff member of imec (Leuven). He has been a NATO Science Fellow at Bellcore (USA, 1991-92) and AST-fellow in the Joint Research Center for Atom Technology (Japan, 1998).In his research career, he has been leading activities on integration of novel materials at device level and new functionalities at systems level. In 2003 he became Vice President at imec for the Microsystems division and in 2005 started Holst Centre (Eindhoven) as General Manager of imec the Netherlands.From 2010 he headed imec’s Smart Systems and Energy Technology Business Unit. He is part-time professor at the Engineering department of the KU Leuven and held a visiting professorship at the TU Delft, Kavli Institute for Nanoscience (2003–2016). In 2011 he became Chief Technology Officer and in 2018 he was appointed Chief Strategy Officer. He is member of imec’s Executive Board.

New Metrology and Inspection Era : 1+1=3?

Charley, Anne-Laure
R&D manager
imec

Abstract
New system architecture as well as continuous scaling are important pillars of advanced semiconductor research and development, and both bring new challenges to today’s metrology and inspection techniques. In parallel, improved process control comes with tighter specifications and therefore reduced metrology budget. Conventional metrology approaches cannot alone cope with this ever increasing demand for performance and a new approach has to be considered. This presentation will explore the importance of metrology solutions and what a realistic implementation could be to ensure the success of advanced semiconductor R&D efforts.

Biography
Anne-Laure Charley owns a PhD in physics of semiconductor from INPG (Institut national polytechnique de Grenoble, France) specialized in lithography and optic for semiconductor (graduated in 2006). She started her career as lithography R&D engineer at STMicroelectronics (France) and at Crocus Technology (San Jose, USA). She joined imec in 2008 as researcher in metrology for advanced patterning applications. She became R&D team leader in the field of CD metrology in 2015 and is now managing the inline metrology and inspection group in the advanced patterning department.

Demonstration of High-Speed Silicon Photonics I/O for Co-Packaged Pilot Line

Luo, Cheng-Jhih
R&D Engineer
IMEC

Abstract
The high-level objective of HiCONNECTS project is to support industrial challenges by developing heterogenous integration technology solutions for energy-efficient and high-performance cloud and edge computing. HiCONNECTS pilot lines aim at developing advanced photonic integrated circuits, the tasks involve high-speed optical interconnect, co-packaged optics, and heterogenous integration. In this presentation, we discuss the development of the pilot lines and show the challenges/breakthroughs.

Biography
Cheng-Jhih Luo is the R&D engineer of silicon photonics pathfinding at imec. His works focus on photonic component and micro-optical system design especially aim to advanced co-packaged optics for silicon photonics. He received Ph.D from National Chiao-Tung University Taiwan in 2019 and previously Cheng-Jhih worked as deputy project manager at ITRI for host several technical projects regarding photonic systems.

A Day as Superconducting Qubit Integration Engineer

Massar, Shana
R&D Engineer
Imec

Abstract
“Quantum computing is an emergent field of cutting-edge computer science harnessing the unique qualities of quantum mechanics to solve problems beyond the ability of even the most powerful classical computers.”¹Get some insights into the role of an Imec integration engineer in the quantum computing field and how we bring qubits from design to real devices.Discover the journey that led me to doing research on the integration of superconducting qubits.During this session, we will also explore the challenges that come with the role, together with the exciting opportunities.¹ IBM: https://www.ibm.com/topics/quantum-computing

Biography
After obtaining double Master of Science (M.Sc.) degrees in Chemical and Materials Science Engineering from the Universite Catholique de Louvain (UCLouvain, Louvain-la-Neuve, Belgium) and in Functional Advanced Materials Engineering from Augsburg Universitat (Augsburg, Germany), Shana Massar joined Imec in 2020 as Development Engineer supporting the integration of the SpinQubit project. She has then moved to the position of R&D Engineer and is now leading the integration of superconducting qubits in Imec’s 300mm fab. Shana was a recipient of the 2023 “20 under 30” Semicon Europa award.

Advancing Connectivity with III-V Materials

Collaert, Nadine
Fellow and Program Director of the Advanced RF Program
imec

Abstract
The relentless pursuit of advanced connectivity solutions has positioned III-V materials at the forefront of wireless, wireline, and photonic technologies in general. Characterized by their exceptional electronic and optical properties, III-V compounds such as GaAs, InP, and GaN are pivotal in the evolution of next-generation communication systems. In wireless applications, III-V semiconductors enable superior performance in high-frequency and high-power scenarios essential for 5G and beyond. These materials underpin the development of efficient power amplifiers, low-noise amplifiers, and high-speed transistors, which are crucial for enhancing signal transmission and reception. For wireline communication, particularly in fiber optics, III-V materials offer unmatched capabilities. InP-based photonic integrated circuits (PICs) facilitate high-speed data transmission and low-loss signal processing, addressing the ever-growing demand for bandwidth in data centers and long-haul networks. In recent years, the silicon photonics industry has experienced significant growth, enabling the integration of various optical devices on large-scale Si wafers with mature CMOS process technology. The integration of III-V materials and devices, including lasers and amplifiers, is crucial to complement these silicon photonics platforms. Therefore, heterogeneous integration techniques, such as flip-chip bonding, micro-transfer printing, wafer reconstruction and selective area growth, play an essential role in designing future photonic and electronic integrated circuits. These methods meet high device density and production cost requirements while leveraging the advantages of III-V technologies. This presentation provides an overview of how III-V materials are revolutionizing connectivity across various domains. These materials are central to overcoming the limitations of traditional technologies and offer promising solutions for the future of the global communication infrastructure. We will focus particularly on efforts to integrate III-V materials with silicon-based technologies.

Biography
Dr. Nadine Collaert is a program director at imec. She's currently responsible for the advanced RF program looking at the heterogeneous integration of III-V/III-N devices with advanced CMOS to tackle the challenges of next-generation mobile communication. Previously, she was a program director of the logic beyond Si program, focused on researching novel CMOS devices and new-material-enabled devices and system approaches to increase functionality. She has been involved in the theory, design, and technology of FinFET devices, emerging memories, transducers for biomedical applications, and the integration and characterization of biocompatible materials. She has a Ph.D. in electrical engineering from the KU Leuven, (co-) authored more than 400 publications, and holds more than ten patents in device design and process technology.

Deep Pitch Scaling of Wafer-to-Wafer and Die-to-Wafer Cu/SiCN Hybrid Bonding

Jourdain, Anne
R&D Manager
Imec

Abstract
Hybrid bonding is recognized as the key technology for advanced heterogeneous wafer-level system integration. This is enabled through aggressive pad size and 3D interconnect pitch scaling, resulting in minimal electrical die-to-die interconnect delay. In this presentation we will discuss the properties of SiCN dielectrics as material of choice for hybrid bonding, as well as the process requirements for the mixed Cu/SiCN surface finish of wafers. The physical mechanisms of hybrid bonding will be discussed. The various improvements in wafer processing and wafer alignment and bonding will be discussed, resulting in high yield hybrid bonding down to 400nm interconnect pitch. When applying this hybrid bonding technology to die-to-wafer, additional challenges need to be addressed. Particularly challenging is maintaining the quality and cleanliness of the Cu/SiCN surface through die thinning, singulation and individual die pick & place operations. We discuss a process flow to enable the mitigation of these challenges, demonstrating 2 µm pitch die-to-wafer hybrid bonding.

Biography
Anne Jourdain received her PhD degree in Physics from University Joseph Fourier of Grenoble, France, in 1998. In 1999, she joined IMEC (Interuniversity Microelectronics Center) in Leuven, Belgium, to work on wafer-level-packaging solutions for RF-MEMS applications. In 2007, she joined the 3D Integration Research Program of IMEC to work on various wafer-to-wafer bonding and wafer thinning technologies. In 2019, she became responsible for the Backside Power Delivery Network integration activities within the program before taking the lead of the 3D Heterogeneous Integration team in 2022, looking at collective die-to-wafer and direct hybrid bonding technologies for 3D stacking applications. She is currently leading the Heterogeneous Integration and Packaging Development Group.

Challenges in the land of Automotive High-Performance Computing: Chiplets to the Rescue

Placklé, Bart
Vice President of automotive technologies
imec

Abstract
The automotive industry is going through a monumental evolution – embracing software-defined vehicles, a zonal-based approach with centralized compute, and rapid electrification. This radical shift in vehicle architectures is further fueled by a relentless pursuit for unparalleled (semi-)autonomous driving experiences and the entry of disruptive innovators into the market. One of the results of this evolution is an exponential surge in computational demands that we can no longer meet solely by implementing semiconductor technology advancements from other sectors, with performance doubling every 18 months (known as Moore’s law). It requires us to reimagine how we build automotive compute systems. A promising route is to move away from constructing large, singular monolithic systems-on-chips (SoCs) but, instead, construct system functionalities at a granular level, integrating diverse building blocks or chiplets in a package. This shift will enable the creation of semi-custom solutions tailored to the OEM’s choices regarding performance, automotive I/O, AI and other accelerators. It also presents an opportunity to assemble these building blocks like customizable LEGO sets, significantly reducing costs. Our presentation will delve into the valuable lessons learned from high-performance compute markets that have already embraced chiplet-based architectures. We aim to dissect the benefits of this transition in terms of scalability, cost efficiency, and performance enhancements. Moreover, we'll examine the automotive industry's journey towards adopting chiplets and identify the remaining areas that need attention to fully exploit their potential to revolutionize automotive computing, driving innovation and efficiency across the industry.

Biography
Bart Placklé holds a Master of Science degree and a postgraduate degree in telecommunications from the University of Hasselt (Belgium), and imec (Leuven, Belgium), respectively. He also obtained a postgraduate degree in executive business economics from KU Leuven (Belgium). Bart started his career at Acunia, an imec spinoff, where he initially served as a lead silicon designer and later advanced to become the general manager of the hardware business unit. In 2004, Bart joined Intel to create the company’s in-vehicle infotainment business. As chief architect and later automotive CTO, he led the development of five generations of high-performance automotive solutions, driving Intel’s automotive segment to become a multibillion-dollar business. In recognition of this contribution, Bart received the Intel Achievement Award in 2016. In 2021, Bart was appointed as the CTO of AXG Mobility-as-a-Service at Intel. In 2023, Bart Placklé returned to imec, assuming the role of vice president of automotive technologies. In this capacity, he is leading the development of cutting-edge solutions that will shape the future of mobility.

Topic Coming Soon

Hoofman, Romano
Director imec.IC-link
imec

Abstract
Coming Soon

Biography
Romano Hoofman is Strategic Development Director at imec.IC-link since 2016. He is currently responsible for the innovation programs of the unit and for the coordination of the EUROPRACTICE Service.He started his career in industry, where he worked as a Principal Scientist at Philips Research and later on NXP Semiconductors. He covered many different R&D topics, ranging from CMOS integration, advanced packaging, thin film batteries, photovoltaics and (bio)sensors.Romano received his PhD from the Technical University of Delft in 2000, where he investigated charge transport in semi-conducting polymers. He has authored more than 30 publications and holds more than 10 patents in various research areas.

Climate-aware semiconductor manufacturing and what that means to lithography

Gallagher, Emily
Program Director, Sustainable Semiconductor Systems and Technologies
imec

Abstract
The semiconductor industry has been fueled by innovation. We have come to rely on disruptive innovations like new exposure wavelengths or directional etch processes. Driving to wafer measurables is the norm but given the human-induced impacts on our environment, we must also be aware of the climate impacts. This is not possible without quantitative assessment. To provide that information, imec has developed a cradle-to-gate life cycle analysis technology nodes based on bottom-up modeling of a generic high-volume semiconductor fabrication fab. The resultant virtual fab is used to identify major process contributors to emissions, to provide sensitivity analysis, and to enable future patterning decisions with a quantification of their environmental ramifications. Overall technology data will be shown, along with a more targeted examples relevant to lithography.

Biography
Emily Gallagher is a program director for SSTS at imec, focusing on sustainability in semiconductor manufacturing processes. Emily earned her PhD in physics from Dartmouth College where she studied free electron lasers. After graduation, she joined IBM and became immersed in semiconductor technology. She held many wafer fabrication roles at IBM from functional characterization to process integration, to leading the EUV mask development effort. She joined imec in 2014 to continue EUV development work. Emily has authored over 100 technical papers, holds over 20 patents, is an SPIE Fellow and co-leads the SEMI Semiconductor Climate Consortium Scope1 Working Group.

INFICON: Your Path to Tomorrow’s Autonomous Smart Factory

Behnke, John
General Manager Smart Manufacturing
INFICON

Abstract
This presentation will provide an overview of market trends and INFICON’s evolving role in the semiconductor industry, tracing its journey from a leading manufacturer of residual gas analyzers, vacuum gauges, and helium leak detectors to its current position as a thought leader in Smart Manufacturing solutions, encompassing both hardware and software. INFICON’s Digital Twin technology remains a cornerstone of its integrated software applications, playing a crucial role in enhancing manufacturing efficiency and precision. The presentation will also highlight the growing influence of INFICON’s AI/ML advanced analytics team, whose innovations are driving new capabilities across the company’s product portfolio. These advancements, along with other cutting-edge industry developments, are laying the groundwork for the autonomous factory of the future.

Biography
Mr. Behnke has over 40 years of semiconductor industry experience. As the General Manager of INFICON’s FPS Product Line and Head of its IMS Marketing team, John leads a global team that develops and deploys Smart Manufacturing software and hardware solutions which improve factories performance. INFICON’s comprehensive Digital Twin of a factory enables advanced Factory Scheduling, optimized WIP movement and other advanced capabilities.He is also a Co-Chair of the Semi North America Smart Manufacturing Chapter as well as a founding member of Semi’s Smart Global Executive Committee. Prior to his current role at FPS John served as: the President of Novati Technologies, SVP and GM of the Semiconductor Group at Intermoleculor, CVP for Front End Manufacturing and Tech Transfers at Spansion and Director of Operations at AMD's Austin Fab 25.

From Insight to Action: Elevating Employee Efficiency with Smart Detection and Targeted Data Delivery

Smith, Holland
Director of Technical Marketing
INFICON

Abstract
In an era where it is increasingly easy to be overwhelmed by data, timely and efficient decision-making is critical to maintaining optimal factory operations. This talk will highlight the results of a joint collaboration between INFICON and ST Microelectronics. Together, we are developing an innovative application aimed at transforming how factories operate and respond to challenges. In addition to providing real-time tracking of key performance indicators (KPIs), the application detects various types of operational anomalies. These anomalies are automatically assessed to determine their potential impact, and the application allows workflow management by assigning tasks to the appropriate factory workers, ensuring rapid response and resolution. Our collaboration is focused on enhancing employee efficiency by delivering data that is specifically tailored to each worker's role, minimizing information overload, and providing actionable insights exactly when and where they are needed. By combining comprehensive operations tracking with smart detection and targeted data delivery, this solution enables semiconductor factories to operate with greater precision and reduced downtime.

Biography
Holland Smith is Director of Technical Marketing for INFICON IMS. Prior to this, Dr. Smith directed Smart Manufacturing systems architecture and installation projects at fabs across the world. Dr. Smith is a semiconductor data systems expert and a contributing developer of the INFICON FPS Digital Twin, which powers optimized Fab Scheduling among other industrial engineering-related applications. Dr. Smith has spoken widely across industry events (like Semicon West, FOA, SEMI Digital Twin Workshop, ASMC, etc.) on topics at the intersection of operations research, data science and computer science. Dr. Smith has a B.S, M.S. and Ph.D in Materials Science and Engineering from University of California, Berkeley, as well as a B.A. From Stanford University.Thomas Gimmig has twenty-five years of experience in semiconductor manufacturing. After holding various positions in maintenance, engineering, and production management at ST Microelectronics, finishing as Production Director of the Rousset plant in 2019, he moved to manufacturing central functions in 2022. Initially, he was in charge of Front-End Operational Excellence programs, developing the LEAN leaders community, and leading smart manufacturing transformation programs. He recently became the head of Industry 4.0 programs for ST Microelectronics manufacturing. Thomas Gimmig holds a master's degree in electronics.

Topic Coming Soon

Boll, Michael
Vice President Public Policy
Infineon Technologies

Abstract
Coming Soon

Biography
Michael Boll is a seasoned professional with a strong background in law, economics, and public policy. Born near Münster, Germany, he pursued higher education in Economics and Law at the University of Münster, earning his First State Examination in 2000 and his Second State Examination in Law in 2003.Michael furthered his academic credentials by obtaining a Master's degree in International and European Business Law (LL.M.) from the University of Exeter in 2003-2004.Michael's professional journey began in the consulting sector, where he held various leadership positions at EUTOP and Gauly Advisors. His client base was mainly from the Tech and Financial sector. He served as Director at EUTOP from 2005 to 2014, followed by a stint as Senior Manager and Partner at Gauly Advisors from 2014 to 2017. He later rejoined EUTOP, taking on roles such as Director & Syndic of EUTOP International GmbH, Member of the EUTOP Asia Executive Board, and Member of the EUTOP Executive Board in Berlin from 2017 to 2020.In 2021, Michael brought his expertise to Infineon, a leading semiconductor company, as Vice President of Public Policy. In this role, he leverages his knowledge of law, economics, and public policy to drive strategic decision-making and advocacy efforts. Throughout his career, Michael has demonstrated a unique blend of academic rigor, professional expertise, and leadership acumen. His diverse experience in consulting, academia, and the corporate world has equipped him to navigate complex policy landscapes and drive meaningful impact.

Innovative Approaches to Improve Reliability in Microelectronics - The ECSEL JU project iRel40

Pressel, Klaus
Assembly and Packaging
Infineon Technologies AG

Abstract
Coming Soon

Biography
Dr. Klaus Pressel studied Physics at the University of Würzburg and with a scholarship of the German DAAD at S.U.N.Y. Albany (New York, U.S.A.). Klaus received his PhD in Physics from the University of Stuttgart for research on point defects in III/V semiconductors. He then joined IHP Frankfurt (Oder), where he focused on Si CMOS and SiGe design and technology. In 2001 Klaus joined Infineon Technologies at Regensburg, where he is focusing on innovations in assembly and packaging technology. His special interests are System-in-Package solutions, high frequency applications, chip-package-board/system co-design, as well as understanding reliability and quality. Klaus has been project leader of many European funded projects, e.g. the recent ECSEL JU iRel40 project. Klaus is representing Infineon in various international technical committees, e.g. SEMI Advanced Packaging Conference, ESTC, the Eureka XECS program, IEEE Heterogeneous Integration Roadmap. Klaus is author/co-author of more than 200 publications in semiconductor physics and technology, circuit design, assembly and interconnect technology and owns/co-owns more than 20 patents.

European Projects for a Diverse Talent Pipeline

Wolfgruber, Martina
Head of Talent & Skills Funding and Collaborative Projects, Infineon Technologies Austria
Infineon Technologies Austria AG

Abstract
European Projects for a Diverse Talent Pipeline

Biography
Martina is a seasoned Human Resources professional with over 20 years of experience across various domains, including talent marketing, development and project management. Currently, she serves as the Head of Talent and Collaborative Projects in Austria, where she is responsible for overseeing funded projects focused on talent attainment and promoting careers in the microelectronics sector. Her expertise also extends to advancing science and education initiatives in this field. She is accountable for overseeing funded projects focused on cultivating and developing rising talents, ultimately contributing to the growth of a skilled future workforce for the microelectronics industry.

Green Building Standard LEED – Sustainability in Semiconductor Fab Design and Construction

Lindner, Franziska
Quality Manager
Infineon Technologies Dresden GmbH & Co. KG

Abstract
The growing scarcity of natural resources is one of today’s greatest global challenges. Optimizing the efficiency in the use of resources offers both ecological and economic benefits and is a key component in Infineon’s sustainability strategy worldwide. Hence, they are high priorities in the planning and construction of the Smart Power Fab in Dresden. This includes being the first Infineon fab to strive for “Leadership in Energy and Environmental Design” (LEED) – a sustainability certification used worldwide defining standards for environmentally friendly, resource-conserving and sustainable construction. LEED provides a framework for healthy, highly efficient, and cost-saving green buildings. With a LEED certification we demonstrate our commitment to both client satisfaction and promoting a more sustainable future by reducing our reliance on limited resources such as energy and water. The Smart Power Fab of Infineon will make a decisive contribution to driving climate protection and digitalization forward by setting new efficiency standards for the consumption of important resources. The investment in Dresden is part of the company’s strategy to reach CO₂-neutrality by 2030.The Smart Power Fab is funded by the European Union, the Federal Republic of Germany and the Free State of Saxony. Sponsors: European Union, Federal Ministry for Economic Affairs and Climate Action on the basis of a resolution of the German Bundestag and the Saxon State Ministry for Economic Affairs, Labour and Transport.

Biography
Franziska Lindner is a Quality Manager at Infineon Dresden and coordinating sustainability measures in the design and construction of the new 300mm Smart Power Fab to produce analog/mixed-signal technologies and power semiconductors needed in automotive and renewable energy industries.After completing her Master of Science in biology 2014, Franziska Lindner started as scientific associate supporting international process transfers and cleanroom capacity expansion. As head of manufacturing and quality officer, she built up pharmaceutical clean room production processes from quality as well as production perspectives. Franziska Lindner was born in Dresden, Germany, in 1989.

Accelerating Innovation with Industry-grade Platforms

Mazure, Carlos
Chief Strategy Officer
Institute of Microelectronics – A*STAR

Abstract
Shortening the time from innovation to industrialization is essential. A*STAR, Singapore, is accelerating the development of More-than-Moore applications through its R&D Catapult platforms. The platforms enable design-process-packaging co-optimization for early feasibility studies to prototyping for academia, public agencies and companies. We highlight 3 Catapult platforms: advanced packaging, piezo-MEMS and SiC.Advanced packaging: Our advanced packaging platform addresses semiconductor system scaling towards trillions of transistors in a single energy efficient package. We offer advanced fan-out wafer level packaging, 2.5D interposers, chip-to-wafer micro-bump 3D integration, wafer-to-wafer hybrid bonding and chip-to-wafer hybrid bonding to meet the needs of Power-Performance-Formfactor-Cost (PPFC) in semiconductor systems.Piezo-MEMS: We have established the world's first Piezo-MEMS ‘Lab-in-Fab’ platform, where R&D and manufacturing are performed in the same fab – the same equipment, talent and recipes. This enables quicker, less costly and derisked development and commercialization of MEMS devices.SiC: Our 200mm SiC platform is vertically integrated from epitaxy to power module packaging and testing for reliability and performance. We use superjunction trench MOSFETs as our R&D vehicle, making it available for the first time to academic and fabless innovators.

Biography
Dr. Carlos Mazure has been working close to A*STAR as an advisor since May 2021. On July 2024 he joined the Institute of Microelectronics – A*STAR as Chief Strategy Officer.With 40 years of experience in the global semiconductor industry, Dr. Carlos Mazure is presently member of several international advisory committees and company boards in Singapore and Europe.Chairman and Executive Director of the SOI Industry Consortium since July 2014 through December 2020. Under his leadership the SOI Industry Consortium has been promoting with the SOI ecosystem the development of the SOI platforms worldwide and helping accelerate the SOI market growth. The SOI Industry Consortium joined the industry association SEMI in January 2021, where Carlos Mazure was an advisor till December 2021 Carlos Mazure was with Soitec till October 2020. Executive Vice President and Advisor to the CEO since April 2019, and EVP & CTO, Head of Corporate R&D and CTO at Soitec from January 2001 through March 2019.Prior to Soitec, from 1994 through 2000 Carlos was with Infineon (Munich, Germany), and initiated Infineon/Toshiba FeRAM Alliance in Japan. From 1993 through 1994 he worked for IBM/Infineon DRAM Alliance (Fishkill, NY); and from 1990 through 1993 at Advanced Products Research and Development Laboratory (APRDL), Motorola (Austin, Texas) on BiCMOS ultra fast SRAMs. Carlos started his career at the Siemens Corporate R&D in Munich, Germany, in 1984.Carlos Mazure is IEEE Fellow, PhD from the Technical University Munich,

Semiconductor-X – Creating a Coherent Dataspace for the Semiconductor Supply Chain

Gossner, Harald
Senior Principal Engineer
Intel

Abstract
Coming Soon

Biography
Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich in 1990 and his PhD in electrical engineering from Universität der Bundeswehr, Munich in 1995. For 15 years he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD robustness development for Intel products.Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of IC robustness design and device physics, where he also holds 120 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association as highest award for his contributions to the field of ESD. He is the cofounder and co-chair of the Industry Council on ESD Target Levels. He also served as president of the EOS/ESD Association, Rome, NY, from January 2022 to December 2023. Harald Gossner is IEEE Fellow and contributes as editor to IEEE EDL. Currently he is member of the industry advisory boards of the Bavarian Government and Fraunhofer institutes and participates in the expert commission on AI of the German Economic Council. He is project lead of the project Semiconductor-X, coordinating the development of a resilient supply chain of semiconductors for Europe.

CEE: Future Location of Semiconductor Investments

Trunin, Mikołaj
Director
Invest in Pomerania

Abstract
The presentation provides a comprehensive exploration of the key factors influencing the decision to locate new semiconductor investments in CEE and Pomerania, taking into account geopolitical, logistical, environmental, and supply chain dynamics.The CEE countries have stable governments, growing economies, and a strong presence in NATO and the EU, making them attractive for investment. Moreover, the alignment with EU and NATO policies reduces risks associated with instability, making them ideal for long-term investments, especially in manufacturing and tech sectors.Russia’s aggression in Ukraine has raised concerns about the security of supply routes and energy dependence. The CEE countries, Poland in particular, have taken steps to reduce dependence on Russian energy, strengthening energy security and reducing risks for manufacturing.The importance of coastal access and central positioning is not to be overlooked. Proximity to the sea and ports and international routes reduces the cost and complexity of importing raw materials and exporting finished products, while access to maritime, railway and express routes is crucial for global supply chain integration in the semiconductor industry.With the EU moving toward stricter regulations on per- and polyfluoroalkyl substances (PFAS) due to their environmental and health risks. Investing in the CEE and Pomerania allows companies to build manufacturing processes that are compliant with future regulations, making the industry more sustainable and future-proof. The availability of green energy (wind farms in the Baltic Sea, for example) further supports sustainable semiconductor production.

Biography
Deputy Director at Invest in Pomerania, a local investment promotion agency responsible for attracting foreign direct investments to the Pomeranian Voivodeship (northern Poland). During over 10 years in the organization, he directly supported investment projects of such companies as Intel, Northvolt, Flex, Alteams, ThyssenKrupp, Siemens Gamesa, Archer, Lacroix Electronics. Thanks to his experience and extensive business knowledge, Mikołaj is able to efficiently support every investment process. As highlighted by investors, it is often the activities of the Invest in Pomerania initiative that have contributed to choosing Pomerania as an investment destination. According to the World Bank analysis, the impact of Invest in Pomerania's activities from 2011 to 2020 on the growth of jobs related to foreign direct investment was 230%.

Taming the IoT Cybersecurity Wicked Challenge

Moor, John
Managing Director
IoT Security Foundation

Abstract
This talk addresses the critical challenges of managing product cybersecurity throughout the lifecycle, and across applications. Aimed at designers, developers, and manufacturers with a blend of technical and management skills, the presentation will elucidate the multifaceted nature of IoT security challenges. It will emphasize the need for fit-for-purpose security that aligns with application requirements, regulatory compliance, and lifecycle management. The conclusion underscores the importance of a collaborative and evolving security methodology to address the dynamic challenges of IoT security, inviting all stakeholders to participate.

Biography
John Moor is co-founder and Managing Director of the IoT Security Foundation (IoTSF).He has over 30 years of experience in electronic systems and microelectronics industries and holds executive leadership and general manager responsibilities for IoTSF. Previously John served as a vice-president at the UK's National Microelectronics Institute (NMI) where he was tasked with formulating strategy and leading key innovation initiatives. Before NMI, John was one of the founders of Bristol-based start-up ClearSpeed Technology (formerly PixelFusion Ltd). During this time he led engineering operations at the vice-president level. He was responsible for technology acquisitions, establishing international supply chain operations and acquiring capability in the UK, USA and Taiwan.John holds an MA (Distinction) in Strategic Marketing Management from Kingston University London and a Master of Business Administration from the University of Leicester. John’s formative embedded systems engineering career centred on leading-edge microprocessor-based systems (substantially parallel systems) and used in data communications, high-performance computing, graphics and virtual reality applications.

Next generation photoacoustic imaging with xMUT technology: status and challenges

Leisching, Patrick
Chief Technology Officer
iThera Medical GmbH

Abstract
We introduce photoacoustic imaging as a new modality to enhance ultrasound images by molecular information. The key for imaging simulaneously the two modalities ultrasound and photoacoustic are new xMUT technologies, as piezo based systems are not easily combined with preamplifiers. The use of piezo based technologies in photoacoustic imaging will be reviewed, the way forward to integrate PMUT and CMUT transducers with preamplifiers will be discussed. The key of any further integration is the combination of xMUTs and integrated electronics combining preamplifer, averaging and code gain electronic technology.

Biography
In June 2022 Patrick started working as CTO for iThera Medical in Munich and is listening to molecules to open a new era of in-vivo medical imaging. Beforehand he was engaged for 12 years as SVP R&D for TOPTICA Photonics in Munich, scaling the diode-laser based company revenue from 14M€ to 105M€. His industry career started 1998 at Siemens in Munich, where had various functions from research to project management and head of optical systems R&D department. Later at Nokia Siemens Networks he was engaged as head of portfolio management and finally head of product management for the operating systems software of optical and packet transmission systems. He holds academic degrees from Technical University of Munich (Dipl.-Phys., laser physics and semiconductor physics) and RWTH Aachen (Dr. rer. nat., III-V quantum well semiconductors), the post-doc as Feodor Lynen fellow was performed at Ecole Polytechnique in Paris (II-VI magneto-optic semiconductors).

Smart Design & Construction for the Semiconductor Industry

Kreidel, Tim
Director
Jacobs

Abstract
Topics covered include: • The need for increased design and construction velocity leads Owners to lean more heavily on repeatable/reference designs. While there are undoubted advantages to utilization of reference designs, project teams must actively track and adjust for required differences and deviations to the established reference design to accommodate local code/jurisdictional and/or climactic differences.• Market pressures, including competition for labor and material resources point towards off-site-manufacturing (OSM) as a critical lever for projects in the current environment. OSM changes the dynamic of design and construction projects, driving the need for new skillsets within design and construction teams and altering the timing of critical configuration decisions.• The use of software platforms can provide invaluable assistance to project teams, in promoting shared real-time visibility to critical datasets. Jacobs has developed one such sophisticated and adaptable project execution framework to ensure broad yet tailored access for project stakeholders real-time project data.• Recent enhancements in 3D/BIM visualization tools allows broader use of rapid-prototyping approaches to more efficiently explore and select design options.• Semiconductor manufacturers are striving towards creating digital twins of their facilities, with the goal of creating virtual replicas of physical assets, processes and systems. Currently, the more robust datasets made available with the digital twin construct is being leveraged to increase project velocity, allowing optimization within, for example, procurement, planning and construction sequencing realms. The future for Digital twins promises further exciting possibilities, including true integration with operation and maintenance platforms and opportunities for predictive analytics to enhance facility equipment operation and energy management.

Biography
Coming Soon

Roadmap for Semiconductor Exhaust Gas Treatment Equipment Towards Carbon Neutrality

Morihara, Atsushi
CTO of Kanken Techno
Kanken Techno Co., Ltd.

Abstract
Various efforts are being made across industries to achieve carbon neutrality by 2050. In this context, at semiconductor manufacturing facilities, the abatement of greenhouse gases (GHGs) such as fluorinated gases emitted from manufacturing equipment represents a significant challenge. Additionally, achieving carbon neutrality across the entire supply chain for Scope 1, 2, and 3 is necessary. From Kanken Techno, a specialist manufacturer of abatement systems in Japan, we will present guidelines and recommendations and introduce the technology that addresses these directions.

Biography
Atsushi MoriharaChief Technology OfficerHeadquartersKanken Techno Co., Ltd.Professor, Ph.DLaboratory for Zero-Carbon EnergyTokyo Institute of TechnologyEducation: •Professor Tokyo Institute of Technology 2012-•Visiting Researcher Massachusetts Institute of Technology 1994-1996•Doctor Degree Tohoku University 1991-1994•Graduate TOKYO University 1977-1981Experience:•CTO KANKEN Techno 2017-•CTO Global Environment Group Mitsubishi Corp 2008-2017•General Manager Power generation Group HITACHI Ltd. 1981-2007

The Most Common Antistiction Films are PFAS, Now What?

Springer, David
Product Manager, MVD and Release Etch Products
KLA Corporation

Abstract
Antistiction coatings are widely used in MEMS applications to improve device performance and enhance overall device lifetime. The most widely used chemicals are fluoropolymers like FDTS and FOTS, which are members of the large group of PFAS substances. MEMS integrators and manufacturers are increasingly seeking alternative antistiction coatings that do not use PFAS chemicals. The obvious solutions include hydrocarbon analogs of FDTS and FOTS, but these don’t have the required thermal or mechanical stability. This talk will discuss the various alternatives to FDTS, explore their strengths and weaknesses, and introduce a new proprietary fluorine free antistiction coating.

Biography
David Springer is a Product Manager at KLA in charge of MEMS applications of MVD coatings, and XeF₂ release etch products. He joined SPTS in June of 2013 when SPTS acquired Xactix Inc. where he was President for 11 years. Previous to XACTIX, David was president of a design automation startup company and received his PhD. in Computer Engineering from Carnegie Mellon University.

Future of Work Panel

Collins, Dan
General Manager, SPTS Division, KLA Corporation
KLA Corporation

Abstract
n/a

Biography
Dan Collins is General Manager of the SPTS Division within KLA Corp. After joining SPTS in 2016 as Supply Chain Director, Dan was promoted to VP Operations in 2019 and has been instrumental in driving the improvements to the company’s manufacturing operations. As General Manager he is overseeing the integration of SPTS into KLA, involving new processes, systems and employee culture during a period of significant growth for the business. He has previous operations experience with Edwards and Cooper Tire & Rubber Company with exposure to supply chain management in the semiconductor, automotive, and other industries. He holds a BSc(Hons) in Astrophysics from Queen Mary University of London, and MSc in Technology Management.

Sinter Print Surface Condition Measurement for Power Electronics

Lindloff, Axel
Senior Process Specialist Pre-Sales
Koh Young Europe GmbH

Abstract
Within the semiconductor packaging landscape, printing remains the preferred material transfer method due to its historical reliability and cost-effectiveness spanning millennia. In electronic industries, stencil printing is particularly favored for its prolonged usability of metal sheets in mass-production settings. The quality of stencil printing is intricately linked to various critical factors affecting material transfer efficiency, a pivotal consideration as print quality serves as the linchpin for subsequent processes. Rigorous control of print quality is instrumental in minimizing costs and defects. The standard for monitoring and controlling material transfer efficiency in automotive electronic production is 3D phase-shifting shadow Moiré metrology. Leveraging a comprehensive 3D reconstruction of the measurement object and its surroundings, this methodology allows for an exhaustive analysis of the surface condition of a sinter pad. Precise measurement and analysis of critical factors, including peaks, holes, height, and chip placement area slope, become possible. Given the sinter material's limitations, holes act as thermal isolators, creating operational hotspots, and peaks pose a risk for stress-induced cracks. Consequently, controlling surface conditions is imperative for mitigating premature failures. Effectively controlling surface conditions requires specialized algorithms. In the stencil print process, where edges of sintering paste pads may deviate from specifications, the analysis area is strategically confined to the chip placement region. High repeatability and accuracy in measuring peaks and holes within this area enable the generation of data that can be employed for direct response to the print process or for process modeling. This includes the analysis of critical hole and peak sizes to preempt premature failures. Keywords: sintering, printing, 3D measurement, phase-shifting shadow Moiré

Biography
Axel Lindloff studied general electrical engineering at the Bielefeld University of Applied Sciences and has been active in the SMT world since 1999. He initially gained 3 years of experience in sales of stencils and consumables before moving to the application department of a well-known printing machine manufacturer in 2003. Here, he worked until 2012 with the optimization of existing processes, audits and the development of new printing applications. Since September 2012, Mr. Lindloff has been working for Koh Young Europe GmbH as an application engineer. Here, he mainly deals with questions relating to solder paste printing and process optimization with the 3D data obtained.

Making the Fab Fit for the Future: Retrofit for Modern Technology, Security, and Maintenance Capability

Schulze, Natalie
Product Manager Equipment Control and Integration
Kontron AIS GmbH

Abstract
The semiconductor industry is continuously evolving, driven by innovation, efficiency and scalability. To maintain competitiveness, not only the adoption of new equipment is required, but also the strategic retrofits of existing systems. Learn about the benefits of retrofitting semiconductor production equipment to enable their integration into modern production.Prolonged Use of Existing Production EquipmentRetrofitting is cost efficient as they extend the operational life of current assets. Semiconductor manufacturing equipment is a substantial investment, and leveraging retrofits allows fabs to update these systems to support new process requirements, accommodate advanced materials and improve overall production capabilities. By updating not only the software of a legacy tool, but also outdated components, the risk to require no longer existing spare parts can be minimized.Enhanced Technology Integration and AutomationCentral to a successful retrofit is the integration of sophisticated equipment controls. The utilization of SECS/GEM, GEM300, and Equipment Data Acquisition (EDA) standards is essential. SECS/GEM standards ensure compatibility and interoperability across diverse equipment, while GEM300 standards support automation in 300mm fabs, enhancing throughput and efficiency. EDA further allows for detailed data analysis and predictive maintenance, contributing to higher yield and reduced downtime.Improved Security and MaintenanceRetrofitting also addresses critical security concerns. Modern control software solutions more sophisticatedly support cybersecurity measures to protect against increasing threats. This is crucial for maintaining the integrity and confidentiality of proprietary manufacturing processes. Additionally, retrofits improve maintenance capabilities, incorporating regular tool updates. This is one step ahead to reach conformity with the cybersecurity standards SEMI E187 and E188.ConclusionIn conclusion, retrofitting existing semiconductor production equipment with modern technology, security, and maintenance capabilities presents a strategic pathway for fabs aiming to remain competitive in a fast-evolving market. By leveraging advanced equipment control and integration software, fabs can achieve significant cost savings, improved performance, and enhanced security. Join us in exploring how retrofits can make your fab fit for the future, driving innovation and efficiency in semiconductor manufacturing.

Biography
With two years dedicated work as product manager for equipment control and integration software in the semiconductor industry at Kontron AIS, it is my aim to support OEMs and Fabs to tackle the major challenges we meet: a fast moving market, high speed innovations and keeping up with the pace.

Virtual Fab for advanced semiconductor engineering

Vincent, Benjamin
Director of Engineering
Lam Research

Abstract
Innovative 3D semiconductor architectures are driving a major revolution in the design of logic and memory technologies. The development of these new 3D architectures, with dimensions at the nanometer and angstrom scale, will require the completion of a difficult series of engineering tasks during product development, prototyping, ramp-up and final manufacturing. As a result, the semiconductor industry may see a long time-to-market and drastically increased costs to develop these new technologies. To remain competitive, new engineering methodologies will be needed to improve 3D device development time and cost. This presentation will demonstrate how virtual semiconductor fabrication can be used to accelerate time-to-market and lower costs in the development of the latest 3D logic and memory technologies.

Biography
Benjamin Vincent, Ph.D., is a Director of Engineering in the Semiverse^TM Solutions division of Lam Research. He has 15+ years of experience in semiconductor process engineering, including positions at imec (Belgium) as an epitaxy scientist in the advanced logic area, and at Intel as a process and design integration engineer and manager. Dr. Vincent joined Lam Research in July 2017 and is currently leading the global application team for SEMulator3D^®, Lam’s virtual semiconductor fabrication software. He received his M.S. in Physics and a Ph.D. in Materials Science from the Institut Polytechnique de Grenoble and CEA/LETI, in Grenoble, France.

AI Enabled Precision Maintenance

Meyer, David
CEO
Lynceus AI

Abstract
AI Enabled Precision Maintenance is a new approach to maximize capital equipment efficiency in the fab. PM schedules are mostly fixed and executed irrespective of the tool or process actual condition.By leveraging the latest developments in AI, we can develop fractional PMs using dynamic maintenance checklists, enabling engineers to do only what is required, when it is required. This will reduce overall green-to-green times and bolster personnel productivity.Lynceus AI and MAX are joining forces to change the current maintenance paradigm and unlock the next step in equipment productivity.

Biography
David Meyer is co-founder and CEO at Lynceus AI, a pioneer in the deployment of AI solutions in the fab.Ariel Meyuhas is Founding Partner & COO at MAX, a global consulting firm specializing in fab technical and operational optimization.

Panelist

Chombar, Françoise
Chairwoman and co-founder of Melexis
Melexis

Abstract
Panelist

Biography
SummaryFrançoise Chombar is Chairwoman and co-founder of Melexis. She has been the CEO ofMelexis for 18 years. She has held executive positions with a number of tech companies.Ms Chombar is currently member of the Board of Umicore, the Board of Soitec and theadvisory Board to Byteflies.She is equally president of the STEM platform, an advisory board to the Flemishgovernment, aiming to encourage young people to pursue a Science, Technology,Engineering or Mathematics education.Françoise Chombar’s long-term commitment to actively advocating more STEM and moregender balance is driven by the profound belief in their positive societal impact.AwardsFrançoise Chombar is the recipient of numerous awards including the Vlerick Award, theGlobal Prize for Women Entrepreneurs of BNP Paribas, ICT-Personality of the Year byDatanews, Science Fellowship at the VUB, Honorary Award by the Flemish Communityand the Computable Lifetime Achievement Award.EducationMs Chombar holds a Master’s Degree in interpreting (Dutch, English and Spanish) fromGhent University.

Supply Chain Collaboration & Resilience: Building and Enabling the European Ecosystem

Ernst, Benedikt
VP, Head of Strategy and Transformation Electronics & Semiconductor
Merck Electronics KGaA

Abstract
AI, autonomous driving, and smart manufacturing are among the leading trends for digital transformation, with semiconductors being integral to these advancements. The EU has the potential to revitalize its semiconductor industry, but this can only be achieved through the development of a comprehensive ecosystem and by harnessing the strengths of local players in the value chain. Merck, a leading materials and equipment supplier based in Germany, has been an innovative and transformative partner for semiconductor players worldwide. We have applied our Materials Intelligence to unlock next-generation chips by combining our expertise in chemistry, physics and science with AI solutions. In this talk, we will explore the areas that require the collective attention of EU semiconductor players today to ensure our mutual growth and success in the future. This includes fostering closer collaboration across the value chain, expanding production capacity, strengthening supply chain resilience, and nurturing materials innovation to align with future technology roadmaps.

Biography
Benedikt Ernst is Vice President and Head of Strategy Transformation at the Electronics business of Merck. As a member of the Electronics Executive Committee, he is responsible for the end-to-end strategic development and transformation of the business sector, encompassing market competitive intelligence, strategic roadmap, business transformation programs, and business and portfolio development. He joined in Merck in 2006, and has had various management positions. Since 2018, he has been heading Strategy and Business Development for Electronics and Semiconductor. Before he was Commercial Director for the Semiconductor business and Head of Packaging Business Field. Benedikt Ernst studied physics at the Technical University of Munich and at the Max Planck Institute of Plasma Physics.

Sustainable Innovation Needs Collaboration

Tolksdorf, Miriam
Head of Sustainability & Safety Merck Electronics
Merck Electronics KGaA

Abstract
New technologies like Artificial Intelligence have just begun to change many things of our everyday life. As they permeate more areas of life—whether in private or work environments—their use brings great potential that we want to continue to unlock in order to create value for as many people as possible. It promises to be one of the biggest changes since the invention of the internet. However, this development also leaves its mark, for example in the form of increasing resource and energy demands. To ensure that technological progress and digital living do not develop at the expense of sustainable economic practices, we must always think of both together. Whether it's new materials, improved processes, or entirely different approaches—we will only achieve sustainable growth through innovation. At its core, this means collaboration along the entire value chain. Siloed thinking within company boundaries cannot solve the complex challenges of our time. The entire industry must contribute, from suppliers to end-device producers. Data exchange, transparent dialogue, and collaborative partnerships are key to enabling the next generation of semiconductors and making more sustainable solutions the new standard. What are the most pressing challenges of the semiconductor industry? How can we address them specifically? And what role does Materials Intelligence^TM play? This session provides answers and inspiration—and above all, a call to rethink established practices.

Biography
Miriam Tolksdorf has been leading Sustainability at Merck Electronics since September 2023, pursuing an ambitious roadmap in sustainable material science and green operations across Merck Electronics’ business units. Based on the key belief that advancements in sustainability stem from partnership across value chains, the clear focus is on industry collaboration to foster sustainable innovation, explore new more sustainable solutions and advance industry roadmaps together.Miriam joined Merck in 2009 and has since then held various strategic management and transformation roles across a variety of functional fields, such as Finance, HR, Strategy/Business Development.

Advancing Sustainability in the Semiconductor Value Chain: A Data-Driven Approach

Muesch, Anja
Head of Transformation and Strategic Programs
Merck Electronics KGaA

Abstract
In recent years, the semiconductor industry has shifted significantly towards environmental sustainability, driven by regulatory pressures and consumer demand for eco-friendly products. As a key player in the semiconductor materials supply chain, we are adapting to this evolving landscape, aligning our practices with sustainability goals.Suppliers now face the challenge of delivering sustainable materials and technologies while fostering cleaner production processes. Transparency in greenhouse gas emissions is increasingly expected, necessitating efforts to understand and mitigate emissions across the value chain.A critical component of this effort is optimizing manufacturing processes to address Scope 1 and Scope 2 emissions. At Merck Electronics, we embrace a comprehensive approach to greener chip production, integrating data-driven methodologies with fundamental engineering principles.Our approach at Merck Electronics combines data analytics with predictive modeling to reduce environmental impact throughout the production lifecycle. Utilizing machine learning (ML) algorithms, we aim to reduce scrap and optimize production efficiency, thus curbing greenhouse gas emissions. This proactive approach to process design and optimization supports our climate footprint goals and maintains data integrity in sensitive environments.To illustrate our approach's effectiveness, we present a case study showing how data and technology provide insights into product climate impact. Leveraging data analytics and predictive modeling, we identify opportunities for improvement and implement targeted control mechanisms in production processes. This case study exemplifies Merck Electronics' commitment to sustainable innovation in the semiconductor industry.

Biography
Anja Muesch has been Head of Use Case Management at Merck Electronics since 2022 focusing on data & digital portfolio management for the Semiconductor Materials Business with preceding experience in managing a sector-wide digital transformation project focusing on advanced data analytics, data access and data automation.Prior to her role, Anja Muesch was Associate Consultant at Merck Inhouse Consulting managing strategy projects for Merck’s Electronics, Life Science and Pharma business.Anja Muesch received a Master of Science degree in Business Chemistry from Heinrich-Heine-University in Düsseldorf, Germany and the Universiteit van Amsterdam, The Netherlands, focusing on environmental chemistry and financial investments.

Empowering Tomorrow: Materials Intelligence Driving Sustainable Innovation

Beckmann, Kai
Member of the Executive Board and CEO Electronics
Merck KGaA

Abstract
Semiconductor Materials are the foundation upon which modern chips are built, driving advancements across industries from artificial intelligence to next-gen computing. Europe, with its strong research base, and commitment to sustainability, can play a pivotal role in driving these advancements. In this keynote, we will explore how Materials Intelligence is not only enabling innovation but is also key to addressing the sustainability challenges of our time. Through groundbreaking innovations and cross-industry collaboration, semiconductor materials are shaping the future of technology. Join us as we delve into the latest developments and discover how they are shaping the next wave of global innovation and prosperity.

Biography
Kai Beckmann, born on September 13, 1965 in Hanau, Germany, joined the Executive Board of Merck in April 2011. He is responsible for the Electronics business sector (formerly Performance Materials), which he has been leading as CEO since September 2017. In October 2018, Kai Beckmann took also over the responsibility for the Darmstadt site and Inhouse Consulting. In addition, he acts as Country Speaker Germany with responsibility for co-determination matters.Prior to his current role, Kai Beckmann was Chief Administration Officer of Merck with responsibility for Group Human Resources, Group Business Technology, Group Procurement, Inhouse Consulting, Site Operations and Merck Business Services as well as Environment, Health, Safety, Security, Quality. In 2007, he became the first CIO of Merck, with responsibility for Corporate Information Services. From 2004 to 2007, he served as Managing Director of the Merck companies in Singapore and Malaysia, and prior to that he held senior executive responsibility for the Information Management and Consulting unit from 1999 to 2004. He began his career at Merck in 1989 as an IT system consultant.Kai Beckmann studied computer science at the Technical University of Darmstadt from 1984 to 1989. In 1998, he earned a doctorate in Economics while working.

Unlocking Infrared Multispectral Imaging with Pixelated Metasurface Technology

Altuzarra, Charles
Chief Executive Officer and Cofounder
Metahelios

Abstract
All camera sensors made to take pictures in color require the integration of color filter arrays (CFAs). However, CFA technology has a fatal flaw, they are not made to filter light in the infrared range, in particular in the shortwave infrared (SWIR) range specific to InGaAs and QD sensors. However, obtaining spectral information in the SWIR range is crucial across almost all industries including consumer, earth observation, national security/defense and automotive.In this presentation, we introduce Metahelios' Infrared filter arrays (IFAs) developed with our signature pixelated metasurface technology. More to that, we discuss the implied opportunities for applications of compact SWIR multispectral cameras that require no moving parts.

Biography
Dr. Charles Altuzarra graduated from the Nanyang Technological University (NTU) with a PhD in physics with a focus on experimental quantum optics and metamaterials. During that time he was a researcher under the CNRS/Thales/NTU alliance. He then held positions at Heriot-Watt University, Texas A&M University's Institute for Quantum Science & Engineering (position funded by the Air Force Office of Scientific Research), and University of Glasgow in Scotland. He then cofounded Metahelios with his business partner Dr. Yash Shah in 2022. Metahelios develops cutting-edge pixelated metasurface technology for the consumer, defense and space industries.

Supporting Fab Operations Using Multi-Agent Reinforcement Learning

van Heugten, Jasper
CTO
minds.ai

Abstract
As semiconductor operations grow increasingly complex, optimizing production schedules has become too challenging for advanced algorithms and skilled manufacturing engineers (MEs). We present how real-time machine learning, specifically reinforcement learning (RL), can enhance decision-making in semiconductor fabrication facilities.Modern 300MM semiconductor fabrication facilities face challenges such as complex hierarchical structures, high financial stakes, and dynamic processes. These facilities contain thousands of tools with unique capabilities, resulting in intricate dispatching schedules. Frequent schedule updates are required due to maintenance, failures, and shifting priorities. This constant updating makes it impractical for MEs to manually optimize scheduling parameters.To address these issues, we present an RL-based solution to support MEs in scheduling decisions. RL uses simulations and historical data to generate optimized scheduling strategies tailored to current FAB conditions. Automating routine tasks allows engineers to focus on exceptional occurrences and enhance productivity. The system offers real-time schedule modifications to improve key performance indicators (KPIs) like throughput, tool idle time, and critical queue time constraint violations. Machine learning integration not only improves these KPIs but also enhances engineers' quality of life by reducing time constraints.The deployed solution has shown significant improvements in wafer production and operational efficiency with virtually no downsides. The implementation is built using the minds.ai Maestro framework and robust and automated Machine Learning Operations (MLOps) processes.Combining advanced machine learning techniques with the expertise of MEs has increased wafer production and improved engineers' quality of life. This approach demonstrates AI's transformative potential in complex manufacturing environments.

Biography
Jasper van Heugten is the Chief Technology Officer at minds.ai. He leads the research and development of the minds.ai Maestro product, an optimization suite for Semiconductor Manufacturing leveraging state-of-the-art Deep Learning (AI) methods, including Deep Reinforcement Learning. He has 9 years of experience in scaling AI from early idea to production at Fortune 100 companies across multiple industries, such as Semiconductor, Pharma, Automotive, Renewables, and Big Tech. He holds a PhD in Theoretical Physics from Utrecht University, the Netherlands.Itzik Gilboa is the CEO of minds.ai, responsible for driving the growth of the company’s revenue and profitability and positioning the company as a strategic partner to its customers.Itzik joined minds.ai in 2023 with over 30 years of Semiconductor Manufacturing technology experience in roles ranging from process technology development, operations management, strategy development, to end product business development and management. Itzik held executive leadership positions at Cypress Semiconductors, SanDisk and Western Digital.Itzik has multiple patents in semiconductor process technology, holds a Master’s degree in Business Administration from San Jose State, a Master’s degree in Materials Science from The Technion IL and a Bachelor’s of Science in Aerospace Engineering from the Technion IL.

Advanced Electrolytes Meeting Future Requirements in Microbump Technology

Stubbe, Jessica
Global Application Manager
MKS Instruments / Atotech

Abstract
In this study, we investigate the challenges and advancements associated with meeting emerging bump requirements in advanced packaging technologies through optimized Electrochemical Deposition (ECD) plating processes. Tracing the historical evolution from Flip Chip to 3-D stacking, the industry's demand for smaller bump sizes and pitches is emphasized. We address the complexities of ECD Cu, Ni(-alloy), and Tin(-alloy) processes, focusing on microbump development and evaluating NiFe alloy as a superior diffusion barrier. The study concludes by highlighting empirical results, offering experimental solutions for miniaturization challenges in advanced packaging, with a particular focus on the promising performance of NiFe as a barrier material.

Biography
Jessica Stubbe studied chemistry in Berlin, where she earned her PhD in coordination chemistry with a focus on electrochemistry. Her career began at Atotech as a scientist in the semiconductor department. Through hard work and dedication, she advanced to lead the electrochemical deposition team in the semiconductor division, overseeing application processes and ensuring optimal performance in their projects.

Mechanism of antiferroelectricity in polycrystalline ZrO₂

Ganser, Richard
PhD Student
Munich University of Applied Sciences

Abstract
The size and electric field dependent induction of polarization in antiferroelectric ZrO₂ is the key to several technological applications that were unimaginable a decade ago. However, the lack of a deeper understanding of the mechanism hinders progress. Molecular dynamics simulations of polycrystalline ZrO₂, based on machine-learned interatomic forces with near ab initio quality, shed light on the fundamental mechanism of the size effect on the transition fields. Stress in the oxygen sublattice is the most important factor. The so constructed interatomic forces allow the calculation of the transition fields as a function of the ZrO₂ film thickness and predict the ferroelectricity at large thickness. The simulation results are validated with electrical and piezo response force microscopy measurements. The results allow a clear interpretation of the properties of the double-hysteresis loops as well as the construction of the free energy landscape of ZrO₂ grains.

Biography
Dear Ladies and Gentlemen,My name is Richard Ganser and I work as PhD student at the Munich University ofApplied Sciences since February 2021. After my bachelor’s degree in technical physics,I decided to deepen my knowledge of semiconductor electronics by studying micro- and nanotechnology. During my studies, I got to know the tools of modern semiconductor research and production from both the theoretical and experimental sides. Inspired by the rapid progress in the field of chip technology, I decided to pursue a PhD in the field of materials science with a focus on ultrathin ferroelectric films for use in state-of-the-art high-performance chips.The basic idea behind the use of ferroelectric materials is to utilize them as non-volatile random access memory, since the access speed is similar to that of classical RAM, i.e. a working memory that retains its last state when powered off. This development would revolutionize today’s computer technology by eliminating the separation between RAM and classic flash memory (hard disk). Even today, the bottleneck in high-performance AI chips is no longer the actual computing power, but the communication speed between RAM and flash, the so-called von Neumann bottleneck, which could be overcome by using FeRAM. FeRAM with ferroelectric PZT as gate layer has been on the market for a long time, but PZT loses its ferroelectric properties below 30nm thickness, which makes the required miniaturization impossible, due to the resulting limited transistor density the devices in question remain uneconomically large and low in performance. Hafnium- and zirconium oxide, introduced 10 years ago, offer an attractive alternative by retaining their ferroelectric properties down to a few nanometers. Much research is being carried out to stabilize and optimize the desired properties, both experimentally and theoretically, as the exact origin of the ferroelectric properties has not yet been conclusively clarified. As part of an international team with groups in France and Portugal, among others, we support our experimental project partners in Dresden with the help of computer simulations. These allow predictions to be made about remanent polarization and phase stability as a function of deformation, doping, and temperature. This requires enormous computing power, which is why we calculate on the SuperMUC in Garching. Despite the use of high-performance computing, conventional ab initio simulations are limited to a few hundred atoms and a few thousand simulation steps. A new method I am using is the use of machine-learned potentials based on ab initio training data. These potentials model the interaction, attraction and repulsion, of the individual atoms among each other and can thus be computed several thousand times larger, up to about 10 cubic nanometers, which corresponds to a realistic grain size in thin films, and several hundred times faster. This allows the investigation of temperature-dependent properties with high statistics and accuracy, such as the change in polarization and even phase transformations down to the smallest atomistic detail. In my work, I also coupled external electric fields to the ions. In this way, I obtained the extensive pyro- and piezoelectric properties of ZrO2 as a function of temperature, which include electrostriction, giant piezoelectric effects at the phase boundary, and negative genuine piezoelectric coefficients. By coupling electric fields into the transient simulation, the ferroelectric switching behavior can be simulated and questions such as the writing speed, which is of enormous importance for use in high-performance computers, can be answered.Another question that remains unanswered is how to stabilize the antiferroelectricity in zirconia. While zirconia crystallizes in a weakly dielectric phase, the monoclinic phase, as a bulk material, e.g. used as dental prosthesis, a strongly dielectric phase, the tetragonal phase, is formed in films below 10 nm, which is already used today as a high-k gate material. Ab initio calculations of pure crystals show that the tetragonal phase transitions to the monoclinic phase due to the higher free energy, which is a discrepancy between simulations and experiments in thin films. Using machine-learned potentials with molecular dynamics simulations, we can simulate a polycrystalline ZrO2 thin film including the grain boundary, stabilize the tetragonal phase at room temperature and investigate the piezoelectric response in direct comparison with experimental piezoelectric force microscopy data. This result represents a breakthrough in solid-state materials simulation and is currently being published in great detail in Advanced Functional Materials. After stabilizing the antiferroelectricity at room temperature in simulations and experiments, the next step in simulation is the addition of hafnium to the machine-learned potential to stabilize the ferroelectric phase over a wider range of film thicknesses and grain sizes, in agreement with experimental results, and to allow a gradual polarization of the films, for example via the grain size distribution. This gradual polarization of the films is of great industrial interest as it allows the modeling of individual synapses. The degree of polarisation and thus the current flowing through the FET is used to store the weight, the strength of the connection between the synapses, in the neuronal network. This hardware approach could enable significant miniaturization of the required computing architecture and lay the foundation for the development of future AI.Sincerely yours,Richard Ganser

A Paradigm Shift From Imaging to Vision: Oculi Enables 600x Reduction in Latency-Energy Factor for Visual Edge Applications

Rizk, Charbel
Founder CEO
Oculi

Abstract
Remarkable progress has been achieved in AI, particularly in the use of deep neural networks, which has significantly enhanced the reliability of face detection, eye / hand tracking, & people detection. However, performing these tasks still demands substantial computational power & memory resources, making it a resource-intensive endeavor that remains to be solved. Consequently, power consumption & latency pose significant challenges for many systems operating in always-on edge applications. The OCULI SPUTM (Sensing & Processing Unit), ideal for smart vision applications, represents an intelligent, programmable vision sensor capable of configuration dynamically to output select data in various modes depending on use case needs. These modes include video, polarity events, smart events, regions of interest (ROI), sparse random access, & actionable information that make the vision sensor efficient. Moreover, the SPU allows real-time programmability of spatial & temporal resolution, as well as dynamic range & bit depth. By enabling continuous optimization, visual AI solutions deploying the SPU can reduce the latency-energy factor by more than 600x at a fraction of the cost. Smart events, ROI, random access, & actionable information output modes are unique to the OCULI SPU. Because the SPU is fully programmable, it can be dynamically optimized between latency & power consumption. It will enable the first truly wireless battery-operated always-on Visual AI products in the market. We will provide an overview of Oculi’s novel vision architecture for edge applications, as well as key results for latency & energy results for multiple use cases of interest. Applicability to various markets including presence/people/pedestrian/object, face, hand, & eye detection will be reviewed. Finally, our results include a comparison with conventional solutions that demonstrate significant advantages in adopting a paradigm shift from imaging to vision for visual edge applications.

Biography
Charbel is Founder and CEO of Oculi. Prior to this venture, Charbel was an Associate Research Professor at Johns Hopkins University, where he was recognized as a top innovator, thought leader, and successful Principal Investigator of multiple innovative and far-reaching concepts and technologies. He has had numerous publications and intellectual property filings, and received 12 achievement/recognition awards. Dr. Rizk was a pioneer in UAV technology, AI & machine learning, and autonomy. He has been a visionary for the optimized signal-to-information architecture that embodies dynamic software-defined multi-modal sensing and fusion and true edge processing.

Innovation and Collaboration: Powering Sustainable Exponential Growth

Vuorikari-Antikainen, Anna-Riikka
Chief Commercial Officer
Okmetic Oy

Abstract
***See Victoria***

Biography
Anna-Riikka Vuorikari-Antikainen has a 30+ years’ track record in the semiconductor business. She has worked for the silicon wafer producer, Okmetic, in several management positions during this time. Okmetic is the market leader in advanced, customized silicon wafers for the production of MEMS, sensors, radio frequency filters and devices as well as power devices.Vuorikari-Antikainen has held the position of Chief Commercial Officer since 2020. Prior to this, Vuorikari-Antikainen was Senior Vice President, in the fields of both Products and Customers and Markets, with a full grasp of product and process development as well as Okmetic’s global sales.Prior to her membership in the Executive Management Group, Vuorikari-Antikainen held positions in quality, planning, and new business development at Okmetic since 1992. She has a Master of Science degree in physical metallurgy and strategies and international marketing from Helsinki University of Technology (today Aalto University).Positions of TrustVuorikari-Antikainen is an active member in SEMI organization, such as SEMI’s Silicon Manufacturers Group (SMG) and the International MEMS/MST Industry Forum Committee (MEMS) in Semicon Europe.She has been a board member of several Finnish tech companies and keeps contributing to the MEMS cluster in Finland.

New Topology for MEMS Advances Performance and Speeds Manufacturing

Aguilar, Eric
CEO
Omnitron Sensors, Inc.

Abstract
For too long, complex, expensive and laborious ways of manufacturing MEMS deviceshave slowed the growth of a critically important microscale technology.Omnitron Sensors has introduced a new topology for MEMS — its process IP — which rearranges existing modules to streamline the assembly process and improvecapacitance per unit area. This approach increases device performance andaccelerates the production of MEMS devices for price-sensitive, high-volume markets.Omnitron’s first product, a 3D MEMS step-scanning mirror for long-range LiDAR, is aproof point of its topology. Omnitron’s device is a large 15mm in diameter mirror withtens of degrees of motion and the ability to do step scanning. It’s the first MEMS mirrorto meet the full requirements of FMCW, addressing the mechanical-articulation needs ofmodern LiDAR in autonomous navigation and ADAS.The speaker will provide an overview of Omnitron’s topology for MEMS and will explainhow it may be applied to precision applications such as LiDAR, augmented reality, andimage stabilization.

Biography
Eric Aguilar is a visionary leader in advanced sensor systems for complexapplications such as robotics and autonomous platforms.Eric’s expertise includes leading teams at Tesla, where he managed a crew of 300engineers on the firmware for Model 3, and at X, where he spearheaded thedevelopment of Google Project Wing, an autonomous drone delivery service.Eric led sensor integration at Argo AI. He previously steered product development for asensor company later acquired by Google for $85M.Eric earned a BS in Electrical Engineering from California State Polytechnic University.

Powering Sustainable AI

Carson, Felicity
CMO and SVP
onsemi

Abstract
We stand at a critical tipping point in the realm of power. Over the past year, the convergence of artificial intelligence (AI) and electrification, two global mega trends, have sparked an unprecedented demand for energy. This surge presents both a significant challenge and an extraordinary opportunity. Central to this development are power semiconductors, which are now in high demand due to their ability to enhance energy conversion and management. Power now represents the new frontier, with the rate of innovation in this area set to determine the growth trajectory of these markets. The intensive computational needs of AI learning models are well-known, necessitating vast amounts of power and contributing to increased carbon emissions. However, the integration of AI data centers with cutting-edge power semiconductor technology offers a viable solution to drastically cut energy use and costs, all while supporting the escalating computational needs of AI. As AI's presence grows, so does the importance of semiconductor innovation in mitigating its environmental footprint and promoting a sustainable, digital future. As a keynote speaker at SEMICON Europa, Felicity Carson will offer her insights on the responsible deployment of AI and the importance of transparency in energy requirements to ensure AI's sustainable expansion.

Biography
Felicity Carson joined onsemi in August 2021 as senior vice president and chief marketing officer. Felicity is a seasoned global marketing leader with extensive B2B experience spanning across middleware, applications and industrial software, and technology. Her wealth of experience comes from leading multiple marketing functions, from demand generation to brand and portfolio marketing. She is an accomplished executive with a successful track record of delivering results and effectively leading cross-functional teams across many business units.Felicity joins onsemi from AVEVA, where she was the senior vice president of global performance marketing. Prior to AVEVA, Felicity had a two-year tenure at SAP where she was the Head of Customer Experience and Global Events and received several awards including the Marketing Excellence Award for Great Leadership. Felicity also spent over 17-years at IBM where she led several marketing functions, including as the CMO for IBM Watson Customer Engagement, a $1.4 billion business unit responsible for SaaS and on-prem customer experience applications. She was instrumental in leading IBM’s marketing transformation and was recognized for her data driven insights and execution excellence, which led her to be voted as one of the top 10 most influential women in MarTech by B2B Marketing in 2016.Felicity is a graduate of Damelin College and School of Business Management in South Africa and is certified by the Public Relations Institute of South Africa (PRISA).

Advancements in Photonic Integration Technologies: Meeting the Challenges and Expanding Opportunities

Rahim, Abdul
Ecosystem Manager
PhotonDelta Foundation

Abstract
Due to the exponential growth of Gen AI, photonic integration is becoming essential for creating high-speed, low-latency, low-energy optical connectivity. Photonic integration is a versatile technology with tremendous potential for use in healthcare, mobility, agrifood, and quantum computing markets. To realize this potential, advancements in photonic integration technologies are required in new process development, unique functional building blocks, integrating new materials with existing technology, and innovative packaging and assembly methods. This presentation will showcase examples of advancements in these areas.

Biography
Since February 2024, Dr Abdul Rahim has been the Ecosystem Manager at PhotonDelta - a growth accelerator for integrated photonics. In this role, he focuses on strengthening the PhotonDelta ecosystem through ecosystem development, fostering collaboration between the ecosystem partners, tracking the technology trends and aligning the PhotonDelta ecosystem with the market needs. Abdul Rahim holds a degree in innovation management and entrepreneurship from HEC Paris. In 2014, he earned his PhD from Technische Universitaet Berlin, Germany. His research focuses on silicon photonics for optical communication. From 2015 to 2024, Abdul Rahim managed ePIXfab - the European silicon photonics alliance and transformed it into an open alliance to promote silicon photonics science, technology, and application.

Session Chair

Notarnicola, Giovanni
Partner and Head of Semiconductor Industry
Porsche Consulting

Abstract
Session Chair

Biography
Giovanni Notarnicola is an electronic engineer with an international career spanning over 18 years, marked by deep expertise in the semiconductor industry and strategic transformations. He began his journey at the CERN in Geneva, where he contributed to cutting-edge projects in particle physics, an experience that laid the groundwork for his ability to tackle advanced technological complexities.In 2008, he was selected for the "high potentials" program at Bosch, where he worked at both central and plant levels across Europe and Asia, leading strategic transformations in supply chain, production, and IT for the automotive sector. This experience allowed him to develop a deep understanding of industrial production processes and lead global optimization and innovation projects.In 2012, Giovanni joined Porsche Consulting, initially leading strategic transformation projects across various industrial sectors, including manufacturing, consumer goods, and automotive. Over time, he took on roles of increasing responsibility, eventually becoming Global Head of the Semiconductor Industry at Porsche Consulting, where he is responsible for growing the industry practice. In this role, he supports the strategic transformations of key industry players in the post-COVID world, focusing on building new capabilities and challenging the status quo to drive a higher level of performance. His work leverages innovative technologies such as AI applied to operations and the development of lights-out factories, while also providing strategic support on geopolitical challenges and innovation to help the industry achieve greater resilience and global competitiveness.In addition to his role at Porsche Consulting, Giovanni is Chairman of several initiatives within the strategic partnership between SEMI and Porsche Consulting, aimed at contributing to the development of a technologically advanced and competitive ecosystem for the semiconductor industry.

Addressing Nature-Related Risks and Regulations in Semiconductor Landscape: Circular Economy as Key to Transforming the Semiconductor Industry

Kirr, Klaus
Associate Partner
Porsche Consulting GmbH

Abstract
As the semiconductor industry navigates the complexities of a rapidly changing world, the state of nature presents significant risks and disasters that cannot be ignored. This keynote will delve into the critical intersection between the semiconductor sector and the natural environment, highlighting how the industry’s consumption of water, electricity and land use impact key threats to nature while simultaneously relying on essential ecosystem services. The semiconductor industry requires to exploit this opportune momentum by proactively develop pragmatic and standardized indicators to monitor and improve the nature conservation using state-of-the-art digital solutions.We will explore the transformative potential of circular economy strategies — reduce, redesign, recycle, and reuse—as effective solutions to mitigate the industry’s environmental footprint. These strategies not only address the pressing nature impacts but also offer pathways to innovation and resilience.

Biography
Klaus Kirr, Associate Partner at Porsche Consulting, combines industry know-how and operations strategy. With 15 years of experience in diverse industries across various leading OEMs and 7 years in consulting, Klaus specializes in circular economy, and zero impact factory context. His profound industry knowledge and strategic acumen position him as a key driver of sustainable transformation. Klaus’s innovative methodologies and forward-thinking approaches are pivotal in steering organizations towards enhanced efficiency and sustainability.

Turbocharged Transistors: Silicon Carbide Shifting to Next Gear

Ruhnau, Marius
Sr. Manager | Advanced Products & Technologies
Porsche Consulting S.A.S.

Abstract
In the context of global megatrends – including the climate crisis, the impact of AI on various industries, and global decoupling – the demand for high-performing, efficient, and reliable power electronics remains substantial. Silicon carbide-based power semiconductors offer technical advantages over traditional silicon-based solutions. The automotive sector is expected to drive significant market growth. However, in specific applications, other substrates like Si, GaN, or ultra-wide bandgap materials may remain relevant or take precedence. To foster a fast-growing and sustainable SiC market, addressing three key challenges in product development, process optimization, and raw material supply chain management will be essential for the entire value chain.

Biography
Since 2019: Porsche Consulting Germany and France Manager with competence focus semiconductor technology, product strategy and development, product cost optimization, design to cost, cost reduction and profitability programs.

Attracting Diverse Talent to the Microelectronics Industry

Coates, Matthew
Project Manager
PTvT

Abstract
N/A. N/A. N/A.

Biography
Matthew Coates is a project manager on the international team of the Dutch National STEM platform, PTvT. As a member of the international team, Matthew primarily works with the EU STEM Coalition - a network of STEM platforms, education ministries, and universities accross Europe, of which PTvT holds the position of secretariat.

Next Generation Quantum Dot SWIR Sensors

Naber, Ronald
Senior Process Development Engineer
QDI systems

Abstract
Short-wave infrared (SWIR) image sensors play an important role in various defence and security applications, including low-light-level imaging, laser detection and range finding. Pixelated detectors made of indium gallium arsenide (InGaAs) have shown excellent performance for SWIR imaging, however, the cost remains the major barrier for adaptation. In this talk we will present a low-cost, next-generation SWIR sensor. We have developed an alternative technology which relies on lead sulfide quantum dot (PbS QD) photon absorber, which is monolithically and directly deposited on a CMOS readout chip via solution-based process. The uncooled sensor achieves the QE of >20% at 1550 nm with the dark current of 50 nA/cm2. Additionally, the sensitivity range can be extended further to 2.1 um. The technology is suitable for wafer-level manufacturing, thus driving the sensor cost more than an order of magnitude lower. We will present a comprehensive characterization of QD-based imager and demonstrate real-life use cases.

Biography
Dr. Ronald Naber is a cientist and technology expert. Within his area of expertise of (opto-)electronic materials and devices, he has a proven track record of innovating and successfully translating innovation into practical production solutions. He earned his PhD in Applied Physics and his MSc in Chemical Physics from the University of Groningen.

Quantum Failure Analysis for the Semiconductor Industry

Bruckmaier, Fleming
CTO
QuantumDiamonds GmbH

Abstract
Advanced packaging solutions such as 2.5/3D integration and chiplets, are becoming essential. However, they complicate access and introduce new failure modes including verticals. Similar problems arise with modern trends such as the move to backside power delivery or new materials for high power devices.Diamond-based quantum sensing can image currents from multiple layers non-destructively via their magnetic field. The technique is capable of detecting defects in hidden layers and infere three-dimensional current density distributions. In addition, high sensitivity is achieved at DC currents as well as higher frequency bands up to several GHz. In this talk, we will present the capabilities of the innovative technique with examples from multiple industries including advanced packages.

Biography
Dr. Fleming Bruckmaier has seven years of working experience in quantum technologies, including a PhD from the Technical University of Munich. He worked on cutting-edge diamond-based technologies targeted at the semiconductor and bio-tech markets resulting in several publications in prestigious journals such as Science Advances or Nature Communications.Since 2022 he is CTO at the Munich-based quantum sensing company QuantumDiamonds, which develops magnetic field microscopes, used in semiconductor electrical failure analysis.

Pioneering Non-invasive Wearable MIR Spectrometry for Key Health Biomarkers Analysis

Kischkat, Jan F
CEO
Quantune Technologies GmbH

Abstract
Modern medicine has improved dramatically through a better understanding of what causes a condition or what it is correlated to. However, the healthcare system still follows an episodic (reactive) model, where patients only seek medical advice when there are symptoms, which, for certain medical conditions, has proven critically insufficient. Several biomarkers such as uric acid, free fatty acids, or ketone bodies correlate with and thus indicate aspects of chronic conditions such as the metabolic syndrome, prediabetes, or diabetes. The more biomarkers can be measured and quantified with high accuracy, the easier it becomes to make conclusive decisions on the patient’s status.Quantune Technologies provides an alternative approach for the measurement of biomarkers, using Mid-Infrared (MIR) Spectroscopy (or simply Infrared Spectroscopy, not to be confused with Near-Infrared Spectroscopy), the most powerful laboratory analytics tool, used in biological and chemical labs around the world for decades to analyze, among many other things, the molecular composition of body fluids and tissue. Currently, this kind of technology is stuck to laboratory use only due to its desktop size, the need for a vibration-free environment, cryogenic temperatures, and extensive sample preparation and maintenance. Additionally, the devices are expensive, with a cost of around 100k€. Quantune has developed an MIR spectrometer based on a widely tunable Quantum Cascade Laser and touch-detector based on the photoacoustic effect. It is miniaturized to wearable-level with hyper-scalable production for volume markets. It is also robust and suitable for everyday use. The spectral coverage of the technology of 5–11 μm is ideally suited to detect biomarkers non-invasively and pain-free in the interstitial fluid in the skin.

Biography
Jan studied physics at Humboldt-University Berlin and at the University of Illinois at Urbana-Champaign with a Fulbright scholarship. For his PhD, he worked on novel External-Cavity Quantum Cascade Lasers, before founding Quantune Technologies in 2019. Quantune is transforming infrared spectroscopy by bringing its lab-grade analytical power to new markets and people’s lives. He co-authored 6 patent families and has won several scientific awards, most notably the 2023 Bertold Leibinger Innovationspreis.

A quantum leap in the relationship with sustainable computing

Daval, Nicolas
Senior VP of Engineering
Quobly

Abstract
There are problems that current computers will never have the computing capacity to solve, others that could be solved much more efficiently. Quantum computers will reach uncharted territory in the fields of quantum mechanics & chemistry, AI, complex optimization, or system dynamics modeling. Quobly will leverage the existing semiconductor industry to produce a cost-competitive, full-scale computing system, adapted to the need of its future customers. Through the use of well-known, high-performance semiconductor technologies, notably FD-SOI, Quobly has a pragmatic and sustainable path to get computing into the next generation.

Biography
Nicolas Daval is Senior Vice President of Engineering at Quobly, bringing over 20 years of experience from semiconductor giant Soitec, where he played a key role in launching FD-SOI technology. At Quobly, his focus is on scaling quantum technology hand-in-hand with industry partners and building an effective, collaborative engineering team. He is responsible for both team dynamics and manufacturing partnerships.

Intelligence through Vision

Goossens, Stijn
CTO
Qurv

Abstract
Computer vision (CV) enables machines and their users to interpret and understand the world around them, making them more intelligent. Current CV systems face limitations under adverse weather or light and struggle to capture more information than a human already sees. Wide-spectrum image sensor technology overcomes these challenges by providing eye-safe active illumination without sunlight interference, offering the ability to penetrate through fog or smoke, and enabling molecular imaging. Quantum dot (QD) based technology is an attractive candidate for high-volume manufacturing of affordable and RoHS-compliant wide-spectrum image sensors. Qurv presents its latest QD-based wide-spectrum image sensor developments, focusing on scalability and computer vision-first use cases.

Biography
Dr. Stijn Goossens is CTO of Qurv and a pioneer in wide-spectrum image sensor technologies based on quantum materials such as colloidal quantum dots. He is inventor of multiple patents in qurv’s portfolio. He obtained his PhD from Delft University of Technology and continued his career as a team lead at the Institute of Photonic Sciences (ICFO). In 2020, he co-founded Qurv as a spin-out of ICFO to develop and commercialize wide-spectrum image sensor technology for high volume computer vision applications.

Explore the Journey of a Young Engineer Driving Innovation in the Semiconductor Industry

Döll, Patrick
Phyiscal Implementation Engineer
Racyics GmbH

Abstract
Get an insight to my journey as a SEMI 20 under 30 winner, from early years through university to managing cutting-edge projects in the semiconductor industry. Discover what the workday of a chip designer in a mid-tier business looks like and where the role extends beyond engineering to project management, marketing, and product leadership. In this talk, I will share my personal experiences and challenges, illustrating how a passion for semiconductors can lead you to diverse and rewarding career paths. Furthermore, together we will explore the world of semiconductor design within Racyics – Europe’s leading Design Partner for Integrated Circuits - and highlighting the unique opportunities for growth and innovation. We will also touch on the future opportunities within the company, offering insights into how these roles can evolve and intersect.Whether you're curious about the life of a chip designer or eager to explore broader opportunities in microelectronics, this talk offers valuable insights and inspiration for anyone at the start of their professional journey.

Biography
Patrick Döll is an experienced Physical IC Design Engineer at Racyics with a master's degree from the RWTH Aachen university, specializing in Micro- and Nanoelectronics. Due to his contribution to numerous tapeouts in advanced nodes, he shows expertise in the entire chip design process, from the initial design stage to the final product, which allows him to manage cutting-edge projects in the semiconductor industry. On top, he actively supports the Design Enablement Service of Racyics by participating in the product development of makeChip - a cloud-based chip design platform - and is involved in the company's marketing efforts.

Advanced Materials with Tailored Thermal Properties for Advanced Packaging Application

Vozarova, Maria
Material and 3D Printing Researcher
RHP-Technology GmbH

Abstract
E. Neubauer¹, Z.Kovacova¹, Lea Babejova¹, Maria Vozarova¹, Carmen Vladu¹, M.Kitzmantel¹, D.Dewire², J.Vriens²¹RHP-Technology GmbH, A-2444 Seibersdorf²Hi-Rel Alloys – A Qnnect Company, Niagara Falls, ON L2H 0Y5, CanadaLightweight dissipative materials with tailored Coefficient of Thermal Expansion (CTE) is a focal point in materials used in electronic packaging applications. This research aims on materials possessing not only high thermal conductivity, but also allowing to provide significant CTE reduction to conventional Aluminum, Copper and Silver alloys widely employed in electronics. A second material category comprises aluminum alloys reinforced with carbon fibers or with Silicium Carbide (Al-SiC). Especially the fiber reinforced composites allow to tailor the anisotropy of thermal properties. New concepts for the manufacturing have been applied, including methods such as direct hot pressing which allows a precise control of the SiC or Carbon fiber content and facilitates the production of large plates with uniform microstructure up to 400 mm in diameter. This approach allows minimizing energy consumption, while ensuring customizable properties and enhanced thermal and mechanical performance tailored for specific applications. Thermophysical analysis have been carried out showing the positive impact of the inserts on the reduction of the coefficient of thermal expansion as well as the improvement of the thermal diffusivity/conductivity value. Examples of different shapes and heat sink components, which were realized, will be presented.

Biography
Coming Soon

Superconducting Quantum Computing: Building on Decades of Semiconductor Innovation for Transformative Computational Power

Kulkarni, Subodh
CEO
Rigetti Computing

Abstract
Superconducting quantum computing is one of the leading modalities of quantum computing, a fundamentally different approach to processing information. Quantum computing has the potential to transform how many industries address their most challenging problems. Discover the current state of quantum computing and how Rigetti is leading the way to enable hands-on access to quantum hardware to continue to push the boundaries of what’s possible with this revolutionary technology.

Biography
Dr. Kulkarni has served as President and Chief Executive Officer at Rigetti since December 2022. Dr. Kulkarni is a seasoned public company CEO with thirty-plus years of experience in the semiconductor industry and a track record of success in scaling and commercializing cutting-edge technologies. Prior to joining Rigetti, Dr. Kulkarni was President, CEO, and member of the Board of CyberOptics Corporation, a developer and manufacturer of high precision sensors and inspection systems for the semiconductor and electronics industry. He held these roles from 2014 until CyberOptics was acquired by Nordson Corporation in November 2022. Prior to CyberOptics, Dr. Kulkarni was CEO of Prism Computational Sciences, a developer of software tools for scientific and commercial applications in the semiconductor industry. Earlier in his career, he held additional leadership positions, including Chief Technology Officer and Senior Vice President of OEM/Emerging business, global commercial business, R&D and manufacturing at Imation, a global scalable storage and data security company. Dr. Kulkarni began his career in research and management positions with 3M Corporation and IBM. He received his B.S. in chemical engineering from the Indian Institute of Technology, Mumbai, and later obtained a M.S. and Ph.D. in chemical engineering from MIT. Dr. Kulkarni currently serves on the Board of KeyTronic Corporation, a publicly traded electronics manufacturing services company, as well as Chairman of the Board for Prism Computational Sciences.

Session Chair

Hansen, Uwe
VP Power Component Development
Robert Bosch GmbH

Abstract
Session Chair

Biography
Uwe Hansen received his PhD in Physics at the Technical University from Munich. He specialized in theoretical semiconductor physics. Uwe started his career at Bosch as a process engineer in the Bosch automotive Waferfab, held various functions within Bosch related to semiconductors and was responsible for advanced packaging for CE and automotive MEMS. Since 2018 he is heading the department for power component and module development at Bosch.

Requirements on the pilotlines under the ChipsAct for the Industry

Joeres, Stefan
Vice President for Business Development, Semiconductor Strategy and Strategic Projects
Robert Bosch GmbH

Abstract
No abstract

Biography
Stefan Joeres has been Vice President for Business Development, Semiconductor Strategy and Strategic Projects of Robert Bosch GmbH since 2014.Born in Mönchengladbach, Germany, on April 15, 1977, he is married and has two children. He studied electrical engineering and information technology at RWTH Aachen (Germany).He Graduated as Dipl.-Ing. And finalized his doctorship in 2008 about system simulation for high-frequency circuits at the RWTH Aachen.

TRANSFORM: Trusted European SiC Value Chain for a greener Economy

Koyuncu, Metin
Senior Project Manager
Robert Bosch GmbH

Abstract
Power electronics systems based on wide band-gap materials play an essential role in future power conditioning and conversion systems. Among these SiC is at the forefront due to its advantages in efficiency and thermal behavior. The EU funded innovation project TRANSFORM demonstrates a complete European SiC based power electronics value chain. 32 partners from industry and academia cover materials, processing equipment, devices, power modules and systems to build up this value chain in essential application domains such as e-mobility, industry, agriculture, and renewable energy. Power MOSFETs are processed in series production lines on advanced SiC substrates. They are benchmarked to standard mono-SiC substrates in aspects of defectivity and processability. Device characteristics are compared to those on standard wafers and devices are used in real applications in various demonstrators. While showing some processing challenges, devices on advanced substrates have shown superior behavior in terms of RDSON, reverse recovery charge and bipolar degradation. Power modules with copper-based assembly and interconnection technologies, i.e. copper bonding on copper metallized SiC with copper sinter paste, are developed showing very promising reliability data. High density power modules as well as new manufacturing approaches are developed that improve thermal and electrical performance. An innovative current source gate driver is developed that enables gate shaping and in-system parameter identification to ensure optimal utilization of single as well as parallel connected power switches. Highest performance at lowest possible cost along the entire lifetime is maintained by taking degradation of power switches and interconnects into account. The innovative technologies are showcased in five demonstrators in above mentioned application domains. This project has received funding from the Key Digital Technologies Joint Undertaking (KDT JU) under Grant Agreement No101007237. The JU receives support from the European Union’s Horizon 2020 research and innovation program and Germany, France, Italy, Sweden, Austria, Czech Republic, Spain.

Biography
Metin Koyuncu joined Bosch in 2001 as an electronics packaging engineer. He has been active in the field of assembly and interconnection technologies for signal and power packages for automotive and photovoltaics, flexible electronics and molded interconnect devices. Currently he is working as a project manager in the power semiconductors and modules unit of Bosch in Reutlingen, active in publicly funded projects. He is the project coordinator of “TRANSFORM” funded by the KDT-JU.

Panelist

Bornefeld, Ralf
Sr. Vice President of Business Line and Engineering Power Semiconductors and Modules
Robert Bosch GmbH

Abstract
Coming soon

Biography
Ralf Bornefeld is Senior Vice President with responsibility for business line and engineering of Power Semiconductors & Modules at Bosch. He joined Bosch in November 2019.Before he held various management positions at Infineon Technologies AG: senior director technology in frontend production from 2005-2008, senior director engineering of automotive sensors until 2011 and finally vice president and general manager business line automotive sensors.Ralf started his career at Elmos Semiconductor in 1992 as a technology development engineer. Afterwards he took several management positions until end of 2004, mostly serving as vice president of R&D and eventually as vice president of business line microsystems.Ralf Bornefeld was born in Schalksmuehle, Germany, in 1964. He graduated with a degree in Electrical Engineering from Technical University of Dortmund in 1992.

SiC Technology – Transfer to 200mm Wafer Size

Schwaiger, Stephan
Automotive Electronics
Robert Bosch GmbH

Abstract
Silicon carbide (SiC) technology has proven to be advantageous compared to silicon technology for high power applications like automotive traction inverters. While the electrification of modern vehicles pushes the maturity of SiC technology, several quality issues associated with the new material system have been discovered and must be tackled to maintain a low level of devices failures during operation.Within this decade, SiC technology will make an important step: The step from 150 mm wafer size to 200 mm wafer size. While this transfer exhibits several advantages, e.g. better process stability and uniformity due to the more modern processing equipment, maintaining the same quality of the products has to be ensured. This talk focuses on the benefits and challenges of the transfer from 150 mm to 200 mm wafer size of SiC technology.

Biography
Stephan Schwaiger studied physics at the university of Hamburg and finished with a doctorate degree in 2012. He started in semiconductor industry in Bosch’s central research department working power semiconductors. Since 2015 he works on the development of SiC semiconductors for the section Automotive Electronics at Bosch focusing on technology and device development.

Data, Standards, People – Enabler of a Smart 300 mm Fab

Fischbach, Sarah
Group lead data analytics and machine learning
Robert Bosch Semiconductor Manufacturing Dresden GmbH

Abstract
To ensure a high-quality and cost-effective manufacturing in a modern semiconductor fabrication it is crucial to install high levels of automation and to leverage big data and AI. The integration of such technologies into a production system, however, can only be successful with a data-centric architecture, strict data governance and standards, and a data-driven mindset of the people shaping those systems. The presentation will illustrate how these enablers were installed and are permanently fostered at the new Bosch 300mm wafer fab in Dresden. Some highlights from the analytics and AI use cases will showcase the effectiveness of those factors.

Biography
Sarah Fischbach is a group lead for Analytics and Machine Learning at Robert Bosch Semiconductor Manufacturing Dresden GmbH. She joined Bosch in 2018 working on strategies for advanced analytics solutions for the new 300mm semiconductor plant. Before that she has been a research associate working on Semiconductor Physics at Technical University of Berlin completing a PhD in 2019. She holds a master’s degree in Physics from Technical University of Berlin and a bachelor’s degree in Physics as well as a diploma in Technical Economics from Karlsruhe Institute of Technology.

Pioneering Precision: AI Enhancements in Packaging Visual Inspection

Van Poucke, Bart
VP Market Strategy and Development
Robovision

Abstract
In the context of back-end packaging and test lines, the semiconductor industry is witnessing a paradigm shift towards Industry 4.0 principles. This represents a significant opportunity for Integrated Device Manufacturers (IDMs) and Outsourced Assembly and Test (OSAT) entities to enhance throughput, minimise capital expenditures, and gain a firmer grip on cost efficiency.Chiplets and heterogeneous integration solutions are characterised by the use of new materials, more complex process steps, and a high level of customization. This results in a growing defect complexity and the need for very efficient and high performance quality control.Traditional approaches often lead to significant time expenditure on recipe creation, as the number of products, customised processes, process steps, and inspection machines increases. Even the most advanced recipes struggle to classify all defects with great accuracy.In this paper, we chart a path to lights out operation in the era of advanced packaging. We first introduce a new approach using deep learning vision AI for defect inspection and then present a path to large scale operation by means of tangible strategies and solutions for the main operational challenges.The approach can be best described as a “Subject Matter Expert first” workflow providing minimum description and knowledge loss in the creation of vision AI models which helps achieve human-like performance. Combined with a set of easy to use governance flows for label purity, data set purity and model performance monitoring this approach also guarantees optimal model performance at initial model creation and during model operation.Instantiating this approach in a systemic way requires a platform approach governing the full model life cycle management with self-service data consumption for SME’s and data scientists. A single platform, providing flexibility in early process research and stability in High Volume Manufacturing.The approach shows an 48% increase in FTE productivity for critical competences like data scientists, process owners and computer scientists and as such tackles the critical competence challenges of the semiconductor industry. The SME-first approach both creates trust with SME’s to start using vision AI, while it enables them to fully drive model outcomes. Last but not least it offers an agile model development capable of driving continuous model improvements and handling the large product mix in an efficient way.

Biography
Bart Van Poucke is leading the semiconductor market strategy and devlopment at Robovision, a platform provider for developing scalable vision AI solutions to power intelligent machines. He started his semiconductor carreer at imec in Belgium in various roles from research engineer towards business devlopment roles.

Unlocking Novel Opportunities:How 300mm-capable MEMS Foundries will Change the Game

Gomez, Jessica
CEO
Rogue Valley Microdevices

Abstract
Although the semiconductor industry began manufacturing on 300mm wafers in the early 2000s, benefiting from economies of scale, design standards, and standardized process nodes, the MEMS industry has lagged. In MEMS, it’s still a single product, single process world – making it time-consuming and expensive to bring new devices to market. As the number of 300mm CMOS fabs continue to increase, so does the demand for 300mm-capable MEMS foundries to support critical technology integration, scalability, and efficiency.For the MEMS industry, the adoption of 300mm wafers will signify a substantial leap forward in manufacturing automation and cost-effectiveness, yet it still presents many challenges. MEMS processing frequently utilizes non-CMOS compatible materials for metallization, sensing and actuation, making it nearly impossible to support both CMOS and MEMS manufacturing in the same facility. To be successful on a 300mm platform, MEMS foundries will need to manufacture a high mix of products to ensure their facilities run efficiently and at capacity.This session will explore how Rogue Valley Microdevices – a pureplay, full-service precision MEMS foundry – has reacted to this need for 300mm MEMS with the construction of its second fab, a flexible, 300mm-capable MEMS foundry in Palm Bay, Florida with production set to begin in 2025. Rogue Valley Microdevices expects to address multiple areas of need, including thin film deposition, through-silicon via (TSV), RDL, UBM, wafer level packaging, and is poised to leverage 300mm technology to propel MEMS sensor development to unprecedented heights.Join us as we explore how flexible, 300mm-capable MEMS foundries promise to revolutionize the integration of microsensors into the supply chain, fostering innovation and unlocking new possibilities for transformative products.

Biography
As founder and CEO of Rogue Valley Microdevices, Jessica Gomez has created a world-class precision MEMS foundry in the heart of Southern Oregon, with a second foundry under construction in Palm Bay, Florida. Integral to her role as CEO, Ms. Gomez practices a business philosophy of offering best-in-class process technology and R&D expertise to customers, to help them achieve the highest quality and reliability in their products. Prior to founding Rogue Valley Microdevices in 2003, Ms. Gomez honed her experience in semiconductor processing and production management through positions at Standard Microsystems Corporation, Integrated Micromachines, and Xponent Photonics.Ms. Gomez plays an active leadership role within and beyond the technology industry. She is a board member of the prestigious SEMI Board of Industry Leaders, and she is the first executive selected for Spotlight on SEMI Women, which honors accomplished women in the global microelectronics industry.

Damage-Free Plasma Enhanced Atomic Layer Deposition of AlOX Dielectrics for Tunable Doping of 2D Materials

Esteki, Ardeshir
PhD student
RWTH Aachen University

Abstract
Two-dimensional materials (2DMs) such as graphene and transition metal dichalcogenides (TMDs) have great potential for heterogeneous integration with advanced silicon technology for future electronics^1–4. Most prominently, the latter are considered as channel materials in ultimately scaled metal oxide semiconductor field effect transistors (MOSFETs)^5–9. Two open challenges toward their application are the damage-free deposition of high-quality high-κ dielectrics on the 2DMs and controllable doping of the channel to adjust threshold voltages¹⁰.In this work, we deposited a non-stoichiometric aluminum oxide (AlOX) layer using an Oxford Instruments Atomfab^TM plasma enhanced atomic layer deposition (PEALD) system. This AlOX layer, containing nitrogen and carbon, differs from stoichiometric Al₂O₃. Short, low-power process steps with remote plasma conditions¹¹ were used to directly grow a thin layer of AlOX on commercially available graphene and on MoS₂ which was grown in an AIXTRON MOCVD reactor. Raman spectroscopy data showed no discernible deterioration of the 2DM compared to a standard Al₂O₃ process. We further validate the 2DM quality with electrical data from field-effect transistors (FETs) encapsulated with AlOX. The current-voltage measurements were performed in a four-point configuration to avoid a strong influence of the contact resistance before and after dielectric deposition under ambient conditions. The AlOX dielectric passivation improved the carrier mobilities in the devices. In addition, the process allows the tuning of graphene´s Dirac and MoS₂´s threshold voltages proportional to the thickness of the AlOX layer. Our results show that PEALD deposited AlOX provides a promising route for the encapsulation of 2DM-based electronic devices, as it improves device performance and can be used to tune the Dirac or threshold voltages at the same time.Acknowledgments: This work was funded by the European Union under the Horizon Europe grants 2D-EPL (952792), Graphene Flagship Core 3 (881603), and the German BMBF project GIMMIK (03XP0210).

Biography
Authors:Ardeshir Esteki¹, Sarah Riazimehr², Agata Piacentini^1,3, Harm Knoops^2,4, Martin Otto³, Gordon Rinke³, Zhenxing Wang³, Annika Grundmann⁵, Holger Kalisch⁵, Michael Heuken^5,6, Andrei Vescan⁵, Daniel Neumaier^3,7, Alwin Daus^1,8 andMax C. Lemme^1,31Chair of Electronic Devices, RWTH Aachen University, 52074 Aachen, Germany. ²Oxford Instruments Plasma Technology UK, Bristol BS494AP, United Kingdom. ³AMO GmbH, Advanced Microelectronic Center Aachen, 52074 Aachen, Germany. ⁴Department of Applied Physics, Eindhoven University of Technology, 5600 MB Eindhoven, The Netherlands. ⁵Compound Semiconductor Technology, RWTH Aachen University, 52074 Aachen, Germany. ⁶AIXTRON SE, 52134 Herzogenrath, Germany. ⁷Bergische Universität Wuppertal, 42119 Wuppertal, Germany. ⁸Sensors Laboratory, Department of Microsystems Engineering, University of Freiburg, 79110 Freiburg, Germany.References[1] Akinwande, D. et al., Nature (2019).[2] Das, S. et al., Nat. Electron. 4, 786–799 (2021).[3] Lemme, M. C. et al., Nat. Commun. 13, 1392 (2022).[4] Fei, W. et al., InfoMat 4, (2022).[5] Dorow, C. J. et al., IEDM 1–4 (2023).[6] Penumatcha, A. et al., IEDM 1–4 (2023).[7] Choi, S. et al., IEDM 1–6 (2023).[8] Chung, Y.-Y. et al., IEDM 1–4 (2023).[9] Chou, A.-S. et al., IEDM 1–4 (2023).[10] Illarionov, Y. Yu. et al., Nat. Commun. 11, 3385 (2020).[11] H. Knoops et al., J. Vac. Sci. Technol. A, 39(6), (2021).

Green Growth: Guiding the Future of the Global Semiconductor Industry

Godomel, Frederic
Executive Vice President – Power Systems & Services
Schneider Electric

Abstract
Did you know that the use of semiconductors has doubled every three years? If this trend continues, the semiconductor industry could account for nearly 20% of global energy consumption by 2030! While ramping up semiconductor production is essential to support our technological progress, prioritizing decarbonization and sustainability is crucial. Join us in this session to learn more about how to create an efficient and sustainable fab of the future.

Biography
Coming Soon

SCREEN water management initiatives

Snow, Jim
Senior Technologist
SCREEN

Abstract
Semiconductor manufacturing is highly water-intensive, with an average facility using up to 40 million liters of ultrapure water (UPW) per day. And, In the semiconductor cleaning systems that we develop and manufacture, the increase of processes as a result of further scaling for devices has raised the use of UPW. So, managing water use is essential to mitigate environmental impact, ensure sustainability, and maintain operational continuity amid increasing global water scarcity. SCREEN Semiconductor Solutions Co., Ltd. has introduced FTD Solutions' Water Management Application (WMA), which visualizes water management, in order to accelerate sustainable development. By visualizing the water flow in the entire cleanroom at our facility in Japan, we are directly contributing to the visualization and reduction of the amount of pure water and chemicals used, as well as the amount of wastewater and effluent. In addition, by addressing the sustainability performance of semiconductor manufacturing equipment at the fab level, we are able to provide base data to customers, which is expected to be useful in optimizing water management in their factories in the future. Today’s presentation will provide the situation of first initiative and next plans.

Biography
Dr. Jim Snow is a Senior Technologist in the Global Sustainability group at SCREEN Semiconductor Solutions. He has over 30 years in the semiconductor industry on both the liquid and gas sides of the business. He began his semiconductor career developing specialty gas purifiers and contaminant analyzers with a major component supplier, then subsequently learned the liquid side developing wet etch and clean processes at IMEC in the Ultra Clean Processing group. He received his Ph.D. in chemistry from MIT. Dr. Snow has numerous publications in journals, book chapters, patents and conference presentations. He is a member of the IRDS UPW and ESH/S groups, SEMI SCC working groups and co-lead of the SIA PFAS Consortium Articles WG.

SCREEN single wafer Life-Cycle CO2 Analysis

Stokes, Harold
Senior Manager, R&D Strategy
SCREEN

Abstract
SCREEN Semiconductor Solutions is a division of SCREEN Holdings based in Kyoto, Japan. As a major supplier of wafer fab equipment, we are committed to providing world class products in an environmentally responsible manner. To contribute to the decarbonization and sustainable development of global society, the SCREEN Group is working to reduce the greenhouse gases (GHG) emitted by our businesses. Our goal is to support the achievement of carbon neutrality by 2050. With respect to the CO₂ emissions produced by our business activities, we are currently implementing climate change initiatives at a pace that will help to keep global temperature rise below 1.5°C. Going forward, the Group will continue to promote sustainable initiatives targeting carbon neutrality, including energy conservation and creation efforts at our facilities as well as the introduction of energy storage and renewable energy systems. In this study, we ask the question “Where is the hot spot?” and share the results of CO₂ lifecycle analysis on one of our most ubiquitous tool platforms.

Biography
Dr. Harold Stokes received his PhD in Chemistry from the University of Texas at Dallas. After completing his education, he joined Atmel as a lithography process engineer where he was responsible for performing evaluations on incoming resist samples. After leaving Atmel, he served as a final clean engineer with Photronics responsible for ensuring defect free photomasks moving to receive pellicle mount. Approximately 20 years ago Dr. Stokes joined SCREEN to support the installation and qualification of lithography systems for customers in the US. From 2013 until 2021 he served as imec assignee for the advanced lithography program activities between SCREEN and imec. After completing his assignment in Belgium, he returned to the US where he joined SCREEN’s global marketing team. Currently, he is serving as R&D strategy manager within SCREEN’s technology enablement department. His career experience includes lithography, cleaning, and surface defect metrology.

SCREEN’s Sustainable Cost-of-Ownership (CoO) Portfolio for Wafer Inspection and Thickness Measurement Tools and experience on High Volume Manufacturing of Power and Automotive

Rossi, Alessandro
Product and Application Engineer
SCREEN

Abstract
Power, automotive, and IoT device manufacturers are constantly confronted with the simultaneous need to fulfill stringent quality requirements, boost productivity on their production lines, and reduce the associated cost of ownership (CoO).Inline inspection and measurement of high volumes of critical wafers is becoming increasingly crucial. SCREEN Semiconductor Solutions is addressing this specific market need with a portfolio of dedicated tools, specifically designed to reduce tool cost, footprint, downtime.The SCREEN Semiconductor Solutions proposal with the ZI-3500 is able to cover customer’s needs, with the front side micro inspection, for smaller and fine defects detections, to the back side and back side edge macro inspections to detect deposits and edge cracks that cause wafer damage, ensuring the large area coverage. While the ZI-3600 can even double the throughput capacity, these tools family can also achieve automatic defects classification, using the AI potential, reducing the operation time, and working time cost.On the thickness measurement front, the VM-3500 system offers spectroscopic reflectometry integrated with high-throughput features, while the RE-3500 system, combines single-wavelength spectroscopic ellipsometry, with triple reflectometry heads.

Biography
Alessandro Rossi is the product manager of metrology and lithography tool. Alessandro has worked for Screen for 26 years starting from service department and supporting several customers in Europe and quickly moved to the Screen process department for application support on lithography tools, thickness measurement tools on PV, and Screen Automatic Defectivity Inspection tools. He also participated on JDP projects as a Litho immersion process and Negative Developer and gathered several years of experience on SiC applications.

Use of Molecular dynamics for collapse free cleaning through surface modification treatment

Belmiloud, Naser
R&D Manager
SCREEN

Abstract
Details will come soon

Biography
Dr. Belmiloud earned his Master's in physics and Ph.D. in Electronics from the University of Bordeaux, where he focused on MEMS-based sensors for probing fluid properties and biosensor applications. Following this, he undertook a postdoctoral fellowship in biophysics at Massey University in New Zealand. He then joined Imec and subsequently began his career at SCREEN in 2012. At SCREEN, Dr. Belmiloud held various roles, which included supporting the process, integrating new products, and overseeing R&D collaborations for SCREEN SPE in Europe.

Introductory Note

Hollfelder, Martin
Vice President Service IQ & Technology
SCREEN

Abstract
Introductory note.

Biography
Dr. Hollfelder received his Master of Science and Ph.D. in Physics from Technical University Aachen working on III/V Epitaxy, layer characterization, photonic devices, and HEMT transistors at Research Centre Juelich in Germany. He started his career at SCREEN in 1996 in various positions in Service Support and Technical Sales. For more than 10 years he has been managing the Product Engineering and Process Technology for Annealing, Cleaning, Lithography, and Measurement/Inspection products and he is now Vice-President for Service & Technology including the support of the various R&D collaboration for SCREEN Semiconductor Solutions in Europe.

MEMS & Sensors Industry Group Update and Market Outlook

Grupen-Shemansky, Melissa
CTO & VP Technology Communities
SEMI

Abstract
2025 is forecasted to be an exciting year for the MEMS industry! The high sensors business growth predicted in several sectors is accompanied by long-awaited announcements of 300mm MEMS fabs as well as US CHIPS Act grants to MEMS companies. At the forefront of these advancements is SEMI’s MEMS and Sensors Industry Group (MSIG), the leading global trade organization supporting this dynamic sector for over two decades.Join us to discover how MSIG is empowering the entire MEMS & Sensors ecosystem with programs, events, and resources designed to meet evolving industry needs. Our presentation will cover: - Education and Networking at our conferences - Promotional opportunities for new technology and products - Collaborative problems solving on industry-wide challenges - R&D Funding grants totaling $25M over 5 years - Business development opportunities in emerging markets - And more!

Biography
Melissa Grupen-Shemansky, PhD, Dr. Melissa Grupen-Shemansky currently serves as Chief Technical Officer (CTO) at SEMI / FlexTech. She is responsible for the technical advisory councils and program oversight of consortium R&D projects that are in-part funded by the Department of Defense. These programs support development in flexible hybrid electronics (FHE) and nano-bio applications. Two consortia, the FlexTech FHE and the Nano-Bio Manufacturing Consortium (NBMC), collectively represent over $160M in federal and industrial investment over the span of 8 years furthering the advancement of FHE technologies and ecosystem development. In addition, Dr. Grupen-Shemansky is CEO of the FlexTech Alliance, Inc., a not-for-profit subsidiary of SEMI responsible for the Manufacturing Innovations Institute, NextFlex.Prior to joining SEMI, Dr. Grupen-Shemansky held various executive management roles in the semiconductor industry. With over 25 years in the industry, she has both Fortune 100 company and start-up innovation experience in research and development, manufacturing, business development and technology strategy. Dr. Grupen-Shemansky began her career at Motorola in semiconductor research and development. Over the course of 10 years, she held various management positions in silicon and gallium arsenide device fabrication, packaging, interconnect and system integration. Following Motorola, she was the Director of Interconnect Technology and Design Engineering in Lucent, Bell Labs, microelectronics division. She later joined Spansion, the flash memory division of AMD, as Vice President of Packaging and Interconnect Technology. And before joining SEMI, Dr. Grupen-Shemansky was the Senior Vice President of Engineering for Advanced Nanotechnology Solutions, Inc., a startup in 3D ICs and cybersecurity.Dr. Grupen-Shemansky holds both bachelor’s and master’s degrees in Chemical Engineering from Pennsylvania State University and a Ph.D. in Chemical Engineering from Arizona State University. She has received various corporate and educational awards, has seven issued patents, numerous technical publications, and is a contributing author to Failure-Free Integrated Circuit Packages.

Opening Remarks

Manocha, Ajit
President and CEO
SEMI

Abstract
Coming Soon

Biography
Ajit Manocha is the president and CEO of SEMI. Headquartered in Milpitas, California, SEMI is the global industry association serving the electronics manufacturing and design supply chain. Throughout his career, Manocha has been a champion of industry collaboration as a critical means of advancing technology for societal and economic prosperity.Manocha was formerly CEO at GLOBALFOUNDRIES. Prior to this he held the role of EVP of worldwide operations at Spansion and earlier served as EVP and chief manufacturing officer at Philips/NXP Semiconductors. He began his career at AT&T Bell Laboratories as a research scientist where he was granted more than a dozen patents related to semiconductor manufacturing processes that served as the foundation for modern microelectronics manufacturing. He has served on the boards of SEMI, SIA and GSA.Today, there is a much broader scope for SEMI to help foster collaboration and fuel growth than we could have ever imagined at its inception in 1970. This scope has to be accomplished without compromising the strong foundation of SEMI – the equipment suppliers and materials makers. Manocha feels SEMI must evolve as the industry’s ecosystem rapidly expands to support smarter, connected applications based on artificial intelligence, machine learning and other disruptive technologies.Manocha is active on global advocacy and workforce development issues and has served on the President’s committees for “Advanced Manufacturing Partnerships” and the President’s Council of Advisors on Science & Technology (PCAST).In 2021, VLSIresearch added Manocha to its Semiconductor Industry Hall of Fame for his leadership of SEMI efforts to address geopolitical trade tensions as well as for his initiative in navigating the many challenges of the COVID-19 pandemic impacting SEMI and the microelectronics industry. In 2020, Manocha was inducted into the Silicon Valley Engineering Hall of Fame, and VLSI named him an “All Star of the Semiconductor Industry” for his visionary leadership in 2019 to restructure SEMI to represent the expanded electronics supply chain.

Fab Investment Outlook and the Dynamics of Regional Semiconductor Manufacturing

Tseng, Clark
Sr. Director
SEMI

Abstract
The semiconductor industry is at a critical point where decisions about semiconductor fab investments not only determine the future of individual companies but also affect the resilience of regional semiconductor supply chains. This presentation will provide an overview of global fab investments and explore the dynamics in different regions.We will start by examining the current status of semiconductor fab capacity and investments worldwide. We will explore the factors driving these investments, including geopolitical considerations, technological advancements, and market demands. We will also share the latest forecast on fab investment and capacity expansion regarding major product segments. Additionally, we will delve into the outlook for fab capacity and investment in the European region and its impact on supply chain dynamics.

Biography
Name: Clark TsengTitle/ Position: Sr. Director, Market IntelligenceCompany: SEMIClark Tseng is the Senior Director of the Market Intelligent Team (MIT) at SEMI. He is responsible for developing and executing global strategies that provide high-quality market research products and services, monitoring and analyzing the dynamics of the semiconductor manufacturing supply chain. Clark specializes in analyzing and forecasting various microelectronics industries, such as IDM, Fabless, Foundry, Memory, and OSAT, with a focus on the Asia-Pacific and China markets. Additionally, he oversees SEMI's research partnerships worldwide.Clark has held several strategic and analytical roles in leading microelectronics companies before joining SEMI. At Mediatek, he was Deputy Director for the Computing, Connectivity, and Metaverse Business Group. In this role, Clark provided market intelligence and competitive analysis for Computing (HPC/ASIC), Connectivity (5G/Wi-Fi), and Multimedia (XR and Auto) domains. Before that, he was the Strategy and Business Development division manager at Qimonda, managing market and competitive intelligence functions in the Asia/Pacific region. Clark started his career as an analyst at IDC, covering semiconductor, flat panel display, and telecommunication markets. Clark holds a Bachelor of Business Administration and a Bachelor of Arts in International Relations from National Chengchi University in Taiwan.

Welcome Remarks

Frieling, Christopher
Director for Advocacy and Public Policy
SEMI Europe

Abstract
As the semiconductor industry continues to grow, the need for skilled professionals has become more urgent than ever. The projected ‘talent gap’ is expected to reach 350,000 people by 2030 meaning wide reaching, innovative solutions are needed now to expand the pool of available talent. This session showcases the current European projects coordinated by SEMI Europe to tackle the talent gap by improving education and diversity, concluding with a panel discussion with project partners. The panel will highlight the importance of STEM education and engaging young professionals for the microelectronics industry as well as share examples of initiatives and best practices in employer branding, recruitment, and onboarding to attract a diversity of talent.

Biography
Christopher Frieling is Director for Advocacy and Public Policy at the SEMI Europe Brussels Office. Christopher has a background in EU affairs, innovation, and tech policy. Prior to SEMI he worked at the Brussels office of Fraunhofer in several roles including most recently as Senior Advisor. Christopher holds an MSc in Economics of Science and Innovation and a Bachelor of Business Administration.

HiCONNECTS Introduction

Srivastava, Kartikey
Senior Specialist, Communications
SEMI Europe

Abstract
Coming Soon

Biography
Kartikey Srivastava is Senior Specialist - Communications at SEMI Europe. A member of SEMI Europe's team since 2023, his focus is on the Dissemination and Exploitation of Erasmus+ and Horizon Europe projects such as HiCONNECTS, ECDA and ECSA.

Chair

Melvin, Cassandra
Senior Director, Business Development and Operations
SEMI Europe

Abstract
Coming Soon

Biography
Cassandra joined SEMI Europe in 2018 to lead its operations, business development, and strategic initiatives. In this role she is responsible for leading a culturally diverse team, enhancing member value, and directing operations for optimized financial performance. Prior to joining SEMI, she held the position Global Product Manager at Atotech for its semiconductor division. She began her career at the SUNY Polytechnic Institute as a Business Manager focused on technical programs for chemistry and equipment manufacturers and held project management roles in clean room operations and IT. Cassandra's written work has been published in leading technical magazines and presented at conferences globally. She holds a BS in Business Management, and Minor in Neuropsychology from Rensselaer Polytechnic Institute. Since 2022, Cassandra has served as Co-Chair of the Executive Board for the EU Pact for Skills for Microelectronics.

Non-applicable

Perez, Maria Daniela
Communications Manager
SEMI Europe

Abstract
Non-applicable

Biography
Maria Daniela Perez is the Communications Manager at SEMI Europe, overseeing regional marketing and communications efforts. With extensive experience working with global teams, Maria excels at crafting strategies that enhance SEMI's visibility and engagement. She is also passionate about workforce development and leads the 20Under30 initiative, which focuses on empowering young professionals in the industry.

European Chips Skills Academy

Cummings, Victoria
Senior Manager, Workforce Development and EU Projects
Semi Europe

Abstract
This session will present the results from the first year of the European Chips Skills Academy, a European project funded under the Erasmus+ program to address the talent gap in the semiconductor industry. In particular, it will highlight the ECS Summer School, Educational Leaders, ECSA Student Forum, as well as the courses and career resources available on the Academy's e-learning platform.

Biography
Since joining SEMI Europe in 2023, Victoria works to drive programs that support workforce development and raise awareness of the different career paths in the semiconductor sector. She acts as the Coordinator of the European Chips Skills Academy (ECSA) project and is involved in several projects related to skills.

Welcome Remarks

Altimime, Laith
President
SEMI Europe

Abstract
Coming Soon

Biography
Laith Altimime, as President of SEMI Europe, leads SEMI’s activities in Europe and the Middle East and Africa (EMEA). Altimime has P&L responsibility as well as ownership of all Europe region programs and events, including SEMICON Europa. He is responsible for establishing industry standards, advocacy, community development, expositions, and programs. He provides support and services to SEMI members worldwide that have supply chain interests in Europe. He manages and nurtures relationships with SEMI members in the region and globally as well as with local associations and constituents in industry, government, and academia. Altimime has more than 30 years of international experience in the semiconductor industry. Prior to joining SEMI in 2015, He held senior leadership positions at NEC, KLA-Tencor, Infineon, Qimonda and imec. Altimime holds an MSc from Heriot-Watt University, Scotland.

<em>Chips, Checks and Balances: The Geopolitics of Semiconductors</em>

Ramundo Orlando, Stefano
Advocacy Manager
SEMI Europe

Abstract
The European semiconductor industry is becoming increasingly characterized by geopolitical tensions and strategic dependencies, as the introduction of export controls and new investment restrictions is starting to reshape the global semiconductor supply chain. Considering the highly specialized, complex and global dimension of the semiconductor industry, steady cross border cooperation between different actors and dependable flows of investments are of paramount importance to sustain business operations and secure prosperity in the long term.In this context, the EU is working to build a resilient semiconductor ecosystem by fostering innovation and international collaboration, aiming to enhance economic security by reducing dependencies on external actors and securing a competitive edge in emerging technologies (AI, quantum computing, I-o-T, AR/VR). Nevertheless, the EU faces multiple challenges in this regard, particularly a shortage of skilled labor and the conflicting need of pursuing strategic autonomy and maintaining open trade relations, which will require an independent European approach at the global level.This evolving geopolitical landscape and the complexity of the global semiconductor supply chain presents a set of challenges and opportunities for Europe’s semiconductor industry, whose success will ultimately depend on delivering strategic investments that build domestic capabilities, while fostering international cooperation to exploit synergies and enhance the role of European players internationally. In this light, this session will provide a unique opportunity to discuss in-depth these challenges and opportunities from the perspective of different actors, in order to explore the potential geopolitical scenarios that will be faced by European semiconductor companies.

Biography
A young professional working at the heart of the European Union in Brussels, with a profound passion for international affairs, foreign policy, and a strong interest on the impact of EU policy on socio-economic development in Europe.Retains an in-depth knowledge and experience with the legislative processes and internal dynamics of the EU institutions (European Commission, Parliament and Council), particularly regarding the EU policy approaches towards issues related to trade, industry and innovation.Possesses relevant professional background dealing with institutional and public relations, events organization and stakeholder management, both from the perspective of private consultancies and industry associations.

European Chips Diversity Alliance

Gani, Reviliani
Senior Manager, Diversity and Workforce Development
SEMI Europe

Abstract
The European Chips Diversity Alliance is a is a consortium of 11 partners from 6 countries aimed at promoting diversity, equity, and inclusion (DEI) within the European semiconductor industry. The alliance brings together various stakeholders, including industry leaders and academic institutions to address the missing talent and DEI challenges prevalent in the sector. By providing trainings, operational tools, reports, and engagement programs, the alliance seeks to enhance innovation and to improve workplace diversity and inclusion.

Biography
Reviliani joined SEMI Europe in 2019. In her current role as Senior Manager of Diversity and Workforce Development at SEMI Europe, she coordinates the implementation of the EU Erasmus+ project, European Chips Diversity Alliance, with a mission to lower barriers for under-represented groups in the European semiconductor industry through data, training, and engagement programs. She has over 10 years of experience managing various projects across government and public sectors in Jakarta, Paris, and Berlin. Reviliani holds a Master's Degree in Tourism Project from Lille University.

Ellipsometry in Photonics Industry: Advancing Integrated Photonic Devices

Bölcskei-Molnár, Anna
Product Manager
Semilab

Abstract
Ellipsometry is a valuable technique in silicon photonics industry, offering precise non-destructive measurements of film thickness, refractive index, and surface roughness which is critical for device fabrication. It enables precise characterization of multilayer structures, supporting process control and optimization during manufacturing. By ensuring uniformity and quality in optical components such as waveguides and modulators, ellipsometry is instrumental in advancing the performance and reliability of photonic devices.

Biography
Anna Bölcskei-Molnár is a materials scientist MS since 2016. She has 7 years of experience in the semiconductor industry, rooted in experimental physics and skilled in application development. She is the product manager and software product owner of Semilab's industrial automated ellipsometer product line since 2020. Anna has a strong track record of developing customized measurement methodologies to address specific application needs. She is working closely with cross-functional teams to oversee product development, define requirements, and ensure timely delivery while maintaining product quality.Biography

Post plasma dicing clean in batch spray equipment with adapted sulfuric ozone mixtures

Mittermayr, Moritz
Business Development
siconnex customized solution GmbH

Abstract
Semiconductor manufacturers chase the goal of reduced carbon footprints and running cost, which also applies to the topic of die singulation.The proposed presentation will show how a new approach to the removal of polymers left behind after plasma dicing was found, how the theory was translated into a hardware concept, how the performance and efficiency of this new process was tested, how the results were analyzed and how it will enable the industry to take another step towards eco-friendlier and more sustainable device manufacturing.VI. ConclusionThe removal of post plasma dice polymers with our adapted sulfuric ozone mixtures was a full success, beating the current standard of O₂ ashing that our results were pitted against by our client in terms of cleaning efficiency, process time and throughput as underlined by the presented SEM pictures and calculations.

Biography
After graduating from secondary higher school for chemical engineering and gaining experience in industrial, analytical laboratories, Moritz started in Siconnex Wet-Process Engineering Department in Austria in March 2020. He switched over to Business Development in the beginning of 2024 and is now focused on market research and fostering relations with existing and new partners.

Beyond Simulation: Bridging the Real & Digital World

Westrich, Katharina
Global VP of Electronics, Semiconductors & Simulation Digital Industries
Siemens AG

Abstract
In the semiconductor industry, innovation starts by challenging the status quo. With companies tackling talent gaps and the challenge of building efficient, sustainable multi-billion-dollar fabs, Siemens sees digital twin technology as the game-changer. This powerful technology can supercharge virtual training to upskill teams faster and boost fab productivity and planning like never before. In this keynote, Siemens reveals how the digital twin is fueling breakthroughs and redefining what's possible, helping us all do more with less.

Biography
Katharina leads Siemens’ global activities for Electronics & Semiconductor and Simulation, where she heads a team focused on unlocking the potential of resilient, smart, and sustainable semiconductor manufacturing across the entire value chain. As an elected member of the Governing Council of the Semiconductor Climate Consortium (SCC), Katharina reinforces her commitment to sustainability and her role in driving positive change within the semiconductor ecosystem. Her dynamic and accomplished leadership places her at the forefront of digitalization and sustainability solutions – transforming the everyday through innovative technologies.Before her current role, Katharina served as the Head of Siemens Research & Pre-Development department. With a team of approximately 500 talented individuals, she championed sustainable practices and contributed to the development of next-generation Siemens products for Integrated Circuits & Electronics, Power Electronics, Sustainable Energy & Infrastructure, Additive Manufacturing, and User Experience. Prior to that, she held several strategic positions within Siemens and gained valuable experience in consulting and mergers & acquisitions for Siemens.Katharina holds a Master of Science degree from the Catholic University Eichstaett-Ingolstadt.Short Version:Katharina heads Siemens’ global activities for Electronics & Semiconductor and Simulation, leading a team dedicated to unlocking the potential of resilient, smart, and sustainable semiconductor manufacturing across the entire value chain. As an elected member of the Semiconductor Climate Consortium (SCC) Governing Council, Katharina reinforces her commitment to drive positive change within the semiconductor ecosystem. Her dynamic leadership places her at the forefront of digitalization and sustainability solutions – transforming the everyday through innovative technologies.Previously, Katharina held various strategic positions within Siemens, including heading the Research & Pre-Development department. She championed sustainable practices and contributed to the development of next-generation Siemens products.She holds a Master of Science degree from the Catholic University Eichstaett-Ingolstadt.

Ensuring Fire Safety and Security in Clean Room Environments: Key Requirements and Best Practices

Sanap, Mangesh
Global Smart Infrastructure vertical head of Semiconductor Manufacturing
Siemens AG

Abstract
This informative presentation delves into the specialized challenges presented by cleanroom environments in relation to fire safety and security. With an emphasis on the crucial importance of adhering to regulations, we will outline the indispensable elements in the designing, implementation, and upkeep of fire safety and security systems specific to these controlled settings. Participants will be presented with a thorough exploration of performance-oriented design strategies, highlighting Siemens' innovative dual-wavelength technology. This technology is instrumental in the early detection of fires, consequently enabling prompt intervention to safeguard personnel and secure the integrity of critical processes. Moreover, the talk will shed light on the importance of an integrated approach, detailing how the cohesion of fire safety, security, and additional cleanroom systems can not only elevate overall protection but also simplify the avenues for compliance documentation. We advocate a comprehensive and integrated perspective for crafting bespoke fire safety and security solutions that are finely tuned to meet the precise demands of cleanroom operations. Attendees will leave equipped with actionable knowledge to enhance protection against fire risks while maintaining seamless operational performance in their cleanroom environments. by Mangesh Sanap and Terry Anne Janice Ramos

Biography
Mangesh Sanap is a seasoned professional with more than 17 years of experience with Siemens and a robust foundation in strategy, mergers and acquisitions, and product lifecycle management. He excels in identifying growth opportunities and strategically positioning products and services for market success. As the Head of Strategy for the business unit in India and the PLM Head for the product line, Mangesh has effectively leveraged his extensive sales background to drive profitable expansions, foster brand alignment, and oversee integrations that enhance organizational value. Mangesh holds a Bachelor of Engineering in Electrical and Electronics Engineering and a Master of Business Administration from the University of Mumbai. He identifies with the core values of collaboration, a growth mindset, and a deep expertise in business development, sales, vertical management, strategy, and M&A. Terry Anne Janice Ramos is a licensed Electronics Engineer and accomplished Global Marketing Manager specializing in fire safety at Siemens AG, based in Zug, Switzerland, where she has contributed since October 2023. Previously, she served as Head of Building Products at Siemens Inc. in the Philippines, leading the division from 2019 to 2023 with a focus on strategic sales alignment, market development, and customer relations. With extensive expertise across the ASEAN region, Terry Anne has a proven track record of driving sales growth, developing targeted market strategies, and ensuring compliance with operational and sales goals. Her leadership has effectively advanced Siemens' Fire Safety and Security product presence within key vertical markets in the region. Prior to Siemens, she held significant roles at Robert Bosch Inc. and Chittick Fire & Security Corporation, where she gained expertise in sales, marketing, technical support, and project management. Her early career as a Cadet Engineer established a strong foundation in engineering design, detailed project estimation, and system configuration for fire detection and alarm systems. With nearly two decades of experience across roles in fire safety, security, and engineering, Terry Anne’s robust industry knowledge and leadership skills continue to contribute significantly to Siemens' mission of enhancing fire safety solutions globally.

Panelist

Heurung, Thomas
CEO Siemens Electronic Design Automation GmbH & Technical Director EMEA
Siemens EDA

Abstract
Panelist

Biography
Since graduating with a degree in electrical engineering in 1997 from Friedrich-Alexander University in Erlangen, Thomas Heurung has been assisting customers in solving various challenges in industrial applications. His first engagements were with the development of electrical systems for automobiles and airplanes, embedded software for distributed control systems, and eventually moved on to the development of complex electronic systems and components.After transitioning from Synopsys to Mentor Graphics in 2004, which became part of Siemens AG in 2017 and is now known as Siemens Electronic Design Automation, he held various responsibilities such as global business development and establishing and leading technical sales in Europe and India for the Capital and Volcano product lines.Since 2020, he is serving as Technical Director, responsible for the technical sales of semiconductor and electronic systems development tools at Siemens EDA in EMEA.

An independent InP foundry in the integrated photonics supply chain

Maat, Peter
Senior Product Manager
SMART Photonics

Abstract
The development and production of integrated photonic components and systems involves the design, manufacturing, assembly and system integration of photonic integration technologies. Currently, the integrated photonics supply chain that addresses each of these items is maturing. In the supply chain, SMART Photonics plays a crucial role as an InP photonic integrated circuit supplier. SMART Photonics is an independent pure-play foundry, producing high-end photonic integrated circuits for customers. As a foundry for integrated photonic circuits, SMART Photonics offers solutions for data and telecommunication, as well as for sensing – such as Lidar – and medical applications. The presentation explains the role of a foundry like SMART in the integrated photonics supply chain and describes our technology and the approach to aligning the business with the market needs.

Biography
Peter Maat is an integrated photonics specialist working at SMART Photonics as a senior product manager. He has 25+ years of experience in the design, fabrication, test and application of integrated photonics technologies, with a focus on applying integrated photonics in systems and applications.

Panelist

Sabonnadière, Emmanuel
Sr. Vice-President of the Division Automotive & Industrial
Soitec

Abstract
Coming soon

Biography
Since July 2021, Mr Sabonnadiere is Senior Vice-President of the Division Automotive & Industrial ofSoitec. He is also in charge of the Strategic Program SiC.From September 2017 to July 2021, Mr Sabonnadiere was CEO of CEA-Leti, one of the mostinnovative Labs in the industry of microelectronics and biotechnology, based in Grenoble (France).Previous two years, Mr Sabonnadiere was CEO & Chairman of the Business Group Professional ofSignify, former Philips Lighting (Amsterdam). From 2014 till 2016, he served as Senior Associate ofMidCap Private Equity firm named Gimv (Paris, Antwerpen, Munich, Den Haag).Previously in his career, Mr Sabonnadiere was CEO & Chairman of General Cable Europe & Africa(Barcelona). From 2005 till 2008, he was CEO of NKM Noell Gmbh, the German branch of the groupREEL. Mr Sabonnadiere was vice-president of the Distribution Transformers division of Alstom T&Dfor 5 years. He began his career in 1992 with Schneider Electric holding various positions includingthat of Managing Director of equipment units for 10 years.Mr Sabonnadiere has a strong innovation and technological background combined with a successfulbusiness track record over decades and some key innovations adopted into the markets. With 30+years of executive leadership of large operations, he produced high level performances of operatingmargins & results and generation of cashflow. He gained a sound experience of change managementin large multi-cultural organizations to adapt to new markets conditions and dynamics in European andInternational environments. He designed and set-up ambitious strategic plans including some merge &acquisitions.Mr Sabonnadiere believes in operational excellence, innovations in technology, talents managementand enthusiasm in leadership. His sound experience in the European industry make him a highlyknowledgeable and respectful Board member.Mr Sabonnadiere obtained a PhD in physics (France), and an engineering degree in InformationTechnology (France). He holds an MBA (France)Mr Sabonnadière is a fully qualified instructor at the ski school in Les Ménuires, and member of theAdvisory board of IAC Consultant and Sparring Capital firm.

150-200mm Fab Modernization

Schwartzmann, Jerome
Senior Industrial Strategy Director
Soitec

Abstract
The European semiconductor industry is at a pivotal moment, where modernization of 200mm fabs is crucial to sustaining exponential growth and maintaining global competitiveness. This presentation will explore how the latest innovations in digitalization, automation, and artificial intelligence (AI) can transform traditional fab operations, making them more productive, agile, and sustainable.By integrating advanced technologies such as intelligent storage, automated material handling systems (AMHS) like Autonomous Mobile Robots (AMRs), and control room optimizations, fabs can achieve significant improvements in operational efficiency. Furthermore, advanced scheduling algorithms and AI-driven decision-making systems will empower fabs to manage production workflows more effectively, reduce downtime, and improve throughput.This session will emphasize the importance of collaboration across the European semiconductor ecosystem to enhance fab attractiveness and productivity. By embracing digital transformation, Europe can position itself as a global leader in semiconductor manufacturing, supporting the industry’s goals of sustainable, exponential growth.

Biography
Jerome SCHWARTZMANN is Senior Director in charge of Industrial Strategy reporting to Soitec’s COO.He joined Soitec in 1998 and served different functions such as manager for industrial engineering, IT & strategic programs (new fab startup, new business diversification, post M&A integration, digitalization).From 2015 to 2017 after the termination of Soitec Solar Business, Jérôme joined Oberthur Technologies (IDEMIA) as Corporate Industrial Strategy Director to deploy Industry 4.0 practices in all fabs across the world (NORAM, LATAM, China, India, Middle East, Europe).Back in Soitec in 2017 he has been leading the project to restart Soitec Singapore Fab and then took over the head of Information Technology position for Soitec.Jerome is currently managing growth projects to deliver two new fabs, one in France for SmartSiC business (150/200mm) and one in Singapore to extend SOI 300mm capacity. He is also overseeing the Industry 4.0 roadmap of Soitec.Jerome earned a master degree in Applied Mathematics and Computer Science from Grenoble University and a strategic negotiations degree from Harvard Business School,

Designing Sustainable Semiconductor Materials: Engineering the Future through Breakthrough Innovation and Strategic Collaboration

Barnabé, Pierre
CEO
Soitec

Abstract
Coming Soon

Biography
Pierre Barnabé was nominated as Soitec CEO in January 2022 and joined the company four months later. He was previously Executive Vice-President in charge of Big Data & Cybersecurity at technology group Atos (2015-2021), where he also led the Public Sector & Defense division and manufacturing operations before serving as interim Group CEO in 2021. Prior to its acquisition by Atos in 2014, Pierre Barnabé was Deputy CEO of Bull. He then served as Bull’s Chairman & CEO from 2015 to 2021, spearheading the company’s evolution into a global leader in cybersecurity services and supercomputing. From 2011 to 2013, he was Managing Director of the Enterprise branch of SFR, the French telecoms operator, where he launched cloud computing and very high-speed broadband activities. That followed a 13-year stint during which he held various positions at Alcatel and Alcatel-Lucent, first in sales and later as Chairman & Managing Director of Alcatel-Lucent France (formerly Alcatel CIT) and Group Deputy Managing Director for Human Resources and Transformation. A graduate of the NEOMA Business School and Ecole Centrale in Paris, Pierre Barnabé began his career in 1994 in Silicon Valley, developing corporate venture capital and capital risk activities for Thales Group. He then moved to Thales headquarters in Paris, where he was in charge of strategy and acquisitions for the Communication and Command division. A member of the board of the multinational market firm Ipsos, he also served as Chairman of the Board of ENSIMAG Grenoble, the prestigious Grande École specializing in computer science, applied mathematics and telecommunications (2016-2022) and on the board of France’s National Institute for Research in Digital Science and Technology (INRIA) from 2021 to 2022. Pierre Barnabé is a Knight of the French National Order of Merit.

Innovation and Collaboration: Powering Sustainable Exponential Growth

Poulet, Franck
Operations Compound Director
Soitec

Abstract
At Soitec, our products are designed and manufactured to provide greater performance, security and agility, while guaranteeing energy efficiency to the resulting applications. This is the heart of our technology and our value proposition. Sustainability thus integrates Soitec’s core business with the energy efficiency of its products. This has naturally inspired and structured the way we conduct our activities. For several years, we have been constantly innovating to manage our activities more sustainably, with a particular attention to reducing the carbon footprint of the entire microelectronics value chain, reducing our water withdrawals and taking into account environmental criteria in the design of our products. We are going to present some of these innovations.

Biography
Franck Poulet is in charge of Compound operations in France, reporting to Soitec's COO.With his manufacturing team, he has to ramp up new Soitec products : POI substrates (piezo on insulator) for new 5G filters applications and SmartSiC substrates for future generations of electric vehicles.With his facilities team, he had to build, and start up the new production facility mainly dedicated to SmartSiC in Bernin from march 2022 to september 2023.Industrial engineer graduated in 1999 @ INSA de Lyon, he joined Soitec in 2002. Since then he has held various operations management positions.JOIN PRESENTATION WITH:Fanny Bernard joined Soitec in 2010 and is currently Deputy of Sustainability Department. She works on issues of impact and responsibility, both on the environmental, societal and territorial aspects.With more than 10 years of experience in corporate and internal communications in international industrial environments, Fanny specializes in ESG and benefits from expertise around responsibility and sustainability issues. From 2020, as ESG manager, she was responsible for creating and implementing Soitec's ESG strategy in line with the company's strategy. She has coordinated the different stakeholders, set up extra-financial reporting and worked to raise awareness and popularize all of the group's commitments to various audiences such as employees, investors, institutions and the general public. Fanny graduated from Sciences Po Strasbourg and Grenoble Ecole de Management.

Topic Coming Soon

Germain, Marianne
General Manager BU GaN & CEO
SOITEC Belgium NV

Abstract
Coming Soon

Biography
Dr Marianne Germain received in 1999 her PhD degree in Electrical Engineering from the University of Liege (BE), where she conducted research in close collaboration with RWTH Aachen (D), and as invited post-doc in Purdue University (US) and Würzburg University (D). In 2001, she joined IMEC, where she became in 2004 Program Manager of the “Efficient Power/GaN” program. In May 2010, she co-founded “EpiGaN”, a spin-off located in Hasselt manufacturing GaN epiwafers for electronics applications, where she acted as CEO and member of the Board of Directors. EpiGaN nv was acquired by SOITEC in May 2019, where she is now acting as General Manager of BU GaN and CEO of SOITEC Belgium NV.

Advanced Imaging and Sensing Technologies in ADAS Systems

Landgraf, Jens
Sr. Technical Program Manager
Sony Semiconductor Solutions Europe

Abstract
Advanced Driver Assistance Systems (ADAS) are increasingly using more sensing technologies to improve vehicle safety. Current ADAS solutions primarily rely on CMOS image sensors (CIS) for object detection, but future systems will integrate more advanced sensors, such as depth sensing, to enhance accuracy. By 2030, multi-sensor fusion is expected to provide higher levels of perception. This session will explore key characteristics of image sensors that ensure robust ADAS performance, focusing on High Dynamic Range (HDR), LED flicker mitigation (LFM), and motion artifact reduction for 2D CIS cameras. It will also highlight the role of LiDAR technology in complementing camera systems, particularly in poor weather conditions, and demonstrate how Single-Photon Avalanche Diode (SPAD) technology is driving the widespread adoption of LiDAR for next-generation ADAS and autonomous vehicles.

Biography
Jens Landgraf is a Sr. Technical Program Manager at Sony Semiconductor Solution’s Europe Design Center in Oslo, Norway – a location specializing in automotive CMOS image sensor design. Until recently, he spent almost a decade in the United States in California and Michigan, working on automotive imaging and sensing solutions at Sony Semiconductor Solutions America, Ambarella Inc and OmniVision Technologies. He led cross-functional teams in successful strategies for high-performance imaging technologies adopted in ADAS and AD applications. Before his tenure in the semiconductor industry, he served several years as a consultant to the BMW Group as subject matter expert for camera technology in Munich, Germany.

Shaping the Future of Mobile Cameras: Miniaturized Multispectral Imaging for Next-Gen Applications

Borremans, Jonathan
CTO
Spectricity

Abstract
Mobile phone cameras have rapidly evolved from basic imaging tools to sophisticated devices capable of capturing stunning, high-quality images. The addition of advanced features, such as 3D imaging, has further extended their functionality, enabling technologies like face ID and augmented reality, which, in turn, pave the way for next-generation applications. These advancements are made possible by the seamless integration of sophisticated hardware with cutting-edge software, including AI and advanced image processing algorithms, pushing the boundaries of mobile camera capabilities.At the forefront of this technological revolution is Spectricity, which has developed ultra-miniaturized CMOS multispectral cameras based on integrated, pixelated spectral filters. These cameras deliver exceptional spectral and spatial resolution while maintaining a compact form factor and video capability, making them perfect for integration into mobile devices. By utilizing standard CMOS foundries for fabrication, Spectricity ensures scalability and cost-effective production, making these innovations accessible for widespread use.The key innovation of these cameras lies in their ability to capture the spectral signature of a scene, providing detailed information beyond the capabilities of conventional RGB sensors. This opens the door to a wide range of applications that were previously unattainable with traditional imaging technologies. Multispectral cameras enhance color accuracy and white balancing, resulting in more realistic images and videos. In the cosmetics industry, these cameras can precisely assess skin tones, enabling personalized product recommendations. In healthcare, they offer the potential for early diagnosis by detecting subtle changes in skin or tissue that are invisible to the naked eye. Furthermore, this technology unlocks new possibilities in smart agriculture, industrial sorting, and process monitoring.In this presentation, we will introduce Spectricity’s innovative products and delve into the diverse applications they enable across various industries. Spectricity is driving the next generation of imaging solutions for mobile and industrial use cases, setting new standards for the future of imaging technology.

Biography
Jonathan Borremans earned his PhD in Electronic Engineering from imec in 2004. With extensive leadership experience in wireless, MEMS, and imaging projects, he notably led imec’s specialty image sensor group as Program Manager and Head of the design group. In 2018, Jonathan founded Spectricity, where he now serves as CTO, driving innovation in miniaturized multispectral image sensors for consumer applications. He also serves as a board member of Flanders Semiconductors, contributing to the advancement and future of semiconductor technology in the region.

Artificial Intelligence and Eco-Design: Pioneering Sustainable Innovation in a Dynamic Global Market

Quinio, Philippe
Group Vice-President IP Sourcing & Strategy
ST Microelectronics

Abstract
In an era characterized by rapid technological advancements and increasing environmental awareness, the integration of Artificial Intelligence (AI) and eco-design principles is emerging as a powerful catalyst for sustainable innovation. This presentation explores the transformative impact of these two forces on global market dynamics.We will delve into how AI-driven technologies are revolutionizing product design, technology development, manufacturing processes, leading to more efficient and sustainable practices. Simultaneously, eco-design principles are reshaping the way technologies and products are conceived and developed, emphasizing the importance of environmental considerations from the earliest stages of design. This approach not only minimizes the ecological footprint of products but also meets the growing consumer demand for sustainable and ethically produced goods.Join us and discover how these pioneering approaches are shaping a sustainable future in a dynamic global market !

Biography
After an initial career in R&D in Japan, Philippe worked for a major US consulting firm in Europe & South America. He joined ST in 1995 in a Strategic Planning role. He then led the strategic marketing activities of ST’s Consumer Group till 2002, when he became Marketing Director for ST’s Imaging Division. In 2007, he moved to Corporate Finance, where he led several M&A projects.Since 2010, he heads the IP Sourcing & Strategy team, owns the IP/technology Make vs Buy process, performs technology intelligence and oversees all IP/technology in-licensing for ST’s businesses. Since 2016, he also covers EDA Strategy and Sourcing.Philippe was born in Versailles, France, in 1965 and graduated in Telecommunications Engineering from Telecom ParisTech school in 1987. He also holds an MBA from INSEAD and is a Certified Licensing Professional (CLP™).

SiC End to End Manufacturing Fab Management

Riva, Luca
SiC Campus Fab Manager Director
ST Microelectronics

Abstract
Silicon Carbide, thanks to its electronic and thermal properties, is a revolutionary bulk substrate for Power Devices Schottky Diodes and Field Effect Transistors, both in the automotive and industrial market segments. SiC substrate, since its discovery in 1893, has been a case of study but only in the last few years has become a subject for manufacturing first at 150 mm and now also at 200 mm where fully vertical integration from powder to final product is a key factor of cost and quality success. Automation supported by Any Logic model is functional to industrial KPI. Most of the defects present in the crystal ingot, micropipes, polytype and others, only partially recovered during the epitaxy steps can determine electrical failures at device level. For that reason Artificial Intelligence with the associated statistical models is suitable to identify specific defects improving significantly the quality of the substrates and increment yield.

Biography
Luca Giovanni Riva was born in Monza Italy in 1969. He graduated in Solid State Physics with a thesis on Advanced Metalizzation Electromigration study. He has been working at ST Microelectornics since 1994. In the first ten years he worked in R&D focusing on new deposition models for micrometric vias filling. Later he developped the intregration of BEOL package of BCD devices with memories embedded. In 2001 he moved to reliqbility department focusing on the interaction between process and failure modes. From 2008 he took the responsibility for the Operations of Analog products in the Analog & Power Group and since 2023 he has been appointed Director of Operations in Catania SiC Campus.

Embedding a culture of sustainability into our daily fab operations

Villieu, Cyril
Process Engineer
ST Microelectronics Crolles

Abstract
Embedding a culture of sustainability into our daily fab operationsHuman and industrial activities drive climate change, and the increasing demand for electronic devices underscores the need to reduce greenhouse gas (GHG) emissions in semiconductor manufacturing. Environmental sustainability of current and future microelectronic products is crucial for our industry.Several solutions have proven effective in reducing GHG emissions. The key is to implement these solutions in existing widely utilized equipment, such as the Lam Research 2300 dry etching tools.Clear net zero goals motivate the STMicroelectronics and Lam Research teams to work on these projects.Improving products is ambitious and requires rigorous methods to ensure lasting achievements for next-generation devices. Our project is based on measurements done by Lam Research on a dedicated STCrolles dry etching platform, using dedicated software to evaluate GHG impact, with the results validated by STCrolles to verify process impacts. This approach has been very successful to optimize recipe set-up and reduce harmful gases for the environment. The project set-up enables immediate testing in an industrial environment for quick feedback and adjustments.

Biography
Cyril VILLIEUProcess engineer in dry etching section of STMicroelectronics Crolles sonce 2018, particularly involved in conductor etching.Graduated in 2017 with a engineer diplmoma and master in university of Orléans, specialized in plasma techonologies.Maximilien NeboisMaximilien Nebois was born in France and holds a MSc degree in chemistry and chemical engineering from Ecole Supérieure de Chimie Physique et Electronique de Lyon obtained in 2023.During his studies, he has had the opportunity to study abroad in 2021-2022 and reinforce his knowledge in chemical engineering during his final year at Heriot Watt University based in Edinburgh (United Kingdom).After which, he moved to Japan for one year (2022-2023) to join Air Liquide Laboratories based in Yokosuka as a group research intern, working on thin film etching processes involving the use of proprietary etchants featuring low GWP (global warming potential) impact.After graduation he joined LAM Research France based in Meylan in December 2023 to work as a process engineer supporting LAM’s customers on the field and working on sustainable projects.Luigi MascarelloLuigi Mascarello holds the position of Installed Base Productivity Manager for Lam Research in Europe. With a 24-year career at Lam, he has held various positions.As a manager, Luigi has overseen operations at ST Crolles 200, ST Crolles 300, ST Rousset, and other sites across France. Over the past decade, he has also led the European Regional Product Support Team and spent a couple of years managing Central Europe operations for German customers.Luigi holds a degree in Industrial Electronics, along with post-graduate diplomas in Industrial Automation and C-Unix language. These qualifications enabled him to work at the beginning of his career on power supply converters for standard and high-speed trains, working for Alstom Group in the early stages of the Virgin trains start-up in Birmingham and Preston, UK.In addition to his responsibilities, Luigi is currently passionate about projects that enhance environmental sustainability.

Challenges in Advanced Packaging for High Performance Computing

Yang, Cheng
Corporate Fellow
STATS ChipPAC

Abstract
With ever growing demands of AI and cloud applications, advanced packaging especially 2.5D/3D with chiplet integration, becomes a major technology path to meet the increasing demands of computing power. Power delivery and thermal management are two crucial roadblocks in various scenarios, e.g. when large size xPU power can reach thousand watts, liquid cooling and high efficiency power modules at both board and package level become prerequisites for the system to work properly. Package and silicon power delivery solutions, e.g. silicon capacitors (including DTC, MIM etc.), integrated VR etc. add process complexities and cost but are necessary to make the advanced node IC work properly. Further integration in both board and package level can been foreseen, e.g. 48V package integrated VR to meet future demands. On the other side, the thermal management (basically all power delivered to computing ICs will be dissipated as heat) becomes very challenging, advanced package and system level cooling methods are needed. Thermal interface material is a major concern at many cases where advanced TIM becomes a very hot topics in the industry. Heat induced reliability (silicon, package) is also a critical job for the packaging industry. Key trends observed and a few cases will be discussed.

Biography
Dr. Yang is currently corporate fellow for JCET STATS ChipPAC. He has more than 20 years’experience in electronics system and IC packaging development. At present he is leading corporate technology office at JCET STATS ChipPAC. Before joining JCET, he was at Flex on SiP products and technology development in IoT, automotive, medical, and industrial applications, covering design, manufacturing, and testing areas. He has worked at Intel on memory packaging design and technology development for 13 years. Dr. Yang hold a Ph.D. degree from National University of Singapore, EMBA from Washington University in St. Louis, and Master and Bachelor from Shanghai Jiaotong University.

FMCW Chip-Scale LiDARs Scales Up for Large Volume Markets thanks to Silicon Photonics Technology

François, Simoens
CEO
SteerLight

Abstract
LiDAR sensors are key for safe mobility and in particular for automated and autonomous robots, machines and vehicles to detect obstacles. However, today’s commercial LiDAR technologies cannot face the issues of a widespread adoption in terms of costs, reliability and form factors. Steerlight, a CEA-Leti spin-off, develops a third generation of LiDARs on-chip combining at chip-scale level FMCW detection scheme and non-mechanical beam steering thanks to Silicon Photonics. FMCW provides instantaneous depth and velocity information while Silicon Photonics allows a system on-chip integration of the optical and electronics functionalities.This miniature and scalable LiDAR enables high reliability, compactness, cost reduction with high resolution/range performance. These features are ‘must have’ for a mass adoption by the growing markets of automotive and robotics. More generally, such new sensor will empower the use of 3D vision for a wide range of applications such as smart cities, services, homes or even consumer electronics.

Biography
Dr François Simoens is the CEO and the co-founder of SteerLight, a deeptech start-up founded in July 2022 with the ambition to provide smarter 3D vision with a new generation of miniaturized FMCW silicon-photonics based LiDAR sensors. He builds this disruptive value proposition on his prior involvement in photonics developments for more than 25 years. He joined CEA-Leti in 2003 to contribute to R&D institutional and industrial project before taking the position of program manager and expert in the imaging sensor field. During the 15 last years, he has been acting as Business Developer for industrial partnerships and Marketing Manager for the strategic imaging domain.

Sensing the World: Innovating for a More Sustainable Future

Ferri, Simone
APMS Group Vice-President, MEMS sub-group General Manager
STMicroelectronics

Abstract
Sensors are at the core of many of our interactions with the world. They serve as the bridge between the physical and digital realms. From this perspective, there is a strong expectation that sensorization remains human-centric, enhancing our daily lives by contributing to a better lifestyle. Also, there is an increasing urgency to keep up with long-term plans regarding sustainability. The path for a net-zero transition is everyone's responsibility, and embedding sustainability practices in our sensor strategy is essential to our people, our business, and society at large. Our commitment to sustainability is reflected in the way our sensors deliver valuable data efficiently across various industries, including automotive, industrial sectors, infrastructure projects, and consumer electronics, ensuring that our technological footprint is both meaningful and environmentally conscious.

Biography
Simone Ferri is General Manager for STMicroelectronics MEMS sub-group since February 2016.Simone began his career in STMicroelectronics in 1999 as an R&D engineer, before moving on to digital designer for the Audio Division, leading into product management after 5 years. In 2014, Simone was entrusted with ST MEMS consumer sensors then with global MEMS-sensor related Marketing and Application activities across all markets and segments, and, more recently with AMS Group Vice-President and General Manager of the MEMS sub-groupSimone Ferri was born in Milan in 1972 and graduated with a degree in Microelectronics from the Polytechnic of Milan, where he also completed his MBA.

Panelist

Le Grevès, Frédérique
President STMicroelectronics France and Executive Vice President, Europe & France Public Affairs
STMicroelectronics

Abstract
Panelist

Biography
Frédérique Le Grevès is President of STMicroelectronics France and STMicroelectronics’ Executive Vice President, Europe & France Public Affairs since March 2021. During her career, she has held various positions in management committees of companies in the automotive sector – Aptiv, Nissan Motors, Renault Group, Renault Nissan Mitsubishi Alliance - both in Europe and the United States. In April 2022, she was appointed President of the “Electronic Industry” Strategic Committee (CSF) in France, in July 2022, she was appointed Vice-President of the Electronics Branch of the FIEEC (Federation of Electrical, Electronic and Communication Industries) and in December 2023, Vice-President of the European Semiconductor Industry Association (ESIA).

From Imaging to Optical Sensing, the road to machine dedicated sensors.

Mazaleyrat, Eric
Director of Technology Scouting and Innovation
STMicroelectronics

Abstract
Image sensors started development trying to match the eye's (and brain) performance. Great achievement have been done, as current smartphones are demontrating. In order to facilitate the automatization and bring additional features to the use, new sensors are developed targeting machine/robot applications. During this talk, we shall present the lastest development of STMicroelectronics.

Biography
Eric MAZALEYRAT is working in the field of Imaging/Optical Sensing since 2000. He has been involved in the development of several generations of CIS from pixel pitch of 5.6µm to 1.1µm. He was also managing developments of Infrared and Near Infrared sensors.Passionated by the light engineering, he is also following projects around Metasurfaces, Photonic Integrated Circuits, miniaturized spectrometers and other new technologies, inside the Imaging Strategy Office, as the responsible for Technology Scouting and Innovation.

Sulfuric Acid Reduction in Post-Ash Cleans

Garnier, Philippe
Wet 3Di R&D - Senior Member of Technical Staff
STMicroelectronics

Abstract
Sulfuric acid is far the first chemistry in terms of chemical consumption in the semiconductor industry. This worldwide consumption of sulfuric acid has raised significantly this last decade due to a switch from bath to single wafer tools. This choice has been driven by a much better process performance, but at a much higher cost and raised some sustainability concerns. Sulfuric acid is mainly used in the SPM (Sulfuric acid, Peroxide hydrogen) mixture to strip implanted photo resists in FEOL fabs. Whereas SPM is used alone for low implantation doses, it’s combined with a plasma ashing process for highest implantation conditions. Nonetheless, to improve the environmental impact, this traditional approach is successfully challenged by completely removing the SPM usage for implanted resist stripping. The advantages and risks of this solution are also hereby discussed.

Biography
After graduating from the ENSIACET school in Toulouse, France, in 1999 with a degree in chemistry, Philippe started as a process engineer for Philips Semiconductors. Within the Crolles2 Alliance (STMicroelectronics, Philips and Motorola) on the Crolles’ site, he has been a pioneer in the development of Wet single wafer equipments. He joined STMicroelectronics in 2007 and quickly moved to East Fishkill, NY, USA to develop high k metal gate technologies, within a new Alliance, driven by IBM. After several experiences abroad, Philippe came back to ST Crolles site, in France where he has contributed to the success of many technologies, ranging from memory to image sensors. He is currently Senior Member of Technical Staff at STMicroelectronics, in the Chemicals department. Within his 25 years’ experience in the field of wafer surface preparation, he has published more than 70 papers in international conferences. His extensive experience and contributions to the field have made him a respected figure in the semiconductor industry. In addition to his research, Philippe has supervised eight PhD theses on diverse subjects such as wetting, molecular diffusion in photoresists, particles removal by spray or peeling methods. His work spans both advanced R&D and technical expertise on mature products, demonstrating his versatility and depth of knowledge in the field. Finally, Philippe has a deep focus on reducing the environmental impact of the semiconductor industry, either by minimizing the use of chemicals or by adopting greener solutions. His commitment to sustainability is reflected in his ongoing efforts to develop environmentally friendly processes and technologies.

SCC Panel Discussion

Orsati, Laurent
Head of Sustainable Products & Environment Management
STMicroelectronics

Abstract
Panelist

Biography
Since June 2023, Laurent Orsati has been the Head of Sustainable Products & Environment Management at STMicroelectronics. In this role, he focuses on aligning sustainability programs with customer roadmaps, developing product eco-labels, optimizing customer request processes, and standardizing reporting.Laurent began his career at STMicroelectronics in 1999 as a Methods & Projects Engineer in Crolles. Over the years, he has held various roles in the Facilities and Procurement departments. In 2018, Laurent took responsibility for the Materials/Products Compliance & Supplier Ethics team, expanding and digitalizing these activities.Laurent holds an engineering degree from the Ecole Nationale Supérieure des Arts et Métiers, specializing in production systems management, methodologies, and project management. His career is marked by a strong commitment to sustainability, efficiency, and continuous improvement, making him a key contributor to STMicroelectronics' success.

Importance of High-Performance Integrated Metrology for D2W and W2W Hybrid Bonding Applications

Schmidt, Thomas
Product Manager Bonder
SUSS MicroTec Solutions GmbH

Abstract
Integrated high-performance metrology for overlay has become a key requirement for state-of-the-art hybrid bonding applications not only as a potential quality gate for incoming substrates, but in particular to monitor bonding performance in general.Powered by the need of more and more memory and computing capabilities, hybrid bonding is gradually adopted to produce the required chips for HPC application. This advanced packaging technology relies on dielectric fusion bonding of two wafers or dies together at room temperature, electrical interconnection of the Cu pads is formed subsequently at the post-bond anneal in a separate oven. Surface quality, cleanliness and Cu-recess control are key process parameters to ensure high yield and cost-effective integration of this assembly technology. The different bonding strategies, from W2W towards known good dies selected and transferred directly to the target wafer (sequential D2W) or via a temporary substrate (collective D2W) are illustrated in the following figure below.In this article, we want to shift the focus towards the requirements for integrated metrology solutions and discuss the benefits and results obtained by in-line measurement to enable both, high bonding performance and process control.We present the W2W overlay concept based on our dual side pneumatic deflection and bond wave propagation concept. This technology features, together with a 20mK temperature control enables for scaling correction and offer a <50nm post bond accuracy (@3sigma) with a max vector not larger than 80nm. In order to ensure and monitor the bonding performance, a powerful and reliable metrology solution is required. The integration of the ISO3-based SET NEO HB flip-chip bonder into a SUSS production cluster even places additional requirements on the metrology platform for void free sequential D2W placement. Integrated metrology can easily feedback both wafer-to-wafer and die-to-wafer alignment offsets if sufficiently fast and accurate. In case of D2W direct glass carrier pick-up capability allows to handle and realize void free stacking of <50um thin dies assisted by up to 3kgF bond force to mitigate the die-warpage. Furthermore, by combining D2W with W2W bonding, thin dies placed on glass carrier with LR/TBM can be collectively transferred in one single step to the target wafer. Here D2CW overlay error can then be improved by prior overlay mapping and derived global offsets.

Biography
Thomas Schmidt is Product Manager in the Bonder Division of SUSS MicroTec iSolutions GmbH n Sternenfels. After his graduation in Microsystems Technology at the University of applied sciences in Kaiserslautern he has held various positions in MEMS/semiconductor processing and has also lectured on advanced lithography as well as on MEMS and advanced CMOS fabrication.Since December 2017 Thomas Schmidt is a member of the Bonder Division of SUSS MicroTec (product line "Permanent Wafer Bonding“) with a strong focus on automated cluster platforms for MEMS/packaging applications and hybrid bonding for advanced packaging.

AI – Enabling a Revolution in Chip Design Productivity

Bjerregaard, Tobias
Senior Director of AI
Synopsys

Abstract
AI, and in particularly generative AI technologies, are set to transform entire industries. AI-based chip design flows are yielding better results and improving designer productivity by adding automation capabilities to assist human experts in the design process. In this talk I will look at the history of AI that has led us to this point and outline key uses of AI in EDA. I will look across the EDA stack at where AI-based approaches have made the highest impact and also look at how generative AI technologies can help capture human knowhow and as such help to mitigate the talent gap that the chip design industry is facing.

Biography
Tobias BjerregaardMBA in General Management, Copenhagen Business School (2017)PhD in Asynchronous Circuit Design and Networks-on-Chip, Technical University of Denmark (2005)MSEE in Solid State Physics, Technical University of Denmark (2000)CEO and founder of startup Teklatech, acquired by Synopsys in 2018. Currently Sr Director of AI at Synopsys, leading a group of AI R&D teams across the US and Europe that explores, develops and markets new EDA methods and tools based on advanced, state-of-the-art AI technologies

Powering the Future of European Semiconductors by Building and Nurturing a Talent Ecosystem

Le Lan, Catherine
Program Manager
Synopsys, Inc.

Abstract
The semiconductor industry is experiencing unprecedented growth, accompanied by significant challenges, particularly in Europe which aspires to capture 20% of the global market share.While emerging technologies such as Generative AI, AI-enhanced Electronic Design Automation (EDA), and advanced cloud services offer promising solutions to some of these challenges, the most pressing issue in Europe lies in cultivating a robust talent pipeline, encompassing comprehensive education, strategic acquisition, and continuous development, to bridge the skill gap.This presentation will delve into Synopsys' role in addressing Europe's semiconductor talent crisis highlighting our workforce development strategy to attract, develop, and retain top-tier talent. This approach is designed not only to drive innovation but also to position Europe to meet the evolving needs of the semiconductor industry.By focusing on these key areas, we aim to become the preferred technology partner of choice for workforce development in Europe's semiconductor ecosystem, ensuring its long-term success and global competitiveness in this critical sector.​​

Biography
Catherine's experience focuses on worldwide customer success management, , encompassing technical support, training, project management, and team leadership. Her expertise spans both industry and academia.Holding a master's degree in Microelectronics from ESIEE Paris, Catherine started her professional journey as a Field Application Engineer, advancing to roles as a Technical Project Manager and Team Manager at LSI-Logic, Synopsys, and Texas Instruments in France and the United States.After a stint in the academic world, Catherine returned to industry in 2018. In 2022, Catherine rejoined Synopsys with a mission to bridge the gap between industry and academia. Her current role focuses on establishing and nurturing education and research collaborations with European universities, capitalizing on her multifaceted background.Throughout her career, Catherine has demonstrated adaptability, leadership, and a commitment to fostering innovation through strategic partnerships. Her journey exemplifies the value of cross-sector experience in driving technological advancement and educational excellence.​​

Tracking the Supply Chain for Compound Semiconductor Materials

Scott, Diane
Vice President
TECHCET CA LLC

Abstract
Coming soon

Biography
Diane is VP at TECHCET. She also maintains expertise in chemical-mechanical planarization (CMP) consumables and technology based on over 20 years of industry experience. Her work experience in CMP includes leadership and innovation at Rodel (now Dow) and NexPlanar (now Cabot Microelectronics), both CMP pad manufactures. She also works in senior technologies at 3M in Texas. She was a co-founder of CMP Solutions LLC, a start-up company providing technical expertise and consulting services in the CMP technology area for semiconductor manufacturing companies. She holds a Ph.D. in chemical engineering from the University of Massachusetts, Amherst, a B.S. in chemical engineering from Clarkson University, and 13 patents.

Tailored Intelligence: The Art of Customized Processors for AI Acceleration

Amrouch, Hussam
Prof. Dr.-Ing.
Technical University of Munich (TUM)

Abstract
In the rapidly evolving field of artificial intelligence (AI), the drive for processor customization to substantially enhance efficiency is more critical than ever. In this talk, we will explore the pivotal role of tailoring the underlying RISC-V CPU architecture to meet the specific demands of AI algorithms. We will highlight how brain-inspired hyperdimensional computing presents a compelling alternative to deep learning, thanks to its remarkable capacity to learn from minimal and noisy data. Lastly, we will illustrate how in-memory computing and cryogenic computing open new avenues for dramatically enhancing the speed and efficiency of AI computations.

Biography
Hussam Amrouch is a professor heading the Chair of AI Processor Design at the Technical University of Munich (TUM). He is, additionally, heading the Brain-inspired Computing at the Munich Institute of Robotics and Machine Intelligence. Further, he is the head of the Semiconductor Test and Reliability at the University of Stuttgart. He received his Ph.D. degree with the distinction (summa cum laude) from KIT, Germany in 2015. He has more than 260 publications (including over 110 articles in many top journals like Nature Communications) in multidisciplinary research areas covering semiconductor device physics, circuit design and computer architecture. His research interest is transistor compact modeling, in-memory computing with a special focus on reliability, and cryogenic circuits for quantum computing.

Feasibility Investigation of Spherically bent Image Sensors

Pandey, Amit
PhD Student
Technische Hochschule Ingolstadt

Abstract
Due to increasing active safety requirements from tests like NCAP, it is expected that all newly registered vehicles will soon have at least two cameras, with medium to higher-end vehicles having four. With 80 million new vehicles worldwide annually, this creates a high demand for cameras, which, due to volume, has a high potential for cost reductions. Since the most expensive component in a camera is its objective, it raises the question of whether its complexity can be reduced. This work investigates a curved imager to reduce the number of elements in the objective by eliminating the need to form a planar image.The long-term goal is to attach the imager to the last optical surface, either with a recess in the element to attach bond wires or using a Through-Silicon Via approach. This work presents an intermediate step, where a commercially available imager is thinned and bonded into a curved pedestal, detached from the objective as in established camera designs.The design was first evaluated using silicon chips with thicknesses of 30 and 50 µm. BK7 glass was used as the pedestal’s material, into which a 60mm concave radius was ground. Various liquid adhesives were investigated to bond the chip into the curvature. During assembly, the top side of the chip was vacuum sucked onto a convex 60mm radius tool, adhesive was applied, and the chip was pressed into the pedestal's depression. While remaining in place, the adhesive was cured at 150°C for 15 minutes. The assembly process impact was investigated by measuring induced stress via Raman spectroscopy and bonding quality via scanning acoustic microscopy (SAM). SAM investigation showed that the interconnect with the adhesive was inhomogeneous because of non-uniform adhesive dispensing and pressure application. Therefore, the approach was modified by investigating various adhesive volumes and dispensing patterns. After bonding, high compressive stress concentrations were seen at the center of the edges.In the next step, thinned imagers were bonded to pedestals and to PCBs. Electrical connections were realized by 25 µm wire bonds. After the assembly, it was possible to read register values from the imager, but capturing an image was not feasible. The reason for this was hypothesized to be damage to the imager during thinning. The hypothesis was supported by results from accelerated thermal aging, where cracks appeared after 100 cycles. Work is in progress to achieve a fully functional imager.

Biography
Amit Pandey received a B. Tech degree in Mechanical Engineering fromSRM University in India and an M. Eng. degree in Automotive Engineeringfrom University of Applied Sciences in Ingolstadt. He is a researcher atthe Institute of Innovative Mobility affiliated with Technische Hochschulein Ingolstadt, Germany. He is currently a PhD student at the University ofApplied Sciences in Ingolstadt and his current research topics are reliabilty ofoptical sensors in automotive industry and the effect of aging on automotivecamera and its impact on performance on critical tasks such as objectdetection.

Proven Strategies to Speed AI Cycles, Delivering Millions in Value to Semiconductor Fabs

McDonnell, Monica
AI Strategist - Manufacturing
Teradata

Abstract
AI is being increasingly explored to enhance yield and throughput in semiconductor manufacturing. Due to the lengthy manufacturing processes, where functional testing is not available for weeks, earlier decision-making can deliver large rewards. However, data challenges restrict the number of analytic cycles that can be run, limiting the value AI can deliver. A semiconductor fab is a challenging environment for process analytics. Wafer fabs and assembly locations produce vast amounts of data at high velocity. In addition, the data associated with a particular product must be knitted together from different formats, attached to different units of measure (e.g. lot, wafer, device) and collected at different times and steps of the process. Early adopters of AI in the fab most commonly site data volume and speed of analytic cycles as two key inhibitors in moving from pilot to full implementation of their algorithms.The number of analytic cycles can be dramatically improved by bringing the AI to the data instead of taking the data to the AI algorithm. This minimises time consuming data movements and provides an easily auditable path from raw data through data transformations to the AI output. The approach is equally applicable for structured data, time series data and other complex data types such as images or video.By bringing the AI algorithms to the data, semiconductor companies have experienced significantly faster analytical cycles. Faster analytic cycles can be run more frequently and on larger data sets, removing the need for sampling. The approach has already been proven in practice over multiple use cases in the semiconductor industry, with benefits measured in tens of millions of euros per year.This talk will outline the principles of bringing AI to the data to speed analytic cycles, discuss the capabilities needed to implement this approach, and present some case studies.

Biography
Monica McDonnell is and experienced consultant in the field of enterprise software, digital transformation, big data, AI and analytics. She has spent her career consulting within the manufacturing industry in various roles. In her current role, Monica focuses on how manufacturers, inlcuding semiconductor companies, can move beyond the hype to deliver measureable business value from AI.

Increasing Sustainability and Efficiency in Furnace Deposition Processes

Lösel, Maximilian
Product Specialist
Tokyo Electron Europe

Abstract
TEL, as a leading global company of semiconductor production equipment, is committed to contributing to technological innovation in semiconductors to develop a dream-inspiring society. As semiconductors are increasingly becoming a vital part of social infrastructure, we challenge ourselves to make further innovations in environmental sustainability for our semiconductor production equipment. TEL’s ambition toward Net Zero is confirmed by the science-based targets for the environmental emission goals. By 2040, we aim to achieve net zero for scope 1, 2, and 3 emissions.In our presentation, we will discuss TEL’s environmental sustainability targets and show an example of reducing F2 consumption of a TEL LPCVD system that is being used for the deposition of polycrystalline Si films while at the same time improving the efficiency of the process itself.

Biography
Maximilian has more than 10 years of experience in the semiconductor industry. After his apprenticeship as mechatronics technician at Infineon Dresden he went to engineering school for mechatronics (state-certified engineer). After that, Maximilian joined Tokyo Electron in 2019 as Field Service Engineer for Thermal Processing Systems and started to study Industrial Engineering, where he a achieved a bachelors degree in 2021. Since 2022, Maximilian is part of the European Furnace Technical Support Team. Since that, he has been involved in different technical projects, such as tool evaluations and various optimizations, working closely with customers. In 2023, Maximilian achieved a master’s degree in parallel to his job in Industrial Engineering from Hochschule Wismar. Since 2024, he is a doctoral candidate at Fraunhofer IPMS / Technische Universität Dresden, working on sustainable solutions for thermal processing.Dr. Volker Hemel biography:Volker is a twenty-seven year veteran in the Semiconductors industry. After completing his PhD at RWTH Aachen, he started working at VKR Gelsenkirchen department for analytic and environmental control. In 1997, he moved to Tokyo Electron, where he worked as a process engineer for furnaces.Volker is currently working closely with European customers as European Process Manager in Thin Film Formation, supporting and improving their productivity requirements and future-oriented projects.

The Energy Needs of the Semiconductor Industry and how to Meet them

Fournier, Aude
Global Market Executive
TotalEnergies

Abstract
The Energy Needs of the Semiconductor Industry and how to Meet them

Biography
Aude Fournier is Global Market Executive at TotalEnergies.She joined the company in 2017, following the acquisition of Direct Energie, a French energy supplier.She has 20 years of experience, including 16 years in Energy and 4 years in Strategy and Management consulting.Aude is part of OneB2B Solutions, a team aiming at supporting global companies in their decarbonation journey.Dedicated to the Semiconductor & Electronics industries, her objective is to provide her partners with all the solutions they need, globally, based on TotalEnergies’ portfolio (renewable electricity, aggregation or flexibility services, biogas, cooling fluid…).

Seeing Beyond the Visible: High-Performance SWIR Machine Vision Solutions

Cheskis, David
Sr. Product Director
TriEye

Abstract
While InGaAs-based SWIR sensing has been available for decades, its use has been limited to industries like aerospace and scientific research due to high costs and low production yields. However, recent advancements in CMOS-based SWIR sensors are expanding the accessibility of this technology across new industries.To fully unlock the potential of these sensors, a comprehensive SWIR sensing ecosystem is essential. This session will explore novel approaches in SWIR image sensor manufacturing that enable high-performance, scalable solutions. We will also discuss how these advancements can drive "More than Moore" imaging solutions, providing new opportunities to see beyond the visible and open doors to previously unattainable applications.

Biography
David Cheskis, PhD, is the Senior Product Director at TriEye Ltd., where he is responsible for new SWIR sensing products. Dr. Cheskis is an expert in semiconductor, optoelectronics, and communications technologies, products, and markets and started the first 6-inch GaAs VCSEL wafer foundry business in 2013. Since 1996, Dr. Cheskis has led the development of semiconductor and optical technologies and products for wireless, wireline and optical products at diverse sensing and communications companies including Lumentum, LeddarTech, IQE plc, II-VI Incorporated, ANADIGICS Inc, Oclaro Inc., Sarnoff Corporation, Jazz Semiconductor, Multilink Technology Corporation, and Vitesse Semiconductor. Dr. Cheskis earned PhD and MS degrees in Electrical Engineering from the University of California, San Diego and a BSEE degree in Microelectronic Engineering from Rochester Institute of Technology. He is a Senior Member of the IEEE.

Packaging of micro-optical components for light coupling in silicon photonics

Wakeel, Saif
Ph.D. Researcher
Tyndall National Institute

Abstract
This presentation will focus on the development of novel packaging processes using micro-optics to achieve high levels of optical connectivity to photonic devices. Furthermore, using micro-optics enables directly pluggable fibre connections, avoiding the need to bond optical fibre arrays to the facet of the photonic device. My presentation will review the theoretical requirements for micro-optical packaging for photonic devices and experimental packaging processes, which have the potential to scale to high volume. These novel packaging processes are particularly suited to data centre applications where the massive growth in bandwidth densities presents significant challenges for photonic device packaging.

Biography
Saif Wakeel is a Ph.D. student in the Photonic Packaging and Integration Group at Tyndall National Institute, University College Cork. He received Master Degree from University of Malaya, Kuala Lumpur, Malaysia in 2022 and Bachelor Degree from Aligarh Muslim University, India, in 2018. Before joining Tyndall, He was with NXP Semiconductors, Malaysia, for two years. He was also a Research Intern at the National University of Singapore (NUS), Singapore. He has spent a year of research exchange at Dicle University, Turkey under Erasmus+ program. His research interests include wafer-level photonic and electronic packaging, novel micro-optics and integration methods, micro-transfer printing, and the reliability of photonic packaging. He has authored several publications, and two invited books with 400+ citations. He is a recipient of Wrixon Research Excellence Fellowship for attending Massachusetts Institute of Technology (MIT) as a visiting researcher.

Technologies and Embedded Intelligence developments for Future Smart Vision Systems

Castelein, Pierre
Parternship manager
Univ. Grenoble Alpes, CEA, Leti, F-38000 Grenoble, France

Abstract
Coming Soon

Biography
Pierre Castelein obtained his engineering degree in electronics from the Institut Supérieur d'Electronique du Numerique (ISEN, France) in 1992 and a PhD in electronics from the Institut d'Electronique et Micro-électronique du Nord (IEMN, France) in 1997. Then he joined the Optics and Photonics Division of CEA-Leti as a characterization and modeling engineer for quantum IR imagers. Starting from 2004, he managed several R&D projects with the French defense procurement agency (DGA) involving the design of advanced IR imagers. From 2008 to 2012, he headed the Leti imaging characterization team involved in the specification and characterization of new imagers designed at Leti. In 2012, he became coordinator of the joint laboratory between Lynred (formerly Sofradir) and Leti. From 2015 onwards, he was in charge of Leti's strategic partnerships in infrared imaging with Lynred and coordinated the setup of many R&D projects with DGA, DGE, ESA, CE (H2020). Since 2021, he is partnership manager for Visible Imaging in interaction with STmicrolectronics and international partners.

Cybersecurity for Next Generation Critical Instructure Systems

Marnerides, Angelos
Asst. Professor
University of Cyprus

Abstract
Critical Infrastructure Systems (CIS) composing Critical National Infrastructures (CNIs) enabling sectors such as power, manufacturing, nuclear, defence, space and transport are underpinned by Industrial Control Systems (ICS) that have recently been exposed to the Internet and the Internet-of-Things (IoT) technologies by virtue of urging business models. Evidently, this relatively recent interface of such traditionally isolated setups with the IoT has resulted to a rapid surge of sophisticated and targeted Advanced Persistent Threats (APTs) causing significant safety as well as monetary effects on a global scale. Such attack vectors are stealthy, and they target hardware and logical processes that are typically resource-constrained and unprotected. Moreover, they are used frequently in several malicious cyber operations such as nation-sponsored cyberwarfare and cybercrimes. Therefore, a great challenge and need exists on developing and evaluating defence and mitigation mechanisms within realistic setups that also adhere to ICS vendor-oriented and proprietary software nature. In this talk, we will focus on illustrating the vulnerability spectrum of ICS devices as well as on-going activities on how generalised vendor-independent solutions can be developed via real use cases in the context of the power, utilities and defence sectors.

Biography
Dr. Angelos K. Marnerides is an Asst. Professor of Cyber Physical Systems Security at the University of Cyprus, in the Department of Electrical & Computer Engineering and a faculty member leading activities in cybersecurity research at the KIOS Research and Innovation Centre of Excellence. Previously, he was a Assoc. Professor at the University of Glasgow (UofG), leading the Glasgow Cyber Defence Group and all the cybersecurity research activities across all research sections in the School of Computing Science at UofG. His research focuses on applied security and resilience for Internet-enabled cyber physical systems using data-driven approaches with focus on critical national infrastructures in various sectors including energy, defence, manufacturing and water utilities. Dr. Marnerides’ research has received significant funding in excess of €8M+ from the industry (e.g., Fujitsu, BAE, Raytheon, EDF), governmental bodies (e.g., EU, IUK, EPSRC) as well as UK national security and defence agencies (e.g., NCSC, GCHQ, MoD Dstl). Dr. Marnerides is currently the project coordinator for the €5.8M COCOON project funded by the EU Horizon Innovation Action (IA) being the first ever EU IA project coordinated by UCY KIOS and UCY in general. He is a malware detection patent author and has published extensively in top-tier IEEE/ACM conferences and journals. Moreover, he is a Senior Member (SMIEEE) of the IEEE and a member of the ACM since 2007. Dr. Marnerides has also played significant roles in various IEEE conferences, earning IEEE ComSoc contribution awards in 2016 and 2018. He obtained his PhD in Computer Science from Lancaster University in 2011 and has held lectureships and postdoctoral positions at institutions including Carnegie Mellon University, University of Porto, University College London, and Lancaster University.

Atomic Layer Deposition of 2D Materials For Electronics and Energy

Mattinen, Miika
Postdoctoral researcher
University of Helsinki

Abstract
Two-Dimensional (2D) materials are among the top candidates for enabling continued scaling of microelectronics due to their atomically thin nature and attractive properties. Transition metal dichalcogenides (TMDCs) range from semiconductors to (semi)metals. Semiconducting TMDCs including MoS₂ and WS₂ have attracted attention for future nano(opto)electronics. Yet, deposition processes producing uniform, thickness-controlled films on wafers and three-dimensional structures required to fulfil these promises are lacking. Additionally, meeting the thermal budgets of different applications is a major challenge.ALD, a method already in widespread use in the semiconductor industry, can meet these requirements. In this talk, I will discuss both successes and remaining challenges in ALD of 2D materials. One direction we have pursued is broadening the process toolbox to include materials with higher band gaps (ZrS₂, HfS₂, SnS₂) or metallic nature (e.g. TiS₂). The flexible nature of TMDCs also make them an attractive choice for flexible electronics, yet deposition processes compatible with typical polymer substrates are lacking. I will discuss a record-low temperature plasma-enhanced ALD process tailored for this challenge.Beyond energy-efficient electronics, electrocatalysis is a key process in creating a sustainable future based on renewable energy. One promising application of TMDCs is in water splitting as an alternative to scarce and expensive platinum as the hydrogen evolution reaction (HER) catalyst in acid (proton exchange membrane electrolyzers). Beyond electronics, TMDC ALD processes can be used to synthesize both model catalysts for fundamental studies and industrially relevant, high-performance catalysts on high surface area supports that minimize the required catalyst loading.The overarching theme of my talk is the key role that ALD chemistry plays in realizing scalable synthesis of 2D materials for semiconductor as well as energy applications of the future

Biography
Dr. Miika Mattinen is a Research Council of Finland postdoctoral researcher in the HelsinkiALD group (University of Helsinki). He received his PhD from the University of Helsinki in 2020, followed by postdoctoral positions at Eindhoven University of Technology (2021-2022) and Stanford University (2022-2023) prior to returning to Helsinki. He has worked on ALD since 2014 and on 2D materials since 2016, exploring especially at semiconductor and electrolyzer applications among many other applications and materials. He has co-authored 41 peer-reviewed publications and three patents.

Panelist

Mueller, Maike
Vice President Strategy and Development Semiconductors Powerelectronics
Volkswagen

Abstract
Panelist

Biography
Dr. Maike Mueller graduated in chemistry from Technical University of Munich and received her doctorate from the Humboldt University of Berlin while working at the Federal Institute for Materials Research and Testing. She started her career in the semiconductor industry as a quality and process engineer at Osram Opto Semiconductors in Regensburg. The past 11 years she has been working in several roles within Infineon's automotive and consumer divisions as product marketing manager for high-power applications and head of product quality management for power and system IC devices among others.Since Oct 2024 she joined VW Group as Head of Strategy & Development of Semiconductors, Group Powerelectronics.

Integrated photonics in 6G

Annamaa, Petteri
6G hardware technology lead
VTT

Abstract
Presentation on potential applications and areas of technology development for integrated photonics for 6G

Biography
Petteri is 6G Hardware Technology Lead at VTT with a passion in turning research into business. He looks for exceptional opportunities and creates strategic commercial partnerships. Petteri has a background in research, product development, engineering and business development both from VTT as well as from the information technology hardware, cyber security and automotive industry. Petteri holds a degree in Lic Tech in Telecommunications Electrical Engineering from University of Oulu.

Active Hyperspectral Imaging Using Extremely Fast Tunable SWIR Light Source

Soukkamaki, Jussi
Lead, Hyperspectral & Imaging Technologies
VTT Technical Research Centre of Finland Ltd

Abstract
VTT has created an active hyperspectral imaging concept using spectrally tunable light source based on MEMS Fabry-Perot interferometer and supercontinuum laser. The proposed solution opens new possibilities in close and long range distances enabling detection even in the total darkness. Especially in the industrial lines, this new technology may enable hyperspectral market expansion from niche to machine vision mainstream.

Biography
Jussi Soukkamäki has over 20 years of experience in optoelectronics industry. During the last 12 years he has worked with spectroscopical applications in various positions from R&D to sales and business development in companies like Rikola Ltd, Senop, Timegate Instruments and Spectral Imaging Ltd.(SPECIM). Currently he works as a Lead, hyperspectral and imaging technologies, at VTT.

Driving Fab Automation

Iranzadeh, Ayda
Digital Transformation Program Manager
X-FAB MEMS Foundry Itzehoe

Abstract
Integrating digital technologies with physical assets is not a trend in the 21^st century but a necessity for our industry. Driving this change and embracing digital innovation should be seen more as an opportunity than a challenge.To harness the potential of digital innovation, we need a collaborative approach that combines fresh perspectives with proficient insights. When the motivation of younger people meets the wisdom of more experienced individuals, we create an environment where success thrives. The optimism and enthusiasm of younger leaders at the workplace not only drive innovation but also help to overcome challenges.

Biography
Ayda Iranzadeh is a digital transformation program manager at X-FAB MEMS Foundry in Itzehoe, Germany, with a specialization in factory automation and operational efficiency dedicated to driving business growth and advancing innovation. Currently, Ayda leads the automation and digital transformation program and related teams at X-FAB Itzehoe and drives the automation strategy and initiatives.In 2023, Ayda was honored with the „Semi Europe 20 under 30“ award, recognizing her as an inspiring young leader in Europe's semiconductor industry.

Convergence of Electronics and Photonics Technologies

Kittler, Gabriel
CEO Site Erfurt
X-FAB Semiconductor Foundries GmbH

Abstract
The adoption of novel enabling technologies and material systems opens up opportunities to drive innovation and the development of new applications to address our societal challenges. The industrial and commercial viability of scaling up these technologies hinges on convergence between photonics, semiconductors and other supporting industries. The heterogeneous integration of novel materials and chiplets (e.g. InP, LNO, 2D, polymers) with photonics and electronics represents a key enabling technology for future fabs. This calls for the creation of new ecosystems and models for collaboration.

Biography
Dr. Gabriel Kittler, CEO of X-FAB Erfurt (Germany), joined X-FAB in 2007. After working in process development for high-voltage technologies, he became Innovation Manager in 2012, coordinating all activities related to emerging technologies and collaboration with universities, research centers, and industrial partners. Since 2020 he is CEO of the X-FAB site in Erfurt.He studied Electrical Engineering with focus on Microelectronics at the Technical University of Ilmenau and holds a Ph.D. in Electrical Engineering and Information Technology.

More than Photonics:SOI photonics platform with InP-chiplet heterogenous integration for multi-terabit datacom and telecom applications

Mellin, Joni
BL manager photonics
XFAB Group

Abstract
The photonixFAB project aims to empower photonics innovation by SMEs and large entities by providing low barrier access to both low-loss silicon nitride (SiN) and silicon-oninsulator (SOI) based photonics platforms with indium phosphide (InP) and lithium niobate (LNO) heterogenous integration capabilities. Micro transfer printing of InP chiplets on the SOI silicon photonics platform enables the combination of the best of the two worlds in a versatile manner. This opens the path to support multi-terabit datacom and telecom optical transceiver applications.

Biography
Mr. Joni Mellin is the Photonics Business Line Manager at X-Fab since 2022. Previously he served at ams OSRAM (2014-2021), where he held Engineering director and other positions in the Full Service Foundry division. Prior to that, he served at Microsoft (2014), Nokia (2008-2014), Micro Analog Systems (1999 – 2008) and Electron Physics Laboratory at Helsinki University of Technology (1997-1999). He received his Licentiate of Science (Tech) (2012) and Master of Science (Tech) (1999) degrees in semiconductor technology from the Aalto University and a dual GEMBA degree from WU Vienna and University of Minnesota in 2019.X-FAB is one of the world’s leading specialty foundry groups for analog/mixed-signal semiconductor technologies with a clear focus on automotive, industrial, and medical applications. As a pure-play foundry, we provide manufacturing and strong design support services to our customers that design analog/mixed-signal integrated circuits (ICs) and other semiconductor devices (inc. MEMS, power semiconductors and photonics) for use in their own products or the products of their customers. www.xfab.com

Session 6: MEMS and Imaging Young Talent (Session Chair)

Damianos, Dimitrios
Project Manager
Yole Group

Abstract
The "MEMS & Imaging Young Talent" session is dedicated to showcasing the next generation of innovators in the field of MEMS and imaging sensors. As these technologies continue to revolutionize industries ranging from consumer to automotive, healthcare and elsewhere, nurturing young talent is essential for sustaining innovation and growth.In this session, we will spotlight emerging researchers and engineers who are pushing the boundaries of MEMS and imaging technologies. These young professionals bring fresh perspectives and novel approaches to longstanding challenges, offering new solutions that could shape the future of the industry. Their work spans cutting-edge developments in sensor miniaturization, advanced fabrication techniques, and enhanced imaging capabilities, reflecting the dynamic and interdisciplinary nature of this field.Join this session as it is an opportunity not only to celebrate the achievements of young talent but also to foster connections that will drive future collaborations and innovations.

Biography
Dimitrios Damianos, Ph.D., is a Project Manager in the Consulting Services Division at Yole Group. He manages transverse consulting projects, ensuring their quality and maintaining long term relationships with key accounts. Dimitrios also plays a key role in the expansion of Yole’s market & technical knowledge and supports the development of strategic projects following the company’s leading customers within the semiconductor industry. He holds a BSc in Physics and MSc in Photonics, both from the University of Patras (GR), as well as a PhD. in optics & microelectronics from the University of Grenoble-Alpes (FR).

From centralized to decentralized: The next era of smart healthcare

Mouly, Jerome
Deputy Director
Yole Group

Abstract
Healthcare sector, including diagnosis and therapy, has been shifting from a centralized to a decentralized model over the last two decades. This trend was accelerated during the COVID-19 pandemic, with several companies now offering decentralized healthcare monitoring solutions (PCR tests, telemedicine…). Thanks to advancements in technology, miniaturization, artificial intelligence, a deeper understanding of biology, and new techniques, the boundaries of decentralized healthcare settings have been reduced. For example, microfluidics is now widely adopted in the medical market, increasingly incorporating semiconductor-based technologies such as CMOS image sensors, photonic devices, or acoustic sensors. PoC echography technology is emerging with semiconductor-based ultrasound technologies to better meet the need for patient proximity. MEMS technologies and miniaturized sensors are also expanding the range of conditions (ECG, irregular heart rate, oximetry, sleep apnea, hearing loss) that can be monitored using consumer electronics like wearables along with intelligence at the sensor level. These developments are bringing the medical and consumer markets closer than ever before. The presentation will highlight the latest market trends and forecast at the sensor level with ecosystem dynamics between consumer and healthcare players.

Biography
Jérôme Mouly is Deputy Director, More than Moore Business Line at Yole Group.Jérôme manages the expansion of the technical expertise and market know-how of the team. In addition, Jerome’s mission focusses on the management of business relationships with company leaders and the development of market research and strategy consulting activities.He has conducted more than 100 marketing and technological analyses for industrial groups, start-ups, and institutes in the field of MEMS and sensing technologies.Jérôme has been also deeply engaged in Yole Group's finance activities with a dedicated focus on the commercial exploitation of smart system technologies and access to funding opportunities.Jérôme Mouly earned a Master of Physics degree from the University of Lyon (FR).

Semiconductor Equipment, the enabler of the semiconductor industry

Yeghoyan, Taguhi
Senior Analyst – Wafer Fab Equipment
Yole Group

Abstract
Semiconductor equipment is an integral part of the progress of semiconductor devices. It facilitates decreased production costs, advancements in device technology, and the application of sustainability measures, among others. To address these needs, semiconductor equipment vendors navigate through supply chain challenges, geopolitical tensions, and chipmaker CapEx fluctuations while collaborating with all industry actors and delivering a complete solution of machine hardware and software tied with the operated process. In this talk, we dive deep into the relationship between semiconductor equipment types and the semiconductor ecosystem.

Biography
Taguhi Yeghoyan, PhD is Senior Technology & Market Analyst, Semiconductor Equipment at Yole Group.Taguhi’s mission is to daily follow the semiconductor industry and its evolution. Based on her expertise in this field, especially on the semiconductor supply chain (processes, materials, equipment, and related applications), Taguhi produces technology & market products and is engaged in relevant custom projects.Prior to Yole Group, she worked in world-class European research centers and laboratories, including imec (Belgium), LMI (Lyon, France) and LTM at CEA Leti (Grenoble, France). All along her past experiences, Taguhi has authored or co-authored two patents and more than ten papers.She has graduated from Wroclaw University of Technology (Poland) and University of Lyon (France). Taguhi also completed her PhD in material science from the University of Lyon (France).

From MEMS to Imaging Sensors, Global Trends and Market Opportunities

Eloy, Jean-Christophe
CEO and President
Yole Group

Abstract
In 2023, the MEMS market saw a slight decline to $14.6B due to downturns in consumer electronics and high inventory levels, but recovery is anticipated in 2024, with market growth projected to reach $20B by 2029. This growth will be driven by trends like increased sensorization in consumer devices, advancements in autonomous vehicles, Industry 4.0, and the rise of AI. Leading players such as Bosch, STMicroelectronics, and TDK continue to dominate, while new entrants and technologies are reshaping the landscape, particularly in China, which is rapidly expanding its MEMS production. Meanwhile, the CIS industry is experiencing steady growth with a projected 4.7% CAGR, as shipments are expected to rise from 6.8 billion to 8.6 billion units by 2029. Although smartphone demand is softening, sectors like other consumer products and automotive are driving demand, particularly with new safety regulations and automation needs. Innovations like triple-stacked sensor architecture, event-based imaging, and metasurface technologies are enhancing CIS performance. Key players like Sony are expanding their market share, while other competitors focus on integrating advanced architectures and low-power designs, strengthening the shift from traditional imaging to broader sensing capabilities. The presentation will cover the current status and future outlook of both MEMS and CMOS Image Sensor (CIS) industries, highlighting key growth drivers, ecosystem and market dynamics.

Biography
Jean-Christophe Eloy is CEO and President of the Yole Group.Created in 1998, the market research & strategy consulting company has grown to become a group of companies providing marketing, technology and strategy consulting, media in addition to corporate finance services. His mission is to oversee the strategic direction of Yole Group of companies, including Yole Intelligence, Yole SystemPlus and PISÉO.All year long, Jean-Christophe builds deep relationships with leading semiconductor companies, discussing and sharing information across his global network. His aim is to get a comprehensive understanding of their strengths and guide their success.Jean-Christophe is a graduate from EMLyon Business School (Lyon, France) and has a Ph.D. in Semiconductor Engineering from the National Polytechnic Institute of Grenoble (France).

Photonic Integrated Circuits: Industry Insights, Market Trends, and Technological Advances

Vallo, Martin
Senior Technology & Market Analyst
Yole Group

Abstract
Photonics integration is a growing trend, offering numerous advantages such as miniaturization, power efficiency, improved performance, cost reduction, scalability, high-speed data processing, and a platform for novel functionality.AI data centers face unprecedented demand, driving a new era of scalable infrastructure and sustainable solutions. This trend opens up new and equal opportunities to various photonic integrated circuit (PIC) technology platforms.Silicon PICs are compatible with CMOS (electronic) fabrication, allowing them to be manufactured using established foundry infrastructure. Additionally, new electro-absorptive materials for EO modulators, such as TFLN, BTO, or polymers, can be integrated into PICs, significantly improving energy efficiency.The need for new materials in future photonic integrated circuits offer the possibility for alternative platforms like LNOI, InP, and SiN. Strong competition is expected since lithium niobate seems to be more efficient as an individual platform and InP is also waiting for its killing application where silicon run out of steam.It is anticipated that recent progress in PICs will also create a highly competitive environment with discrete devices like VCSELs and EMLs. This talk aims to explore the positioning of photonic technologies in various communication and sensing applications and to provide roadmaps and market forecasts for industry.

Biography
Martin Vallo, PhD serves as a Senior Analyst, Photonics, specialized in optical communication and semiconductor lasers within the Photonics group at Yole Intelligence (Yole).