Continuous Sustainability Improvements in Subfab Operation Using Advanced Communication Capabilities as a Cooperative Effort of Multiple Stakeholders

Neuber, Andreas
Semior Director
Applied Materials GmbhH

Abstract
Provision of signals from process to subfab components have shown for some time the potential for a more sustainable operation of subfab equipment such as local abatement, dry pumps and others. This accounts to about 20% of the overall equivalent energy consumption of the manufacturing.The drive to transition to carbon neutrality in fab operation asks for further improvements.The presentation will address which optimization potentials have been identified and what needs to be done to implement them.A lot of them will require cross-functional efforts over many disciplines. Smart manufacturing methods are playing a very important part in the implementation as well.

Biography
Andreas Neuber, Ph.D. has been a Senior Director at Applied Materials since 2008. He has published 80+ papers related to semiconductor fab and facility design, sustainable design and energy savings, water management and recycling, contamination control, and industrial engineering.Prior to joining Applied Materials, Andreas Neuber was Vice President for M+W Zander. During his 18 years at M+W Zander, was involved in semiconductor fab construction and operation/optimization in many locations.Andreas Neuber received a PhD degree in Chemical Engineering from University of Technology Dresden. He is co-chair of the SEMI ESEC task force as well as Co-Chair for the IRDS Yield Enhancement Gas working group and the IRDS ESH/S Energy working group.

Epitaxial Growth of SiGe/Si Multi-Layers for Advanced Logic Devices

Khazaka, Rami
Principal Technologist and Epitaxy Program Manager
ASM

Abstract
In this talk, we will review the requirements and challenges of SiGe/Si multi-layers epitaxy for advanced technology nodes, namely complementary FET (CFET). CFET concept relies on stacking top and bottom devices vertically. To enable such integration, the epi stack should be thicker and different compared to gate-all-around architecture. Thus, requiring two different Ge contents in the stack to create etch contrast. In general, high Ge content SiGe layers show relaxation signs earlier than low Ge content SiGe layers, due to the increased lattice mismatch with Si substrate. Therefore, the high Ge content combined with several SiGe/Si layers would make it prone to relaxation and misfit dislocation (MD) appears on the surface. These defects would be detrimental for device performance and needs to be eliminated. Firstly, the characterization techniques suitable to detect such defects would be discussed. Moreover, optimized process conditions to enable fully-strained MD-free wafers will be presented highlighting the feasibility of the stack on industry relevant specs. Finally, transmission electron microscopy images will be shown depicting the sharp interface transition and smooth top surface morphology.

Biography
Dr. Rami Khazaka is Principal Technologist leading the Research and Development (R&D) epitaxy team at ASM Belgium. Dr. Khazaka joined ASM in 2018 as Senior Process Engineer to develop Group IV epitaxy processes. Before joining ASM, he was a postdoctoral researcher at CEA-LETI where he developed material for both CMOS and optoelectronic applications. Dr. Khazaka has more than 15 filed US patents and co-authored more than 30 papers in peer-reviewed journals. He holds a Master degree in renewable energies science and technology from Ecole Polytechnique, Paris, France and Ph.D. in Electronics from the François Rabelais University, Tours, France.

Topic Coming Soon

Rothrock, Stephen
Founder, President & CEO
ATREG, Inc.

Abstract
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Biography
Stephen founded ATREG in 2000 to help global advanced technology companies divest and acquire infrastructure-rich manufacturing assets, including wafer fabs (front- and back-end) as well as MEMS, solar, display, and R&D facilities. Over the last 23 years, his firm has completed 40% of all global operational wafer fab sales in the semiconductor industry, a total of 60 transactions.Recent global acquisitions and dispositions have involved ON Semiconductor, Allegro MicroSystems, Fujitsu, GLOBALFOUNDRIES, IBM, Infineon, Matsushita (Panasonic), Maxim, Micron, NXP, Sony, Qualcomm, Renesas, Texas Instruments, and VIS to name just a few. Prior to founding ATREG, Stephen established Colliers International’s Global Corporate Services initiative and headed the company’s U.S. division based in Seattle, Wash.Before that, he worked as Director for Savills International commercial real estate brokerage in London UK, establishing their global corporate services platform serving large multinationals, many of whom were leading technology companies. Stephen also served on the UK-listed property company’s international board. He also spent four years near Paris, France working for an international NGO. Stephen holds an MA degree in Political Theology from the University of Hull, UK and a BA degree in Business Commerce from the University of Washington in Seattle, USA.

Latest Solutions in the Energy Efficiency of Electronic Systems

Voraberger, Hannes
Corporate Vice President R&D
AT&S Austria Technologie & Systemtechnik Aktiengesellschaft

Abstract
Digitalization without further improvement in the energy efficiency of electronic systems will lead to a dramatic increase in energy requirements for data processing. The solution is based on processing systems with smaller nodes and a highly efficient power supply. Interconnect technology based on advanced IC substrate technologies offer great opportunities for improved signal processing and efficient power supply. Latest solutions will be presented in this talk.

Biography
Dr. Voraberger assumed his current position in 2010, as head of AT&S corporate research and development department. Previously Dr. Voraberger was responsible for AT&S corporate intellectual property and governmental funding.He also established the R&D center in AT&S Shanghai (China) and was project leader for AT&S research and development in AT&S Leoben (Austria).Dr. Voraberger studied industrial chemistry at Graz University of Technology, awarded multiple patents and has published several papers.

An Overview of Silicon Carbide Packaging for Power Electronics

Lobo, Ashley
Master Thesis Student
Automotive

Abstract
There has been a rise in the use of Silicon Carbide (SiC) in Power conversion applications in the photovoltaic, automotive and wind industries due to its low switching losses. This enables higher switching frequencies compared to conventional silicon devices. Recently there has been a large-scale adoption of SiC because of manufacturing breakthroughs resulting in cheaper semiconductors which can be produced on a relatively larger scale. With the shift from 150mm to 200mm wafer size, the economies of scale will be enhanced even further, leading to even greater adoption of SiC in newer industries. While SiC properties make it an ideal replacement for Si in power conversion and power electronics, to extract the full potential from SiC, innovative packaging will be required because most of the current packaging is based on Silicon and not SiC. This presentation addresses the trends, innovation, and challenges in the manufacturing of power module packaging solutions like interconnections, encapsulation, die and substrate attachment, baseplate, etc. The presentation will also analyze the manufacturing implications of new packaging topics of SiC, such shift to diode-less SiC MOSFET module from antiparallel diodes. Case studies on newer innovations like the 4-lead TO-247 Kelvin source pin by different SiC manufacturing companies will be discussed. Supply chain players of different components and their business models including product portfolio of different manufacturers, trends, and comparison of different substrate materials as well as system level trends will be evaluated. Manufacturing of newer module packaging such as the use of dual side flex foil for interconnections, substrate attachment by silver sintering of the die or newer substrates for SiC like Si₃N₄ and AIN will be the focus of analysis. Key requirements and innovations in packaging of SiC semiconductors from various industries like Electric Vehicles, Wind, and Photo Voltaic have been identified.AbbreviationsSiC- Silicon CarbideMOSFET- Metal oxide semiconductor field effect transistors

Biography
Ashley Lobo is a dedicated researcher and postgraduate student currently pursuing his Master's thesis at the P3 group, located in their Munich office. His research focuses on the field of semiconductors, where he explores cutting-edge advancements and contributes to the technological development of this industry. Ashley is currently enrolled in the Automotive Production Engineering program at Technische Hochschule Ingolstadt, where he deepens his knowledge and expertise in this field.Prior to his master's studies, Ashley successfully completed his undergraduate degree at Dayananda Sagar College of Engineering, Bangalore. During his time there, he demonstrated a strong passion for research and academic writing, resulting in the publication of several research papers in esteemed international journals. Additionally, he has actively participated in technical forums, showcasing his expertise by sharing insightful knowledge through more than 50 articles.

Future Computation Technology from Cryogenics Point of View

Gunnarsson, David
Chief Technology Officer
Bluefors

Abstract
Cryogenics have long been an enabling technology for a wide field of research, and more recently in quantum computing with the potential to revolutionize the world and solve problems with use in all aspects of life. Cryogenics are a very integral part of the value chain by cooling the components and making sure that we can create systems that are producing a scalable way to give reliability and to increase predictability.

Biography
David Gunnarsson, CTO, leads Bluefors’ cryogenic development​for the quantum technology community.​He holds a Ph. D. degree from Chalmers University of Technology, Sweden, 2005, on his work on the Josephson junction based quantum bits.​After his Ph. D. he continued research at Low Temperature Laboratory, Helsinki University of Technology (2005-2008) and prior to joining Bluefors, he worked as a Senior Scientist at VTT Technical Research Centre of Finland (2008-2015). ​With his background in both microfabrication and cryogenic measurements of superconducting quantum circuits, he has a broad understanding of the future requirements in cryogenics for the quantum computation field.

Moderator

Mohr, Jan-Hinnerk
Managing Director & Partner
Boston Consulting Group

Abstract
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Biography
Jan-Hinnerk Mohr is Managing Director and Partner at Boston Consulting Group, co-leading BCG’s European semiconductor practice, and is based in Berlin, Germany. Jan has a deep passion for technology. He has served BCG’s semiconductor clients for more than a decade – his experiences covers in particular strategy & PMI, marketing & sales, and sustainability and digital. Jan has also helped many application industries in semiconductor-related questions, e.g. in the automotive industry with the digitalization/softwarization of vehicles. His passion for passion led to several publications in the tech and semiconductor space, e.g. most recently on CO2 emissions (scope 1,2 and 3) in the semiconductor industry. Prior, Jan has served as an ambassador to the World Economic Forum to push the thinking of Future Mobility and self-driving cars, and presented the results at the Annual Meeting in Davos in 2015. Jan holds a Master's degree in Business Administration & Econometrics with distinction from Mannheim University. Besides, Jan has studied in London, Shanghai and the United States.

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Dobson, Rebecca
Corporate Vice President, EMEA
Cadence

Abstract
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Biography
Rebecca joined Cadence Design Systems in January 2020 as Corporate Vice President, leading the field engineering and sales teams across Europe and the Middle East.Since graduating with a BSc (hons) Rebecca’s career has been in high tech companies. Supporting customers across innumerable industries, but with a focus on Automotive, Infrastructure, Consumer Electronics, Industrial and Communications.Rebecca has worked in a variety of blue-chip businesses and startups; all of which were successfully acquired due to their financial performance.Prior to joining Cadence, Rebecca was Global SVP Sales and Marketing at Inmarsat, transforming the Enterprise Business Unit from a satellite network management business to a IoT solutions business.Rebecca spent almost eleven years at Arm, the world’s leading semiconductor IP company, where she was VP EMEAI, leading sales and engineering teams across Europe, Middle East and India. Through her time at Arm Rebecca progressed her career from Global Account Management, managing one of Arms biggest customers, through to Director of Sales for various parts of Europe and finally VP EMEAI.Rebecca’s early career was spent in several successful startups, where she drove growth, revenue and value resulting in acquisitions by some of the biggest names in technology.Outside work, Rebecca enjoys cooking, gardening and interior design. As well as spending time with her young family.

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Nisewaner, Karna
Corporate VP, General Counsel & Corporate Secretary
Cadence

Abstract
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Biography
Karna Nisewaner has served as General Counsel and Corporate Secretary of Cadence since September 2022. Nisewaner is responsible for Cadence worldwide legal operations, covering matters such as corporate governance, corporate social responsibility, commercial transactions, employment, export compliance, government affairs, intellectual property, litigation, mergers and acquisitions, and stock administration. Prior to this role, she was Corporate Vice President and Deputy General Counsel at Cadence where she led many key functions in the legal department.Prior to joining Cadence in 2011, Nisewaner held in-house counsel roles at Intuit and IBM and was in private practice at Finnegan, Henderson, Farabow, Garrett, and Dunner, LLP focused on intellectual property.Nisewaner received her BSE in civil engineering and operations research from Princeton University and her Juris Doctor degree from UCLA Law School.

Carbon Nanotube Membranes for EUV Photolithography– a Versatile Material Platform

Salmi, Emma
Carbon Nanotechnology Engineer
Canatu

Abstract
The next generation of high-NA extreme ultraviolet (EUV) photolithography introduces increasingly higher power levels and faster reticle accelerations, enabling the next step in scanner efficiency. This results in higher heat load and mechanical stress on the EUV pellicles. Here we demonstrate carbon nanotube (CNT) pellicles manufactured directly from a floating catalyst chemical vapor deposition (FC-CVD) reactor, using a dry deposition method. This facile direct method yields highly uniform carbon nanotube networks of high strength and purity, enabling exceedingly thin CNT pellicles with high transparency at EUV wavelengths. Control over the FC-CVD synthesis allows tailoring of the carbon nanotube diameter and wall count (SWCNT or FWCNT), as well as control over the CNT network morphology such as the density, bundle size, and orientation of CNTs. The combination of this direct synthesis method with the exceptional mechanical and thermal properties of CNTs provides a versatile membrane platform, which can be further modified with post process steps such as purification to remove metal impurities. To enable conformal and thin coatings on CNTs, wet or dry functionalization steps are demonstrated to match the surface chemistry of CNTs to the specific deposition chemistry used in atomic layer (ALD), chemical vapor (CVD), or physical vapor (PVD) deposition processes. Thicker and denser CNT membranes with appropriate coatings are also suitable for other roles, such as filtering debris from an EUV source, blocking DUV photons and electrons, and providing a gas seal for differential pressure.

Biography
Emma Salmi is a senior nanomaterials engineer at Canatu. She has been spearheading the development of free-standing carbon nanotube membranes with primary focus on the FCCVD synthesis and early processing steps for optimum pellicle manufacturing for two years. Her background encompasses nanotechnology, thin film deposition systems and carbon nanomaterials with 15 years of industrial and academic experience. She has 37 peer-reviewed publications, conference papers and patents.

Boosting Technological Innovation and its Impact on Society – the Vital Role of RTOs

Dauvé, Sébastien
CEO
CEA-Leti

Abstract
More than ever before, the semiconductor has become a major economic and geopolitical issue, as well as one of sovereignty or climate. In this context innovation has an essential role to play, not only in contributing to European sovereignty, but also in bringing about major technological breakthroughs.Today, CEA Leti’s teams are fully committed to meet these challenges through many joint programs with partners. In the end, the so called “FAMES” pilot line proposed for chips act should be a formidable launchpad for industrializing these innovations.The presentation will provide an overview of current and future programs, as well as a timetable.

Biography
Sébastien Dauvé was named CEO of CEA-Leti effective on July 1, 2021, after more than twenty years of experience in microelectronics technologies and their applications, including clean mobility, medicine of the future, cybersecurity, and power electronics.Sébastien Dauvé started his career at the French Armament Electronics Center, where he worked on developing synthetic-aperture radar. In 2003, he joined CEA-Leti as an industrial transfer manager and supervised several joint research laboratories, in particular with the multinational Michelin.In 2007, Sébastien Dauvé became a laboratory manager, then head of an R&D department in the area of sensors applied to the Internet of things and electric mobility. During this time, he supported the dissemination of new technologies in industry, including the automotive industry (Renault), aeronautics, national defense (SAFRAN), and microchips with the industry leader Intel. He played an active role in the creation of start-ups in application fields ranging from health to infrastructure security, leading to dozens of new jobs. In 2016, he became Director of the CEA-Leti Systems Division.From sensors to wireless communication, Sébastien Dauvé has played an active role in the digital transformation, focused on coupling energy frugality and performance. He has made cross-disciplinary approaches central to innovation by harnessing the expertise of talented teams with diverse backgrounds. Their goal is to provide technological tools for meeting the major societal challenges of the future.Sébastien Dauvé is a graduate of the French Ecole Polytechnique and the National Higher French Institute of Aeronautics and Space (ISAE-SUPAERO).

Opening Remarks

Cockburn, Peter
Senior Product Marketing Manager
Cohu, Inc.

Abstract
Session Chair, Test and Reliability

Biography
Peter Cockburn is Senior Product Marketing Manager at Cohu’s Interface Solutions Group, responsible for RF contactors and probe cards. He has worked in the ATE industry for over 30 years at Schlumberger, NPTest, Credence, LTX-Credence, Xcerra and Cohu. During this time he has developed realtime and GUI software for ATE systems, launched several new SOC ATE systems and provided marketing and sales support in USA, Asia and Europe. More recently he was responsible for defining and delivering complete test cells that reduce cost of test for MEMS sensor applications. He has an Engineering degree from the University of Southampton, UK.

Curiosity & Collaboration: Innovating Together for the Sustainable Progress of the Semiconductor Industry

Haferl, Stephan
CEO
Comet Group

Abstract
In the ever-evolving semiconductor industry, where technological advancements shape the world around us, the need for sustainable progress has become increasingly vital, and collaboration an imperative catalyst for driving innovation. Emphasizing the power of curiosity, we explore how cultivating a collective spirit of exploration and inquiry can lead to transformative solutions that address environmental and societal challenges. By fostering collaboration across the value-chain, from manufacturers to researchers, we can forge a path towards the disruption of the existing norms, and thus challenge status quo. Join the journey where curiosity meets collaboration, propelling us towards a sustainable tomorrow in the semiconductor industry.

Biography
Stephan Haferl is the CEO of Comet Group since, a globally leading Swiss technology firm developing and producing innovative high-tech solutions based on x-ray and radio frequency for the semiconductor industry. With a strong track record and proven performance in business management, he is driving the company’s transformation with focus on innovation, operational excellence and customer orientation.Before joining Comet in 2007, where he was successfully working in various management positions, he held the positions of General Manager at Bartec-Meta Physics SA and Chief Operating Officer at Bartec Bacab SA.Dr. Haferl is a distinguished alumnus of the prestigious Swiss Federal Institute of Technology (ETH), where he obtained his Master's degree in mechanical and process engineering. He furthered his academic journey by earning a Ph.D., cementing his technological expertise.

The Future of Advanced Packaging Inspection is X-Ray

van de Ven, Dionys
President of the Industrial X-Ray Systems (IXS) Division
Comet Yxlon

Abstract
Key take aways:- Semiconductor industry is driven by miniaturization & efficiency- Next generation X-Ray as valuable inspection method for Advanced packaging- X-Ray as booster for faster time-to-market & increased yieldIn Summary:X-Ray technology is ready as a valuable inspection solution for Advanced Packaging to reduce time-to-market and increase yield.

Biography
Dionys van de VenPresident Industrial X-Ray Systems Born 1968, Dutch citizen; Master’s degree in mechanical engineering from the Eindhoven University of Technology, EindhovenBefore joining Comet in 2022, Dionys van de Ven has led Waygate Technologies’ x-ray business unit (part of Baker Hughes) as the unit’s Business Executive since 2020. In addition, he has been serving as Managing Director of Baker Hughes Digital Solutions GmbH and member of the board of management of GE Inspection Robotics.Dionys van de Ven began his career at Philips Assembléon in 1997. In 2005 he became Director of Customer Relationship Management at Philips Applied Technologies and, in 2007, Senior Director of Customer Programs, Service and R&D at Philips Healthcare. In 2017, he joined Waygate Technologies.

The Future of Advanced Packaging Inspection is X-Ray!

Drolz, Isabella
Vice President Product Marketing
Comet Yxlon GmbH

Abstract
The global demand for high-end computing power driven by smartphones, IoT applications, High-performance computing, and new mobility applications is constantly rising while facing miniaturization demands. The semiconductor industry is all about identifying and solving these challenges and thereby, yield and process control is core for foundries and its importance increased even more through the introduction of advanced packaging.In today’s environment two things can be observed. One, prototyping and verification costs exponentially increase while node sizes decrease. Two, a change from typical inspection methods like optical or FIB-SEM to advanced non-destructive inspection techniques like X-ray inspection.Ultimately advanced packaging companies seek non-destructive automated inspection tools which are fast enough to provide value within their production processes, increase yield and reduce waste at an early stage. This presentation will give an overview on how X-Ray and CT inspection can provide value-added data and information for exactly that.

Biography
Isabella Drolz is the Vice President Product Marketing at Comet Yxlon, which is the industrial X-ray & CT inspection system division of Comet. Comet Yxlon provides X-ray & CT inspection solutions for R&D labs & production environments, especially for Semiconductor customers to enhance their productivity. In her role she is responsible for product management, business development, global application solution centers and marketing at Comet Yxlon. Isabella has next to her industrial engineering education, a Bachelor of Science in International Business Administration and a MBA degree from Southern Nazarene University in Oklahoma City, USA. She has held several management positions in the mechanical and plant engineering industry driving market-oriented product development.

Zero defects matter | The Power of Xray in Advanced Packaging

Driller, Christian
Vice President R&D
Comet Yxlon International GmbH

Abstract
The semiconductor industry faces numerous challenges in the development and manufacturing of advanced packages. From a technical standpoint, these challenges include miniaturization, thermal management, and interconnect technologies. From a market perspective, challenges arise from higher production mixes due to application-specific integrated circuits (ASICs) and customers' intolerance for failures, particularly in critical automotive applications. These challenges have resulted in constantly increasing costs for designing and manufacturing ICs.Consequently, the industry is adopting two key approaches. Firstly, it is embracing lights-out manufacturing, which involves fully automated factory operations that offer increased productivity, improved repeatability, and consequently, enhanced quality. Secondly, new testing strategies are being implemented to provide data for advanced process analytics, enabling a shift from reactive to predictive actions. These strategies aim to improve traceability, yield, and overall operational efficiency.In the monitoring of interconnect characteristics such as diameter, height, co-planarity, and bump quality, inspection tools play a crucial role. Advanced X-ray technology, in particular, holds significant potential in driving the development of defect-free advanced packaging solutions through identifying root causes of failures.

Biography
Since 2020, Christian Driller has held the position of Vice President of Research and Development at Comet Yxlon, where his team spearheaded the development of cutting-edge x-ray and CT inspection solutions. Under his leadership, he has successfully established an agile R&D organization with a strong customer-centric focus, fostering a passionate and results-oriented team.Prior to his current role, Christian Driller assumed the position of Vice President of Business Excellence at Comet Yxlon in 2017. In this capacity, he played a pivotal role in driving the professionalization efforts across all functional areas of the company.Christian's professional journey commenced in 2012 within the automotive industry, where he served as a Business Consultant at Porsche Consulting. His primary focus was on optimizing and restructuring R&D departments within both automotive manufacturers and suppliers, delivering impactful results.Christian Driller holds a Master's degree in Finance from ESB Reutlingen University and a Bachelor of Engineering from Baden-Wuerttemberg Cooperative State University. Notably, during his undergraduate studies, he collaborated closely with Dr. Ing. h.c.F. Porsche AG, serving as his cooperating company.

Squeezing More Wafers out of a Fab: Can this be Done without Driving Cycle Times Through the Roof?

Lendermann, Peter
Chief Business Development Officer
D-SIMLAB Technologies

Abstract
Despite the current dip in global IC demand in some areas, industry leaders are optimistic about mid- and long-term growth prospects in semiconductor manufacturing which is also illustrated by the large number of new wafer fabrication facilities that are already under construction or being planned across the globe.In this setting, optimisation of factory capacity – with the objective to squeeze even more wafers out of existing fabs – will continue to be a critical challenge. To achieve this, powerful techniques to determine fab load mixes that are able to maximise wafers out – or better revenue, or even much better margin – with existing capacity are essential. At the same time, because of the complex operating curve of a wafer fab it is important to precent cycle times from going through the roof to make sure that delivery performance to customers does not suffer. In an environment with fast-changing customer demand and product mixes, as well as frequent commissioning of new equipment this is not an easy task at all.How such load mix optimisation can be achieved through a combination of static and dynamic (simulation-enabled) capacity models and powerful yet intelligent optimisation techniques will be showcased in this presentation. Enhancement of the wafer out potential by a double-digit percentage without exceeding operationally feasible equipment utilisation limits and without compromising cycle time has been demonstrated with multiple semiconductor manufacturing companies.

Biography
Peter Lendermann is a Co-Founder and the Chief Business Development Officer of D-SIMLAB Technologies, a Singapore-headquartered company providing simulation-based decision support solutions to Semiconductor Manufacturing companies. Prior to this he worked at the Singapore Institute of Manufacturing Technology where he led related R&D activities until spinning them off into D-SIMLAB. Peter has been engaged in the field of production logistics, supply chain management and related decision support technologies and solutions since the early 1990’s. He holds a PhD in Physics from Humboldt University in Berlin (Germany) and an MBA in International Economics and Management from SDA Bocconi in Milan (Italy).

Topic Coming Soon

Jones, Chris
Environmental Solutions Business Development Manager
Edwards

Abstract
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Biography
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Topic Coming Soon

Lauwers, Koen
President Semiconductor Division
Edwards

Abstract
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Biography
Koen Lauwers, joined Atlas Copco in 1997, joining as a Calculation Engineer and has since then built a successful career in the Group, including international assignments in the United States and Germany.Koen joined Edwards in 2014 following the acquisition by Atlas Copco, taking the role VP of Marketing and focusing on the industry segment and implementation of synergies. In 2017 he was appointed President of the Industrial Vacuum division, before being announced as the new President of the Semiconductor division on March 30, 2023.Koen holds a Master’s Degree in Electro-Mechanical Engineering from the University of Leuven in Belgium and an MBA from the Antwerp Management School in Belgium.

Topic Coming Soon

Pelissier, Christine
General Manager, Customer Center EMEA
Edwards

Abstract
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Biography
Christine has a proven track record of hiring, developing and managing high performance teams which consistently create superior value. She has over 30 years’ experience successfully growing markets and customers in a high-tech environment and has broad international experience building networks in North America, Europe, and Asia. Prior to joining Edwards in 2018, Christine has held senior strategic marketing positions, business development, operations and applications roles with Applied Materials, KLA-Tencor and Soitec.

It is all about Cost of Test? New Duties for Packaging and Test

Montino, Ralf
VP PLI
Elmos Semiconductor AG

Abstract
In the past, the processes “Wafer Sort”, “Assembly” and “Final Test” were considered as more or less independent processes with limited duties: Assembly should cover the silicon and the two test processes took care about the functionality of the product. Efficiency increase results from reducing test effort and increasing the parallelism of the test.Today, more and more of the products are customized during the test. This includes flashing customer specific software as well as adjustments at sometimes several temperatures. A more integrated view on these three different steps is necessary. Moreover, there are new demands to the machines. In addition to that, increasing of parallelism is very limited by the handling systems available on the market.

Biography
Study of physics in Dortmund and Aachen (high-energy physics).PHd in Engineering from the University of Siegen ( Knowledge Based Systems and Knowledge Management )With Elmos since 1990. - Started working for Elmos as a developer of test programs for the automatic electrical test of products.From the middle of the 90's development of the IT at Elmos. (There was actually nothing like that before - you can hardly imagine it today ...)Besides the office IT from the beginning, the integration of the manufacturing processes into the IT structures was a focus.After many years of responsibility for IT: Establishing a new organizational structure taking care about test program development, product engineering and assemblyThe core topics are:Broadening the supply chain, growth at the OSATSEngineering EfficiencyAnd, for shure, COT

Optimization of Advanced Packaging Process: Concept of Maskless Dual–Layer Lithographic Patterning

Varga, Ksenija
Business Development Manager
EV Group

Abstract
The integration of advanced packaging features in heterogeneous integration, 3D stacking, and miniaturization of electronic devices is enabled by FO WLP. It offers several benefits, including improved electrical performance, reduced form factor, and enhanced thermal dissipation vs. conventional packaging technologies. The cost–efficient solution to the industry established dual–damascene process in the interconnect formation was investigated in the present paper in relation to the FO WLP application. For this purpose, the concept of maskless exposure patterning of the novel dielectric materials by using two exposure dose levels was set in the DoE.The lithographic patterning was performed by dual–dose exposure of VIA and RDL traces using a single coating and development step without intermediate alignment. The objective was to achieve low resolution, low dielectric layer thickness having half–thickness of the first layer in the dual exposed patterns. A newly developed, low–temperature cure positive tone polybenzoxazoles (PBO) dielectric is cured at about 200 °C and thus is compatible with epoxy materials used in FO WLP packages.The low–temperature cure dielectric was also developed for markets like MRAM, RF, MEMS, and backside RDL applications where the base substrate, other materials, or the device packages themselves are temperature sensitive and require a low–cure dielectric material.At first, an understanding of dose dependency on the dielectric penetration depth in dual–layer exposure needed to be proven. Maskless exposure technology offers a simple exposure dose/wavelength/focus matrix. The parameters can be easily adjusted via recipe enabling efficient process evaluation. The contrast curve proved the linear behavior of exposure dose vs. removed thickness layer after the development. By patterning with the most optimal dual–exposure parameters, the resolution 3.8 µm (via within via opening), min. dual–layer thickness of 8 µm (first layer thickness 4 µm) after cure was proven by SEM images and stylus profile measurement. The spectral reflectance images reveal uniform film thickness (FT) distribution after spin coating, while the FT non–uniformity increased after the cure and the development processes.In conclusion, the newly established concept can support continuous efforts of the BEOL semiconductor industry in the total cost–of–ownership optimization.

Biography
Ksenija Varga is Business Development Manager at EV Group with Head Quarter in Austria, where she is focusing on new application development for maskless exposure technology, primarily in advanced packaging and heterogenous integration. Besides business development, Ksenija is involved in strategic projects working on new lithography equipment for next-generation devices. Prior to EV Group, Ksenija was working at FujiFilm Electronic Materials. She holds a doctorate degree in Chemistry from the University of Innsbruck in Austria and has experience in R&D project management and account management.

Opening Remarks

Rettenmeier, Roland
Senior Product Marketing Manager
Evatec

Abstract
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Biography
Roland Rettenmeier qualified as a Mechanical Engineer in 1997 and completed his MBA studies at Vienna, Austria in 2005. Roland extended his education through other international courses and programs since that time (e.g. Six Sigma Program with AT&S and Nokia; Innovation Technology Leader at Stanford University).Roland has worked in the field of Electronics and Semiconductor manufacturing since 2001, managing multiple international projects. After joining Evatec in 2016 as Senior Product Marketing Manager (PMM) within the Business Unit for Advanced Packaging, he focused on business development for Panel Level Packaging where Evatec has now become the recognised market leader for thin film technology solutions. Since 2020 he has also supported development of Evatec’s wafer level packaging solutions business.In addition to his market and customer responsibilities, Roland represents Evatec in the Panel Level Packaging consortium of Fraunhofer IZM Berlin, in the Packaging Research Center at Georgia Tech, USA and in the Panel Level Packaging Consortium at the NCAP in Wuxi, China.

Topic Coming Soon

Kutter, Christoph
Executive Director
Fraunhofer EMFT

Abstract
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Biography
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A European 3D Heterogeneous Integration Pilot Line – a Leap ahead to Achieve Technology Leadership

Töpper, Michael
Senior Expert Heterointegration Research Fab Microelectronics Germany (FMD)
Fraunhofer FMD

Abstract
The digital transformation of society and economy creates an increasing demand to transfer, process and store vast amounts of data generated in the context of technologies such as artificial intelligence (AI) and the Internet of Things (IoT). Therefore, future electronic systems like autonomous systems using high-performance computing (HPC) and edge computing systems, sensor-integrated systems and bio-integrated devices will require more and more functions that cannot be managed by a single chip, even if advanced system on chip (SoC) concepts are used. Therefore, advanced 3D heterogeneous integrated systems are the next step of evolution of the IC scaling. To support this a roadmap for required technology developments in heterogeneous integration has been defined by a joint working group of FMD and industry partners with a horizon of 2030 and beyond.It includes lithographical scaling that supports sub µm hybrid bonds pitches. The thermal management of extreme heat dissipation and topological limitations by STCO measures, new materials and new cooling methods. Comprehensive testing of dies to achieve an economically reasonable yield in a complex heterogeneous integration process containing a higher number of dies. To improve the processes and to understand failure mechanisms an appropriate failure analysis has to be codeveloped together to address fails in 3D stacks. Without the possibility to manufacture parts throughout a complete assembly process the full assessment of the impact of these topics is not possible. By looping in wafer or dies of leading-edge CMOS or special technologies like GaN from industry partners or collaborating research and technology organizations advanced processor devices can be realized through an innovative pilot line. Such a pilot line also allows to explore an automotive grade technology along with other industrial applications requiring high robustness. Together with the planned investments into Silicon frontend manufacturing and assembly in Europe as announced e.g. by Intel the heterogeneous integration pilot line at the chip, package and organic substrate level plays a key role to excel the position of Europe as hub for assembly and test.The paper will be presented together with Intel and Siemens EDA.

Biography
Michael Töpper studied chemistry at the University of Karlsruhe and received his doctorate in materials science from the Technical University of Berlin. He has been working in the field of assembly and connection technology for microelectronics since 1994, initially at the TU Berlin, then as a group leader at Fraunhofer IZM including a year at the University of Utah as an assistant professor and until 2021 as a business developer for the entire IZM. Today he represents the Research Fab Microelectronics Germany (FMD) as an senior expert for technologies and cooperation with a focus on heterogenous integration.

Challenges and Technologies towards Secure Embedded Systems and Trusted Electronics

Hiller, Matthias
Head of Department Hardware Security
Fraunhofer Institute for Applied and Integrated Security AISEC

Abstract
Coming Soon

Biography
As Head of Department Hardware Security at Fraunhofer AISEC, Matthias Hiller is driving applied research on secure embedded systems and trusted electronics in customer projects and publicly funded research. Matthias Hiller holds a PhD in electrical engineering and information technology from the Technical University of Munich and a Diploma degree from Ulm University. In particular his research interests are in the area of secure implementations, tamper protection and physical unclonable functions.

Opening Remarks

Braun, Tanja
Program Director
Fraunhofer IZM

Abstract
Coming Soon

Biography
Tanja Braun studied mechanical engineering at Technical University of Berlin with a focus on polymers and micro systems and joined Fraunhofer IZM in 1999. In 2013 she received her Dr. degree from the Technical University of Berlin for the work focusing on humidity diffusion through particle-filled epoxy resins. Tanja Braun is head of the group Assembly & Encapsulation Technologies. Recent research is focused on fan-out wafer and panel level packaging technologies.

Opening Remarks

Yan, Ruby
Director Human-Machine-Interface HMI
Globalfoundries

Abstract
Coming Soon

Biography
Ruby is a Business Line director in AIM Strategic Business Unit. She is responsible for HMI (Human-Machine-Interface) product line in wearable, AR/VR, smart home and machine vision applications.

Data Driven Optimization in Semiconductor Fabrication: How Business Efficiency Helps Environment as Well

Heller, Thomas
Director for Yield Engineering Responsible for Development & Production
GLOBALFOUNDRIES

Abstract
The complexity of modern Semiconductor Fabrication requires a combination of the real- and the digital world. Data driven optimization and digital manufacturing enable a new area to harvest savings related to energy consumption, material spending and efficiency regarding human capital. These points equally improve cost efficiency of the supply and production chain, which also helps to spare the environment. One example is an application that helps to detect consumption differences between semiconductor fabrication tools, another solution monitors the transport system. A very different approach are our Physics-informed Digital Twins of semiconductor devices, which reduce computation times from hours per simulation to seconds for thousands samples. The presented examples will show that there are opportunities in every area within semiconductor fabrication in which digital manufacturing can be used to harvest/enable savings that also protect our environment.

Biography
Dr. Thomas Heller started his professional career as a technician in a brown coal power plant, pretty much the opposite of a semiconductor clean room. After studying physics at BTU Cottbus, he earned his doctorate in Cottbus (Germany) and St. Andrews (Scotland).Thomas joined AMD's Fab30/GF Fab1 Yield Engineering department in 2000. After bringing seven key technology nodes and several differentiated offerings to best-in-class yield levels, he has been responsible for all technologies in development and production since 2017. In 2020, Thomas also took over responsibility for Advanced Analytics & Machine Learning at GF Fab1 Dresden.Thomas believes that yield engineering is one of the most interesting areas in the semiconductor industry because it provides comprehensive insight into customer, manufacturing and technology issues. By using advanced data analytics techniques, one can reach the next level of improving yield, quality and production efficiency.

Bare Copper Lead Frame Compatible Die Attach Developments for Automotive Applications

Winster, Tony
Technical Advisor
Henkel Ltd

Abstract
Many semiconductor devices using SOIC, QFP and QFN format are packaged by mounting and wire bonding a die onto metal lead frames using conductive die attach adhesive. Such lead frames have traditionally been fabricated from copper, with a surface of Ag or Ni-Pd-Au (PPF) plating to provide good and stable adhesion and electrical contacts. However, the elimination of the plated finishes would offer significant reduced costs; and also improved reliability, due to higher adhesion of molding compounds to the metal leadframe. To enable this trend, the die attach industry has been engaged in developing new adhesives which offer excellent compatibility with bare copper. In addition, package performance has been improved by formulating for enhanced electrical & thermal conductivity to allow higher power ratings. This has been achieved partly by using increased Ag contents, but mainly by introducing Ag sintering mechanisms. Lastly, package reliability has been improved by optimizing formulations to withstand stresses imposed by higher AEC Q100 automotive requirements, in particular passing 2000 or even more thermal cycles from -55 to 150 Celsius (Grade 0). This has been done by optimizing the polymer chemistry, but also by introducing additives to act as “crack stoppers” to absorb stresses and prevent cracks & delamination from propagating.The paper will describe how a test vehicle was selected to quantify improvements in packages, using automotive industry standard tests. And then go on to describe how changes in chemistry have been introduced to enable significant improvements to package specifications, while controlling and reducing overall package costs, and providing compatibility with materials currently adopted by multiple semiconductor makers, and maintaining capability of being processed using existing equipment and processes.This development work has produced many successes, and continues with a program of further improvements. A “roadmap” showing targeted future developments will be outlined.

Biography
Tony Winster studied Metallurgy & Materials Science before researching materials for high reliability electronics. After some years involved with design and manufacture of Defence/Aerospace packages, Tony joined Ablestik, supporting and growing their respected range of die attach materials. Since Henkel took over Ablestik in 2008, Tony is technically deeply involved with the wide portfolio of Henkel products for semiconductor packages, by supporting new semiconductor packaging developments & “design-in” programs around Europe.

Topic Coming Soon

Jörger, Michael
Head of Business Line Power Electronic Materials
Heraeus Electronics

Abstract
Coming Soon

Biography
Michael Jörger has 20 years experience in managing product development and launching of innovative materials for electronics and renewable energies with a focus of Power Modules and Semiconductor Packaging materials.Michael holds a Ph.D in Material Science from ETH Zurich, Switzerland, and a diploma in chemistry from the University of Karlsruhe in Germany.Currently he is leading the Business Line Power Electronic Materials at Heraeus Electronics.

Topic Coming Soon

Marent, Katrien
EVP & Chief Marketing & Communications Officer
imec

Abstract
Coming Soon

Biography
Katrien has an engineering degree in microelectronics. She joined imec in 1992 as analog design engineer and specialized in design of low-noise readout electronics for high-energy physics. In 1999, she became press responsible and scientific editor at imec's business development division and was responsible for authoring and editing the research organization's numerous company technical documents and publications. In 2001, she was appointed corporate communications director at imec. Her responsibilities expanded in August 2007, when she got the position of external communications director including corporate, marketing and outreach communications. In October 2016, she became VP corporate, marketing and outreach communication. Since April 2020 she is Executive Vice President & Chief Marketing and Communications Officer and member of the executive board of imec.

Environmental Footprint Chip Manufacturing

Rolin, Cedric
Program Manager Sustainable Electronics
imec

Abstract
Coming Soon

Biography
Coming Soon

Topic Coming Soon

Ragnarsson, Lars-Ake
Program Director SSTS
imec

Abstract
Coming Soon

Biography
Lars Åke Ragnarsson received the M.S. degree and the PhD degree in electrical engineering from Chalmers University of Technology, Göteborg, Sweden, in 1993 and 1999, respectively. Between 2000 and 2002, he did postdoctoral studies with the IBM T.J. Watson Research Center, Yorktown Heights, NY, focusing mainly on the electrical characterization of high-k dielectrics. Since 2002, he has been with imec in Leuven, Belgium, focusing on the development of advanced technologies using high- κ dielectrics and metal gates. Today Lars-Åke is a scientific director in compute and memory technologies with a strong focus on the Sustainability of current and future technologies.

Topic Coming Soon - joint presentation with ASML

Gallagher, Emily
Principal Member of Technical Staff
imec

Abstract
Coming Soon

Biography
Emily Gallagher is a Principal Member of Technical Staff at imec, focusing on sustainability in semiconductor manufacturing, EUV pellicle membrane development, and advanced patterning. Emily earned her PhD in physics from Dartmouth College where she studied free electron lasers. After graduation, she joined IBM and became immersed in semiconductor technology. She held many wafer fabrication roles at IBM from functional characterization to process integration; the last was leading the EUV mask development effort. She joined imec in 2014 to continue EUV development work. Emily has authored over 100 technical papers, holds over 20 patents, is an SPIE Fellow and co-leads the SEMI SCC Scope1 Working Group.

A World Under Pressure Needs Skyrocketing Collaboration

Van den hove, Luc
President and CEO
imec

Abstract
We are living through a time of complexity. Geopolitical tensions, economic instability and the climate crisis form a knot of mutually reinforcing challenges. And as the problems become increasingly complex, so do the solutions. We need system solutions that build on cross-pollinations between sciences, sectors and industries, and with semiconductors as a flywheel enabling disruptive innovation. To handle the exponentially growing complexity in a sustainable way, we will need a multitude of semiconductor and system scaling approaches. And collaboration between regions across the globe, leveraging the expertise of the entire value chain, will be key. The chips acts have the potential to strengthen different regions in the world and complement each other. They offer an opportunity to create critical mass to drive progress in semiconductor technologies, which is essential to develop the disruptive system solutions that our world needs today. If they’re done in a smart way, the various chips acts offer an opportunity to accelerate innovation. They are a catalyst to open up, connect strengths, and pursue cross-border collaboration. Only of we deliver as one, we will succeed.

Biography
Luc Van den hove is President and CEO of imec since July 1, 2009. Before he was executive vice president and chief operating officer. He joined imec in 1984, starting his research career in the field of silicide and interconnect technologies.In 1988, he became manager of imec’s micro-patterning group (lithography, dry etching); in 1996, department director of unit process step R&D; and in 1998, vice president of the silicon process and device technology division. In January 2007, he was appointed as imec's EVP & COO. Luc Van den hove received his PhD in electrical engineering from the KU Leuven, Belgium.He has authored or co-authored more than 200 publications and conference contributions. In 2023, he was honored with the Robert N. Noyce medal for his leadership in creating a worldwide research ecosystem in nanoelectronics technology with applications ranging from high-performance computing to health.

Topic Coming Soon

Behnke, John
General Manager FPS Product Line
INFICON

Abstract
Coming Soon

Biography
Mr. Behnke has over 35 years of semiconductor industry experience including: logic and memory manufacturing, technology/product development and fab operational excellence. As the GM of Final Phase Systems an INFICON Product Line, John leads a team that develop and deploy SMART software solutions that enable fabs to improve their manufacturing efficiency. FPS’s suite of software solutions are built upon a common Datawarehouse which enables advanced Fab Scheduling and optimized WIP movement as well as other related capabilities. He is also a Co-Chair of the Semi North America Smart Manufacturing Special Interest Group. Prior to FPS John served as the CEO and President of Novati Technologies, the SVP and GM of the Semiconductor Group of Intermolecular, the CVP for Front End Manufacturing, Process R&D and Technology Transfers at Spansion and the Director of AMD’s Fab 25’s Engineering and Operations groups where he was a founding member of AMD’s Automated Precision Manufacturing (APM) initiative which led the Semiconductor industry’s development and use of APC and other advanced factory systems. He also led the successful conversion of Fab 25 from Logic to Flash memory which was enabled through the virtual automation of the fab.Mr. Behnke earned a B.S. degree in Mechanical Engineering with an Industrial Engineering Minor from Marquette University. Mr. Behnke holds five U.S. patents.

Opening Remarks

Recklies, Joerg
Senior Vice President
Infineon Technologies AG

Abstract
Coming Soon

Biography
Joerg Recklies has been in the semiconductor industry for 27 years with responsibilities ranging from Chip design to IDM. He is currently in charge of the General Manager at Infineon Technologies Regensburg. Prior to that, Joerg Recklies was in charge of the FAB Manager at Infineon Dresden and held several positions in automation and productions at Infineon. These positions contributed to his excellent experience in terms of equipment and automation. Earlier in his carrier he has made contributions in digital and analog Chip design.Joerg Recklies holds a graduate engineer for Semiconductor. Highlight during the time with Infineon …. - Establish high automation at IFD 1995- 1997 as project leader automation software integration- Project Leader world wide cost reduction program within Infineon Frontend Productions from 1999 –2003 (within Europe, US, Asia)- Section Manager Plasma Etch / Wafer Inspection 2003- 2007- Director Maintenance Engineering 2007 – 2014- Project Leader 300 mm Fab Startup / Transfer Power Technologies 2011-2013- FAB Manager Senior Director 200 / 300 mm Dresden 2014 – 2018- General Manager Site Regensburg Senior Vice President since 2018

New Approaches to Achieve Superior Reliability in Power Electronic Packaging

Grassmann, Andreas
Vice President for Package Innovation
Infineon Technologies AG

Abstract
Coming Soon

Biography
Andreas Grassmann is currently working for Infineon Technologies AG as Vice President for package innovation with strong focus on automotive power modules. He is in semiconductor industry since more than 30 years. He was working in various management position in R&D and technology in Europe, Asia and USA. He holds a PhD in Physics from the University of Erlangen.

Building the new Smart Power Fab in Dresden: A Strong Signal for the Future

Hasse, Holger
Project Manager for the Plant Expansion, nfineon Site Dresden
Infineon Technologies Dresden GmbH

Abstract
The Infineon Dresden production site already produces over 400 different products based on 200- and 300-millimeter wafers. The site was founded in 1994 – at that time still as part of Siemens.Today, Infineon operates one of the most modern and largest sites for manufacturing, technology, and product development in Dresden – with around 3,300 employees. This makes Infineon Dresden one of the largest industrial employers in the region.With the new Smart Power Fab, the site in Dresden will grow significantly in the coming years and become Infineon’s largest Frontend location. This investment is an essential contribution to achieving the European Commission’s declared objective of reaching a 20 percent share of global semiconductor production in the EU by 2030. Semiconductor solutions for industrial and automotive applications from the Dresden Fab will help secure value chains in key European industries even better in the future.The Smart Power Fab is the largest single investment in Infineon’s corporate history and will make a decisive contribution to driving climate protection and digitalization forward. With the level of digitalization and automation established here, Infineon in Dresden is also setting new standards in manufacturing excellence. Furthermore about 1,000 direct new jobs will be created.In February 2023, the Infineon Management Board and supervisory bodies gave the green light for the Dresden site. The German Federal Ministry for Economic Affairs and Climate Action (BMWK) has approved an early project launch, meaning that construction can already begin before completion of the inspection of legal subsidy aspects by the European Commission. Subject to the European Commission's state aid decision and the national grant procedure, the project is to be funded in accordance with the objectives of the European Chips Act.For a long time, no semiconductor plant of this size was built in Europe. Due to the increasing demand in the semiconductor market, Infineon has set a very ambitious timeline for this complex project. Diverse challenges arise, for example, the extensive approval process with the local authorities must be mastered. Price increases in construction and delays in delivery of long lead items must also be absorbed.

Biography
As Senior Project Director at Infineon Dresden, Holger Hasse is responsible for the construction and facilitation of the new Smart Power Fab with more than 20,000-square-meter clean room, where the 300-millimeter wafers for semiconductor production will be processed in the future.He learned the semiconductor business from scratch: At the beginning of the 1990s, he completed an apprenticeship as an electronics technician and started in the industry in 1995. At the same time, he studied business administration and mechanical engineering.After his studies, Holger Hasse first took care of maintenance as a team leader and later as a department manager. This was followed by management positions in various production areas at different semiconductor companies.Holger Hasse was born in Görlitz, Germany, in 1970.

Topic Coming Soon

Schell, Christoph
Executive Vice President and Chief Commercial Officer
Intel

Abstract
Coming Soon

Biography
Christoph Schell is the Executive Vice President and Chief Commercial Officer of the Sales, Marketing and Communications teams at Intel Corporation. In his role, Schell oversees Intel’s global sales, business management, marketing, communications, corporate planning, customer support and customer success teams, leading the company’s efforts to foster innovative go-to-market approaches that broaden Intel’s business opportunities and deepen customer and partner relationships and outcomes worldwide.Schell joined Intel in March 2022 from HP Inc., where he was Chief Commercial Officer. During his 25 years with the company, Schell held various senior management roles across the globe, including President of 3D Printing & Digital Manufacturing. Prior to rejoining HP in 2014, Schell served as Executive vice president of Growth Markets for Philips, where he led the lighting business across Asia Pacific, Japan, Africa, Russia, India, Central Asia and the Middle East. He started his career in his family’s distribution and industrial solutions company before working in brand management at Procter & Gamble.Schell holds bachelor’s degrees from ESB Reutlingen in Germany and École Supérieure de Commerce de Reims in France. He is fluent in German, English and French.

Chiplets - Accelerating System Innovation in the Era Heterogeneous Integration

De Ambroggi, Luca
Segment Director Solutions Marketing
Intel Foundry Services

Abstract
The semiconductor industry is undergoing a structural transformation driven by technology innovation, as well as supply-chain disruption, like the move from SoCs to “Chiplets” and the vertical integration of OEMs and CSPs in various industry domains.These trends are also coupled with increased R&D costs for advanced node technologies, required to cope with rising performance requirements in several applications.All the above is expected to propel a significant growth in the semiconductor market for leading-edge nodes in data processing industry segments, like Mobile, Compute, Telco and Automotive.Learn about how IFS is uniquely positioned to address this transformation by creating an “open system foundry” that enables our customers to differentiate and lead in their markets by creating full-stack solutions from their choice of the best of Intel and the foundry industry ecosystem, delivered from a secure and sustainable source of supply.

Biography
Luca De Ambroggi, Director, Marketing and Platform Solutions, at Intel Corporation.Luca is a veteran in the semiconductor and automotive industry with more than two decades of experience in various domains spanning along the entire supply chain.He joined the company with 25+ years of semiconductor industry experience, including product and design management and technical marketing.He began his career as a design engineer with STMicroelectronics and has held various technical and marketing positions within both STMicroelectronics and Infineon.Before joining Intel, Luca contributed to develop the automotive electronics and semiconductor research at IHS Markit, providing advisory services on advanced Infotainment and ADAS/AV systems, as well as AI technologies.Luca has more than 20 patents issued while working in the semiconductor industry.He graduated full marks from the University of Catania in Electro-Technic Engineering. He is fluent in Italian, English, and German.

Opening Remarks

Antonicelli, Roberto
Automotive BU for US and Europe
JCET Group - STATS ChipPAC

Abstract
Coming Soon

Biography
Roberto Antonicelli is a professional with over 20 years of experience in the semiconductor industry. At JCET Group, formerly STATS ChipPAC, he is in charge of the Automotive BU for US and Europe. He is based in Morges (Switzerland), on the shores of the Leman Lake. Prior to joining STATS ChipPAC in 2010, he has held diverse R&D positions at Infineon Technologies, Alcatel Microelectronics and ST Microelectronics. Roberto obtained his MSEE and PhD from Polytechnic University of Bari, Italy, respectively in 1997 and 2002.

Bridging Front End, Packaging and Substrates to Advance the Semiconductor Roadmap

Donzella, Oreste
Executive VP
KLA

Abstract
For over 50 years, Moore’s Law has defined the pace of the semiconductor industry with its ability to scale transistor density every 2 years. While the frontend roadmap is still progressing thanks to EUV lithography and other process technology innovations, it’s no longer sufficient to keep pace with the diversified demand of the new digital society.In recent years, we have seen an acceleration of technical innovations in IC packaging and IC substrates to complement front end wafer fabrication technologies and meet performance, power, and cost requirements.The implementation of heterogeneous integration started long ago with the first multi-chip modules and 2D packages and is now accelerating with several new 2.5 and 3D architectures serving various end-applications, including high-performance computing, mobile, and networking, among others.With interconnect geometry scaling, we see the need and the opportunity to bridge process equipment and process control methodologies across the three worlds of front-end, packaging and substrates. These once completely separated domains are becoming integrated just like the packages and systems they create.The adoption of front end-like technologies and methodologies into packaging and IC substrates is not trivial and it requires innovation and customization to meet cost and performance requirements.KLA is partnering with key industry players to bridge these three worlds and this presentation will show the challenges we are facing and problems we are solving to advance the semiconductor technology roadmap.

Biography
Oreste Donzella serves as Executive Vice President of Electronics, Packaging and Components.In his 20 years at KLA, he has held leadership roles in the field of customer engagement, process control solutions, application development, strategic marketing and product development. Before joining KLA, Mr. Donzella worked at Texas Instruments and Micron, where he held various engineering and management positions in process integration and yield enhancement.Mr. Donzella currently serves as a member of the SEMI North American Advisory Board.Mr. Donzella earned his bachelor’s degree and master’s degree in electrical engineering from the Sapienza University of Rome.

High-speed Die, Component 3D Reconstruction Solution ​by Multimodal Phase Shift Optics Approach

Lindloff, Axel
Senior Process Specialist Pre-Sales
Koh Young Europe GmbH

Abstract
The first automated 3D inline measurement system for solder paste inspection was introduced in 2003 to the global Surface Mount Technology (SMT) industry by Koh Young Technologies. This system utilized Moiré fringe pattern technology to accurately measure pixel heights. Subsequently, 3D solder paste measurement became an established industrial standard in SMT within a few years. Building on the same measurement concept, the first automated 3D component measurement system, known as Automated Optical Inspection (AOI), was introduced in 2010. Today, 3D measurement has become the prevailing AOI standard.The packaging industry has also shown keen interest in this technology from its inception. The measurement principle proved to be robust and flexible, offering high accuracy at faster speeds compared to conventional point-measurement methods like confocal microscopy. Consequently, 3D solder paste inspection was quickly adopted for printing applications in the packaging sector.However, 3D AOI systems encountered challenges in the harsh conditions of the semiconductor packaging world. Particularly, systems based on Moiré fringe pattern technology faced difficulties with the mirroring surface of silicon chips. Moreover, the topography posed a challenge with small features, such as 0201 metric components located next to higher silicon chips in densely packed layouts.Presently, advancements in optical 3D measurement and the integration of Artificial Intelligence (AI) have paved the way for advanced packaging applications. Multi-modal measurement probes, equipped with enhanced depth of focus, are capable of covering all height differences in state-of-the-art packaging. Various surface conditions of components, chips, and surfaces are measured by combining an oblique optical system, which ensures stable high-speed measurement of objects with diffuse reflection, with a coaxial optical system, suitable for measuring objects with specular reflection. The integration of AI deep learning technology enables effective processing of various noises encountered during the measurements.In conclusion, this presentation will highlight how high-speed 3D reconstruction addresses the growing demand for electronic components, which necessitates fast and efficient processing. These advancements in measurement technology and AI integration have paved the way for enhanced packaging applications in the semiconductor industry.

Biography
Axel Lindloff pursued his studies in general electrical engineering at Bielefeld University of Applied Sciences and has been an active participant in the SMT industry since 1999. He gained initial experience in sales for a period of 3 years before transitioning to the application department of a printing machine manufacturer in 2003. During his time there until 2012, Axel focused on optimizing existing processes, conducting audits, and developing new printing applications.Since September 2012, Mr. Lindloff has been employed as a Senior Process Specialist at Koh Young Europe GmbH. His primary responsibilities revolve around process optimization using 3D data, facilitating machine-to-machine communication, conducting process audits, and contributing to the introduction of new products.

Photonic IC Design: Innovation and Scalability

Dumon, Pieter
CTO
Luceda Photonics

Abstract
Photonic integrated circuits are steadily growing in scale from just 5-10 integrated components to hundreds, as well as in number of process steps and materials. Because of the breadth of the application space, numerous material and process platforms serve different submarkets. To increase IC complexit, re-use and addressable markets, heterogenous integration of dies and chiplets of different optical materials is becoming a market reality.There is an equal diversity in the maturity level of the photonic IC technologies. Device design, compact modeling, circuit analysis, placement and routing and verification all require tools and algorithms specific to the physics as well as application requirements of phtoonic ICs. We will discuss recent technology innovations in photonic design automation technology of photonic ICs to address the above scaling challenges.

Biography
Pieter Dumon is CTO of Luceda Photonics, which he co-founded in 2014 as a spin-off from Ghent University, imec and VUB. He obtained his EE MSc degree in 2002 and a PhD in photonics in 2007 with work on silicon photonic wavelength filters. Pieter coordinated ePIXfab, the first multi project wafer service for photonics from 2007 until 2014, where he extended the collaboration to include more technology providers as well as design and packaging providers. At Luceda Photonics, he is responsible for R&D and leads the PDK team that manages over 30 photonic design kits of more than 20 photonic foundries.

Digitalization of Chemical Process Design for Semiconductor Materials Manufacturing

vom Stein, Thorsten
Director, Head of Process Design Semiconductor Materials
Merck Electronics KGaA

Abstract
The drive to scale nodes towards physical limits, known as "More than Moore", and the adoption of 3D architecture in chip integration strategies for advanced logic and memory applications has led to an unprecedented demand for high-quality and dependable materials solutions. This presentation focuses on the digitalization of chemical process design for semiconductor materials manufacturing, employing molecular precision. It delves into the data-driven approaches used to streamline manufacturing processes from laboratory to HVM scale by leveraging connected asset infrastructures for cost optimization, quality, reliability, and sustainable excellence. Moreover, this talk emphasizes the importance of diversity and inclusion in fostering the "leap of faith" culture necessary for this digital revolution.

Biography
Professional ExperienceSince January 2022 Director, Head of Process Design Semiconductor MaterialsJune 2020 - January 2022 Director, Head of Process Development Semiconductor Materials EuropeJan. 2018 - May 2020 Associate Director Process Technology Japan, Chemical Lead of ProcessDevelopment Performance Materials Asia (Expatriate Assignment)Jul. 2015 – Dec. 2017Laboratory Head at Merck KGaA Process DevelopmentMarch 2014 - July 2015 Alexander-von-Humboldt Foundation research fellow (Feodor Lynen program) in the group of Professor D. W. Stephan at the University of TorontoEducationOctober 2010 – March 2014 PhD thesis (summa cum laude) “Catalytic Multistep Hydrogenation andHydrogenolysis Reactions for the Utilization of Renewable Carbon Resources”’ in the group of Professor W. Leitner as part of the cluster of excellence „Tailor Made Fuels from Biomass“ (TMFB) at the ITMC, RWTH Aachen UniversityAugust 2010 Graduation diploma (Dipl.-Chem.) in chemistry with distinction (summa cum laude)Diploma thesis “Organic acid catalyzed selective fractionation of lignocellulose” in the group of Professor W. Leitner as part of the cluster of excellence „Tailor MadeFuels from Biomass“ at the Institut für Technische und Makromolekulare Chemie(ITMC), RWTH Aachen University2005-2010 Undergraduate studies in chemistry at RWTH Aachen University 2005 High school diploma1996-2005 High school education at the Städtisches Gymnasium Wermelskirchen

Intersecting Paths: Uniting Moore's Law and Biology Through Bioconvergence

Siragusa, Nina
Chief Science & Technology Officer
Merck KGaA

Abstract
Intersecting Paths: Uniting Moore's Law and Biology Through Bioconvergence For more than 4 billion years, nature has been perfecting its biological systems, developing solutions that scientists and engineers are just beginning to grasp and utilize. Leveraging synthetic biology, a myriad of applications - ranging from antibiotic development to laundry detergent enzymes, even to DNA data storage - have come to fruition. Biological systems inherently possess the ability to self-assemble, self-repair, and self-replicate. This gives them an edge that critically affects capacity, precision, and cost-efficiency, metrics highly relevant in the material science as well as manufacturing process. Recent technological developments allow us to read (sequence) and write (synthesize) DNA with greater ease and accuracy. This exponential advancement in our ability to 'program' DNA propels a technological revolution mirroring the computer surge of the 20th century and impacting manufacturing on a scale reminiscent of the 19th-century industrial revolution. In the domain of synthetic biology, two fundamental design principles particularly stand out - the concept of reusable parts and the engineering design cycle. The engineering design cycle, also applied in the semiconductor industry, simplifies the engineering process into three stages: design, build, and test. This structure's ability to scale exponentially implies that we are now able to function within the framework of Moore's Law. This principle, established in computer manufacturing, indicates that capacity successfully doubles approximately every 2 years over extensive periods. Moore's Law's relentless pace has become the benchmark for significant, long-term industrial progress. This pace is now attainable in gene synthesis. As we transition from conventional manufacturing to 'smart' manufacturing, we are harnessing the incredible compute power that Moore’s Law has provided for image and pattern recognition and massive data set analysis to drive manufacturing efficiency.

Biography
Dr. Nina Siragusa is the Chief of Staff to Dr. Laura Matz, the Chief Science and Technology Officer at Merck. As part of the Science and Technology Office Leadership Team, Nina is responsible for enabling and driving cross-sectoral collaboration, innovation strategy and digitalization at Merck across the 3 business sectors. She is leading the strategic efforts on Bioconvergence. As part of her MBA studies on Digital Transformation Management at the Goethe Business School, Frankfurt Germany, Nina is leading a project within the Group Smart Manufacturing Program.Prior to becoming Chief of Staff, Nina has been driving corporate innovation as Biotechnology Lead of a synthetic biology innovation project, Senior Manager responsible for the creation of strategic alignment as well as building and management of high performing teams and finally as Associate Director responsible for targeted sourcing of innovative ideas, with the goal to generate new businesses.Nina has a PhD in Biology from the University of Tuebingen, Germany. She has worked as a researcher in Europe and the USA at Yale University prior to joining Merck KGaA, Darmstadt Germany in 2016.

How to Achieve Upcoming Bump Requirements by Optimized ECD Plating Processes

Pieper, Stefan
Global Application Manager for Semiconductor Processes
MKS/Atotech

Abstract
Next to Cu-to-Cu hybrid bonding technology for upcoming packaging requirements, the rapid advancements in advanced packaging technologies demand the development of cutting-edge microbump structures with smaller pitch sizes in the range of < 10 µm. Hence, optimized electrochemical deposition (ECD) plating processes will be required to fulfill the needs for this microbump structures. This presentation focuses on the deposition of Cu, Ni-alloys and SnAg, each of them crucial for device miniaturization and performance. We will first give insights into the optimization of the process parameters to allow shape control and the simultaneous deposition of Cu bumps of different sizes on one die (i.e., “hybrid bumps”). Additionally, due to ever decreasing form factors, next generation plating requires Ni-alloy-based barrier layers, which form minimal intermetallic compounds. We will present novel results of possible barrier materials with minimized intermetallic layer thickness. The final part of the presentation focuses on SnAg plating and the optimization of coplanarity and surface roughness, other crucial bump features for smallest, next generation packages.

Biography
Stefan Pieper has studied chemistry in Berlin, Germany where he also completed his PH.D. in analytical chemistry. In 2009 he joined Atotech as Application Scientist in the department of Semiconductor Advanced Packaging processes where he used the opportunity to gain deep insight in multiple electrochemical metallization processes and their characterization for semiconductor application. During his work as Application Scientist, he also spent over 3 years in the US where he optimized Cu dual damascene electrodeposition and Through Silicon Via plating. In 2020 he took over the position as Global Application Manager for semiconductor processes at MKS/Atotech. In his current position he is leading a team that provides wet-chemical solutions for semiconductor metallization with the focus on power semiconductor.

AI Engineering (B. Sc.) - Rethinking Applied AI Education

Rolf, Benjamin
Researcher
Otto-von-Guericke-Universität Magdeburg

Abstract
In the era of Industry 4.0, where advanced manufacturing processes are shaping industries like never before, the potential of AI cannot be ignored. To address this paradigm shift, the "AI Engineering" project, run at Institute of Logistics and Material Handling Systems at Otto-von-Guericke-University in Magdeburg, Germany, is a new way of teaching engineering. This fresh Bachelor's degree program, started in October 2023, mixes the study of Artificial Intelligence and engineering sciences together. The main goal is to teach students how to create advanced AI solutions that can be used in many different kinds of industries.Thie AI Engineering program, which is supported by the German Federal Ministry of Education and Research, is part of a collaboration between Otto-von-Guericke-University Magdeburg and Anhalt, Harz, Magdeburg-Stendal, and Merseburg universities of applied sciences. Each university adds its own special knowledge to one of five important areas: Manufacturing, Production and Logistics; Green Engineering; Biomechanics and Smart Health Technologies; Mobile Systems and Telematics; and Agricultural Economy and Technology. By offering in-depth training in these domains, we ensure our graduates possess a deep understanding of both AI principles and domain-specific expertise.At the core of AI Engineering is a hands-on, project-based learning approach that commences from the very first semester. We firmly believe that the best way to comprehend theory is by applying it to real-world challenges. Through close collaboration with regional and international companies, our students gain invaluable experience working on real use cases, utilizing actual datasets, and benefitting from industry mentorship.

Biography
Benjamin Rolf is a researcher specializing in supply chain management and logistics. He is currently pursuing a Ph.D. in Mechanical Engineering at Otto-von-Guericke-University Magdeburg, focusing on inventory management and reconfiguration in large-scale supply networks. He holds a Master's degree in Industrial Engineering Logistics and gained practical experiences when working for different manufacturing companies. His research interests lie at the intersection of supply chain management, simulation, network science, and machine learning. His contributions have been published in reputable journals and presented at international conferences. In 2024, he will continue his research as an expatriate at the RIKEN Center for Computational Science in Kobe, Japan.Education- 10/2019-06/2021 M. Sc. Industrial Engineering Logistics (with distinction) at Otto-von-Guericke-University Magdeburg, Germany- 10/2020-06/2021 Special auditing student at Niigata University, JapanProfessional Experience- 07/2021-Now: Researcher at Institute of Logistics and Material Handling Systems, Otto-von-Guericke-University Magdeburg- 01/2024-06/2024: Expatriate at RIKEN Center for Computational Science, Kobe, Japan- Internships/projects at BMW AG, LivingSolids GmbH, 4Flow AG, ...Academic Publications- International Journal of Production Research, Procedia Manufacturing, Hawaii International Conference on System Sciences, ...

High Efficiency Cleaning for Permanent Bonding-Based 3D Applications

Dussault, Donald
General Manager
ProSys, Inc.

Abstract
Bond defectivity due to particle generated voids in the bond interface is a limiter in direct bonding yield. This issue is growing exponentially with the reduction in interconnect pitch making the killer defect particle size smaller and smaller. An effective cleaning process should remove all contaminates (if removeable), but must not add particulate or damage the substrates to be cleaned. The cleaning method should also be applicable to singulated die on tape frame and address the die edge/kerf contamination without displacing the die. In this presentation we will present a unique Megasonic Cleaning device that meets these emerging cleaning challenges. We will also present pre-bond cleaning results achieved with this device in several direct bonding applications evaluated both through classical particle detection (SP-X) as well as actual void detection with acoustic microscope. We will further describe how this device can be applied to the evolving cleaning challenges in W2W and D2W Hybrid bonding process sequences.

Biography
General Manager, ProSys, Inc., the market leader in Megasonic systems for the Semiconductor Industry wet process segment. Since 2005 he has successfully expanded the application range and installed base of ProSys Megasonic systems in the European and Asian markets making ProSys the de facto standard for many high volume production OEMs.Don started in the Semiconductor industry in 1980 as an Equipment Engineer responsible for a new front-end startup, and later specialized in Microlithography systems for a leading Semiconductor OEM. Don was transferred to Europe to support the rapid expansion there in the Mid 1980s and has remained in Europe ever since. For the past 20+ years he has specialized in wet process applications and has held management positions with several OEM Equipment suppliers. During this time he has helped to develop and test new wet process applications. He has co-authored papers on, and presented much of this process development work to the wet process community.

The Advanced APC Application to Enable the Geometric Scaling by DTCO in sub-5nm SoC Manufacturing

Kim, Leo
Principal Engineer
Qualcomm Korea

Abstract
Moore’s law gets slower down by the limitation of physical scaling down in sub-10nm technology and it is essential to design the new products associated with DTCO (Design-Technology Co-Optimization). The recent approaches with non-active area scale-down demonstrated the significant contribution to reduce std-cell track but it can cause the narrow process window which was not fully caught by DFM (Design for Manufacturing) and NPI verification. To effectively bring up DTCO in HPC (High Performance Computing) devices, the inline F/F (feedforward) APC was adopted to assure the product quality on the top of the conventional APC F/B (feedback) for R2R control. However, the upgraded APC was not sufficient to meet the requirements of products qualities across wafers and dies in case of UHD cell structure. The newly developed APC system could achieve Snapdragon 888 mobile platform HVM in time by introducing wafer-level as well as within-wafer zonal APC. At the next step, the real-time APC by VM of tool sensors, the extended e-beam application and ML (Machine Learning) will greatly reduce TTD (Time to Detect).

Biography
Leo Kim is a Principal Eng. in Foundry Engineering team at Qualcomm Korea. He is currently responsible for foundry management/process technology development to deliver Qualcomm mobile platform solutions into worldwide market across leading-edge FinFET technologies. He joined Qualcomm Inc., Korea in 2009, bringing over 20 years of semiconductor BiCMOS/CMOS R&D device & process integration experiences from Samsung Electronics Co., Chartered Semiconductor of Singapore, IBM alliance members in USA. His role has been extended to unit process, device design, process architecture development and product manufacturing technology delivery. He has a MS in electrical engineering from Yonsei University, Korea.

A Research Fab to Enable and Scale Quantum Computing

Rom, Tim
Senior Expert - Quantum Technologies and Cooperations
Research Fab Microelectronics Germany (FMD) / Forschungsfabrik Mikroelektronik Deutschland (FMD)

Abstract
Quantum computing promises to revolutionise the computing landscape by exponentially accelerating complex calculations in areas such as material simulation, optimisation and artificial intelligence. However, significant scientific and technological challenges still need to be overcome before its application potential can be realised.Nano- and microelectronics as well as photonics are playing an increasingly important role in tackling these hurdles. On the one hand, their advanced design and manufacturing processes enable successive improvements in the quality and scaling of qubit systems. On the other hand, they provide important enabling technologies, like those needed to precisely control and read out different types of physical qubits.This talk will address the main challenges in the development of quantum computing hardware. Specific highlights will be used to illustrate how microelectronics can help to overcome these challenges at all system levels, thus driving further hardware scaling and integration. It will also show how the Research Fab Microelectronics Germany (FMD), with its new extension module for quantum and neuromorphic computing (FMD-QNC), can support agile research and development in this field.Although the focus of the talk is on quantum computing, it will be shown that developments in quantum hardware can also benefit from the latest progress in adjacent fields such as neuromorphic computing, and even unrelated applications such as animated holography. This will highlight the synergies arising from advances in microelectronics and its sophisticated manufacturing processes.The joint project "FMD-QNC" is funded by the German Federal Ministry of Education and Research (BMBF).

Biography
Professional:Dr Tim Rom is currently working as a Technology and Collaboration Expert at the Research Fab Microelectronics Germany (FMD). In this role, he is responsible for coordinating the technical aspects of FMD's new extension module for quantum and neuromorphic computing. His main focus is on technology scouting for quantum computing hardware, identifying promising solutions along the entire microelectronics value chain and initiating new collaborations. He is dedicated to helping research and industry partners find cutting-edge microelectronic solutions to their quantum hardware development challenges.Prior to his current position, Dr Rom was based at the headquarters of the Fraunhofer-Gesellschaft, where he was responsible for research management in the area of Next Generation Computing (NGC). In this role, he coordinated and drove cross-organisational strategy development, collaborative research activities and agenda setting for the NGC initiative.Dr Rom also has five years' experience as a technology consultant in the automotive industry. During this time, he worked as a quality and test manager in the field of connected vehicles, ensuring the security of the IT infrastructure and the safe introduction of new digital car connectivity services in global markets.Academia:Dr Rom spent two years as a postdoctoral researcher at the Max-Planck-Institute for Quantum Optics near Munich, where he focused on the experimental study of quantum many-body systems in artificial crystals made of laser light.Tim Rom received his PhD summa cum laude from the Ludwig-Maximilians University in Munich (LMU). His research involved the generation and full quantum control of single isolated molecules, and he designed and built a new apparatus at the University of Mainz for the quantum simulation of solid-state and many-body physics in optical lattices.He studied at the University of Freiburg and the Technical University of Munich, culminating in a thesis on the development of an "atom chip" for the transport of ultracold atoms.Throughout his academic career, he has published several important papers in high-impact journals, including first author papers in Physical Review Letters and Nature.About the Research Fab Microelectronics Germany and its new Module for Quantum and Neuromorphic Computing (FMD-QNC)The Research Fab FMD has launched its new extension module, FMD-QNC, which supports the development of quantum and neuromorphic computing hardware in Germany and Europe. The consortium comprises 19 institutions, including institutes of the Fraunhofer Society and the Leibniz Association, as well as the Forschungszentrum Jülich and AMO GmbH. FMD-QNC offers research groups, start-ups and industrial companies access to state-of-the-art microelectronics facilities and process know-how.FMD-QNC supports the development of a wide range of quantum and neuromorphic computing hardware with tailor-made technologies and processes from various fields such as nanotechnology, microelectronics, optics and photonics. In addition to manufacturing and pilot production capabilities, the range of services includes design, simulation, system integration, test and evaluation to deliver solutions that meet the demanding requirements for system scale-up and subsequent transfer to industry.The Research Fab offers technological breadth, quality and agility through a networked clean room infrastructure and advanced machinery. The joint business office facilitates coordination between all partners to provide optimal solutions for academic and industrial users.Funded by the German Federal Ministry of Education and Research (BMBF), the FMD-QNC project is an important step towards the development of next-generation computers in Germany and Europe.

Topic Coming Soon

Buseck, Peter
Head of IT and Automation Department
Robert Bosch GmbH

Abstract
Coming Soon

Biography
Coming Soon

Radiation Hardness of SiC TrenchMOS Devices for Automotive Applications

Schwaiger, Stephan
Automotive Electronics
Robert Bosch GmbH

Abstract
The lecture will investigate the cosmic radiation hardness of SiC TrenchMOSFET devices. It will sum up the effect of cosmic radiation on SiC power devices and the way of characterizing the cosmic radiation hardness. We will point out guidelines to improve the cosmic radiation hardness of devices and a method to estimate it in early computational design. Furthermore, we present our experimental results of the investigation of the cosmic radiation hardness of SiC TrenchMOSFET devices. Finally, we will evaluate on the results with respect to the operation of the devices in a traction inverter for electric vehicles in different operations modes.

Biography
Stephan Schwaiger studied physics at the university of Hamburg and finished with a doctorate degree in 2012. He started in semiconductor industry in Bosch’s central research department working power semiconductors. Since 2015 he works on the development of SiC semiconductors for the section Automotive Electronics at Bosch focusing on technology and device development.

Neuromorphic Computing for Autonomous AI Systems – the NeuroSys Cluster4Excllence in the Aachen Region

Lemme, Max C.
Managing Director
RWTH Aachen University

Abstract
AI as software dominates areas such as computer vision and speech processing. However, innovative new hardware concepts are needed to sustainably realize applications such as autonomous driving, personalized healthcare, smart cities, the Internet of Things, and Economy 4.0, because conventional computer hardware is increasingly hitting inherent limits in energy efficiency for AI applications. The regional cluster NeuroSys aims to overcome these limits by developing neuro-inspired hardware that can revolutionize AI systems in terms of energy efficiency and performance.NeuroSys collects a broad spectrum of experts who initiated an integrated and sustainable research and transformation process through interdisciplinary research and development: physicists, engineers, and material-, neuro-, and computer scientists collaborate with economists, ethicists, and sociologists on innovations that are not only technologically advanced but also economically viable and socially useful and desirable. RWTH Aachen University, as the coordinator and nucleus, works closely together with the Helmholtz Institute Forschungszentrum Jülich and the Johannes Rau Institute AMO GmbH. Regional start-ups and companies complete the cluster, while global corporations and internationally renowned scientists make up the advisory board.I will present our goals and approach to maximize the impact of our cluster and showcase selected socio-technological highlights of our activities throughout the first two years.This work has received funding from the German Ministry of Education and Research (BMBF) through the Clusters4Future NeuroSys (03ZU1106xx).

Biography
Max Lemme is a Full Professor at RWTH Aachen University and Scientific Director of AMO GmbH, a non-profit nanotechnology company in Aachen, Germany. He is a co-founder of Black Semiconductor GmbH, Aachen.Lemme obtained his Ph.D. degree (Dr.-Ing.) on nano-CMOS field effect transistors like FinFETs and ultra-thin SOI-MOSFETs from RWTH Aachen University in 2004. He has since worked on high-k /metal gate integration, and electronic, optoelectronic and nanoelectromechanical devices based on graphene and related 2D materials, Perovskites, and phase change materials, and their integration into the silicon technology platform. His work includes the world’s first top-gated graphene MOSFET, graphene-based non-volatile memory, vertical graphene hot electron transistors, graphene NEMS, ion-based memristive switches from molybdenum disulfide and silicon photonics-integrated Perovskite Lasers.Lemme received the “NanoFutur” young researchers’ award from the German Ministry for Education and Research in 2006 and a Lynen Research Fellowship from the Alexander von Humboldt Foundation in 2007. From 1998 to 2008, he worked at AMO, where his last position was as Head of the Technology Department. In 2008, he joined Harvard University in Cambridge, USA, where he pioneered a helium ion-based nanolithography method for graphene and investigated graphene photodetectors. In September 2010, he became a Guest Professor at KTH, where he initiated graphene activities within the School of ICT. He received an ERC Starting Grant and a Heisenberg Professorship funded by the German Research Foundation (DFG) in 2012 and joined the University of Siegen, Germany as a Full Professor in the same year. In February 2017, Lemme was appointed Full Professor at RWTH Aachen University and Scientific Director of AMO GmbH. In 2018, he received an ERC Proof of Concept grant, which contributed to the founding of Black Semiconductor. He has managed numerous national and international research projects with academic and industrial partners. Recently, his research interests include materials and electronic devices for quantum and neuromorphic computing. Lemme is the coordinator of the Cluster “NeuroSys – Neuromorphic Computing for Autonomous Artificial Intelligence Systems”, one of 14 Clusters4Excllence funded by the German Ministry of Education and Research.

Is Digitalization Really Worth it? The Latest Approaches for Fab Efficiency and Resilience

Colombo, Paolo
Strategic Account Executive Infineon
Schneider Electric

Abstract
Are your fabs challenged by lack of efficiency and low resiliency? Attend this keynote to see the latest examples of how digitalization comes to the rescue of both. You’ll also see how addressing these challenges through addresses another strategic priority for the industry: sustainability.

Biography
Infineon Technologies Strategic Account ExecutiveInfineon Technologies Strategic Account ExecutiveJun 2023 - Present · 2 mosJun 2023 - Present · 2 mosAschaffenburg, Bavaria, Germany · RemoteAschaffenburg, Bavaria, Germany · RemoteDriving our strategic partnership with Infineon Technologies to deliver more Sustainable values through Manufacturing Excellence, Digitization and Energy Efficiency.Driving our strategic partnership with Infineon Technologies to deliver more Sustainable values through Manufacturing Excellence, Digitization and Energy Efficiency.Europe Segment Leader for SemiconductorEurope Segment Leader for SemiconductorJan 2022 - Present · 1 yr 7 mosJan 2022 - Present · 1 yr 7 mosMarktheidenfeld, Bavaria, GermanyMarktheidenfeld, Bavaria, GermanyEcoStruxure & Internet of Things (IoT) for Innovation and Energy Management | Schneider ElectricEcoStruxure & Internet of Things (IoT) for Innovation and Energy Management | Schneider ElectricAt Schneider Electric, we aim to improve your business by using EcoStruxure Platform, our IoT-enabled system that leverages Microsoft Azure technology to optimize your operations. Our platform will help you manage energy efficiency and business...At Schneider Electric, we aim to improve your business by using EcoStruxure Platform, our IoT-enabled system that leverages Microsoft Azure technology to optimize your operations. Our platform will help you manage energy efficiency and business...Head of the IT Division Go To Market for Industrial OEM's and Food & Beverage segmentHead of the IT Division Go To Market for Industrial OEM's and Food & Beverage segmentMar 2017 - Jan 2022 · 4 yrs 11 mosMar 2017 - Jan 2022 · 4 yrs 11 mosMarktheidenfeld

Why Digital Solutions are the Key to a Sustainable Fab Transformation

Hua, Sharon
Global Strategy Director Semiconductor Segment
Schneider Electric

Abstract
The climate crisis we face today is the result of how we, as businesses, organizations, governments, and individuals, make decisions. Semiconductor CAPEX grew by 21% to a record of $185.5billion in 2022. This growth lines up a potential challenge to the international climate goals. Both the EU and US aim to get halfway to net zero carbon emissions by 2030, and to net zero by 2050. And as the semiconductor industry grows, so too will its carbon footprint.To reduce carbon emissions, we must decide to consume less energy and use energy more efficiently in our semiconductor manufacturing. It sounds simple. But we all know that this involves often unpopular decisions: Making it happen is tough. Especially without the right data. The good news is that today’s digital technologies can help us make decisions smarter, faster, more precisely – all of which is ultimately better for the planet. We will discuss the 3 enablers we use to support semiconductor industry on climate, from strategy to execution.

Biography
Global Director of Strategy & BD for Semiconductor SegmentGlobal Director of Strategy & BD for Semiconductor SegmentJan 2021 - Present · 2 yrs 7 mosJan 2021 - Present · 2 yrs 7 mosStrategy & BD managerStrategy & BD managerJan 2018 - Dec 2020 · 3 yrsJan 2018 - Dec 2020 · 3 yrs中国 江苏省 无锡中国 江苏省 无锡Strategy & BD manager, in Power Product BUStrategy & BD manager, in Power Product BUDigital strategy deployment managerDigital strategy deployment managerMay 2014 - Jan 2018 · 3 yrs 9 mosMay 2014 - Jan 2018 · 3 yrs 9 mos中国 上海市中国 上海市Digital strategy deployment

Opening Remarks

Manocha, Ajit
President and CEO
SEMI

Abstract
Coming Soon

Biography
Throughout his career, Ajit Manocha has been a champion of industry collaboration as a critical means of advancing technology for societal and economic prosperity. He has been adept at forming strong partnerships with customers, suppliers, governments, academia, and communities for these efforts.In his current role as President and CEO of SEMI, the global industry association serving the electronics manufacturing supply chain, Manocha has positioned the organization to tackle major challenges facing the industry by building up workforce development programs to address its growing talent shortage and lack of gender parity.Previously, he held senior worldwide operations leadership roles at Philips Semiconductors (NXP) and Spansion before serving as President and CEO at GLOBALFOUNDRIES. He has served on the boards of SEMI, SIA, and GSA.Manocha began his career as a research scientist at AT&T Bell Laboratories, where he was granted over a dozen patents related to semiconductor manufacturing processes that served as the foundation for modern microelectronics manufacturing.Manocha was an advisor to President Obama on the Advanced Manufacturing Partnership Steering committee and on the President’s Council of Advisors on Science and Technology (PCAST). In 2012, during his tenure at GLOBALFOUNDRIES, he was awarded the prestigious “EHS Achievement Award — Inspired by Akira Inoue” for his commitment and action on Environmental Health and Safety standards. Additionally, he has excelled in people development by teaching courses such as “Leadership by Example” and “Classroom to Cleanroom to Boardroom.”In December 2019, Manocha was named an “All Star of the Semiconductor Industry” by VLSI Research for his visionary leadership in restructuring SEMI from its traditional position to represent the expanded electronics supply chain. In February 2020, he was inducted into the Silicon Valley Engineering Hall of Fame.

Welcome Remarks

Weiss, Bettina
Chief of Staff & Corporate Strategy
SEMI

Abstract
Coming Soon

Biography
As Chief of Staff & Corporate Strategy, Bettina Weiss reports to SEMI’s President & CEO and manages a broad portfolio of responsibilities. Major focus areas include advancing specific global strategic initiatives such as SEMI’s Smart Mobility and Supply Chain initiatives and SEMI University, facilitate thought leadership (Think Tanks) activities in key strategic areas as well as improving organizational efficiency, alignment and financial sustainability. In addition, Weiss is the Sr. Liaison to the SEMI Board of Industry Leaders, leading strategic partnerships and M&A activity, and supporting the President & CEO in successfully creating a highly effective, agile global association.Weiss joined SEMI in 1996 and held a variety of positions in SEMI’s International Standards department, including department lead, global responsibility for SEMI's Photovoltaic/Solar Business Unit, business development including the integration of SEMI Strategic Association Partners FlexTech, MEMS & Sensors Industry Group, ESD Alliance and the SOI Consortium.Prior to joining SEMI, Weiss worked in sales and marketing positions at Metron Semiconductor and Varian Semiconductor in Munich, Germany. She holds a BA from the International School for Applied Languages in Munich, Germany, and is a certified translator for Anglo-American Law and Economics.

Topic Coming Soon

Bhat, Mousumi
VP Sustainability Programs
SEMI

Abstract
Coming Soon

Biography
Dr. Bhat is a Semiconductor Expert who has held senior positions within the Semiconductor Industry, Motorola, GlobalFoundries and Micron to name a few over the last 25 years. She has a Ph.D. from the University of Texas at Austin, Masters from MIT and University of Maryland and an executive MBA from Stanford Business School. During her career she has led Transversal, cross functional and multicultural teams across various continents and has led transformation projects that require foundational culture changes.She is also passionate about creating sustainable business practices and thereby creating an ecosystem of changemakers such as corporates, government, academia and society to accelerate social and economic parity through technological innovations.In SEMI, within her role as VP of Sustainability Programs, she is responsible for leading teams, directing client engagements, and overseeing processes and deliverables in Environmental Stewardship, Supply Chain and Supplier Resilience, including Responsible Sourcing.

Opening Remarks

Melvin, Cassandra
Senior Director of Business Development & Operations
SEMI Europe

Abstract
Coming Soon

Biography
Cassandra joined SEMI Europe in 2018 to lead its operations, business development and strategic initiatives related to diversity and inclusion. In this role she is responsible for leading a culturally diverse team, enhancing member value, and directing operations for optimized financial performance. Prior to joining SEMI, she held the position Global Product Manager at Atotech for its semiconductor division. She began her career at the SUNY Polytechnic Institute as a Business Manager focused on technical programs for chemistry and equipment manufacturers and held project management roles in clean room operations and IT. Cassandra's written work has been published in leading technical magazines and presented at conferences globally. She holds a BS in Business Management, and Minor in Neuropsychology from Rensselaer Polytechnic Institute.

Welcome Remarks

Altimime, Laith
President
SEMI Europe

Abstract
Coming Soon

Biography
Laith Altimime, as President of SEMI Europe, leads SEMI’s activities in Europe and the Middle East and Africa (EMEA). Altimime has P&L responsibility as well as ownership of all Europe region programs and events, including SEMICON Europa. He is responsible for establishing industry standards, advocacy, community development, expositions, and programs. He provides support and services to SEMI members worldwide that have supply chain interests in Europe. He manages and nurtures relationships with SEMI members in the region and globally as well as with local associations and constituents in industry, government, and academia. Altimime has more than 30 years of international experience in the semiconductor industry. Prior to joining SEMI in 2015, He held senior leadership positions at NEC, KLA-Tencor, Infineon, Qimonda and imec. Altimime holds an MSc from Heriot-Watt University, Scotland.

Topic Coming Soon

Barnabé, Pierre
Group Chief Executive Officer & Director
Soitec

Abstract
Coming Soon

Biography
Pierre Barnabé is a businessperson who has been at the helm of 5 different companies and currently occupies the position of Group Chief Executive Officer & Director at Soitec SA, Chairman for Elexo SAS and Chairman of Bull SAS. He is also on the board of Ipsos SA and Bull SA.In his past career he occupied the position of Co-CEO & Global Head-Manufacturing Industry at Atos SE and Chairman & Chief Executive Officer of Evidian SA (a subsidiary of Atos SE), General Manager for Société Française de Radiotéléphone SA and Vice President-Human Resources & Transformation at Alcatel-Lucent SAS.He received an undergraduate degree from NEOMA Business School and an undergraduate degree from École supérieure d'électricité.

Topic Coming Soon

Schwartzmann, Jerome
Senior Director of Industrial Strategy
Soitec

Abstract
Coming Soon

Biography
Jerome SCHWARTZMANN is Senior Director in charge of Industrial Strategy reporting toSoitec’s COO.He joined Soitec in 1998 and served different functions such as manager for industrial engineering, IT & strategic programs (new fab startup, new business diversification, post M&A integration, digitalization).From 2015 to 2017 after the termination of Soitec Solar Business, Jérôme joined Oberthur Technologies (IDEMIA) as Corporate Industrial Strategy Director to deploy Industry 4.0 practices in all fabs across the world (NORAM, LATAM, China, India, Middle East, Europe).Back in Soitec in 2017 he has been leading the project to restart Soitec Singapore Fab and then took over the head of Information Technology position for Soitec.Jerome is currently managing growth projects to deliver two new fabs, one in France for SmartSiC business (150/200mm) and one in Singapore to extend SOI 300mm capacity. He is also overseeing the Industry 4.0 roadmap of Soitec.Jerome earned a master degree in Applied Mathematics and Computer Science from Grenoble University and a strategic negotiations degree from Harvard Business School.

Key Takeaways by Session Chair

Alba, Simone
AG300 Fab - CVD and Dry Etch Area Manager
STMicroelectronics

Abstract
Coming Soon

Biography
Coming Soon

The SiC Power Revolution is Ready for High-Volume Car Manufacturing

Gärtner, Manuel
Director
STMicroelectronics

Abstract
Early adopters are already receiving significant quantities of SiC devices as we ramp up for the broader automotive industry. SiC wide-bandgap characteristics enable extraordinary efficiency in EV traction systems, on-board chargers, and DC-DC converters, as well as new applications including climate compressors, fuel cell power DC-DC, and high-speed air compressor pumps.By 2025, most European carmakers will have transitioned to the 800V DC bus domain where the high-voltage efficiency and thermal performance of SiC is even more appealing.The SiC revolution has many strategic implications and we will describe ST's manufacturing and vertical integration initiatives to meet the mounting demand, the ambitious electrification targets of legislators, and the stringent quality requirements of critical automotive applications.

Biography
Manuel Gärtner–Director – Wide bandgap & Electrification–Automotive & Discrete Group - STMicroelectronics Manuel Gärtner joined STMicroelectronics Munich in 1999 and is Director of wide bandgap & electrification for automotive applications. He has worked as a development engineer for smart power products and as a research engineer at the university of Berlin.He has published over 35 articles and conference speeches on automotive power electronics and holds more than five different patents.He is member of the EEHE Scientific Advisory Board, the SIA POWER TRAIN & ELECTRONICS scientific committee for Power Electronics, and he represents STMicroelectronics as principal partner in ECPE.

Pushing the Limits of SiC Technology: Advanced Packaging Solutions and System Integration

Tumminia, Alessandro
ADG Back End R&D Manager
STmicroelectronics

Abstract
The trend towards electrification in the industrial and automotive sectors is driven by the need for sustainable and energy-efficient solutions. This is leading to a shift towards wideband gap semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) for power discretes and modules, replacing traditional silicon (Si) components.SiC and GaN offer higher efficiency, faster switching speeds, and increased power density, enabling the creation of more compact and lightweight devices. Power module design is crucial for integrating wideband gap materials like SiC, and process bricks development, such as die attach and source interconnection, is equally important for ensuring high reliability and performance.Further progress is providing power box solutions (power module integration with cooling system), rather than just power module. Attachment methodology is moving away from standard thermal interface material and towards soldering or even sintering to reduce thermal resistance and increase overall system reliability.

Biography
Alessandro Tumminia is the Back End R&D Manager for STMicroelectronics in Catania, where he is responsible for package development for power discrete and power solutions, including system in package and power modules.To address the challenges of using power modules in electric vehicles, DC-DC converters, and on-board chargers in harsh operating environments, he manages a new department within R&D that performs design verification and reliability evaluation in real-life application conditions. This enables Alessandro and his team to anticipate any possible issues related to power module operation within a real customer application.After receiving his Diploma in Electronic Engineering from the University of Palermo, he began his career in the semiconductor industry in 2002, developing several NVM technologies focused on NOR. Prior to joining STMicroelectronics, he managed a cross-functional team that executed Micron 3D NAND roadmap, delivering timely qualification for NAND flash memories and supporting the SSD/Managed NAND team and R&D in achieving their targets.

Disruptive and Sustainable Bonding Technology Covering Various Material Combinations for Emerging Applications

Lutter, Stefan
Vice President R&D
SUSS MicroTec SE

Abstract
This presentation introduces a disruptive bonding technology which was derived from traditional anodic bonding but offers significant advances in terms of material versatility, surface preparation and sustainability.These advances include a significant reduction in the actual bonding process time, not only for traditional material combinations but more importantly for bonding a variety of materials which are used in emerging applications like 5G / 6G and power devices that help to improve the efficiency of electric vehicles. This results in significant direct and indirect energy savings on the one hand but on the other hand also offers significant total cost of ownership benefits for the actual bonding process itself.Some latest process results for traditional MEMS use cases but also for emerging applications in the RF MEMS and power devices application spaces will be explained in order to illustrate the disruptive nature of the new process.The new bonding technology was developed with a strategic partner and is now exclusively available on SUSS MicroTec’s bonding equipment.

Biography
- Diploma in Microsystems Engineering from University of Applied Siences in Regensburg, Germany and Master of Business and Engineering from Steinbeis University Berlin, Germany- Held various positions in process- development and R&D for MEMS, working in Switzerland and Germany, before joining SUSS MicroTec in 2008- Held positions in Product Management for Coater- and Bonder Business Units- Business Unit Manager Bonder since 2013- Business Unit Manager Coater from 2017-2019- Managing Director of SUSS MicroTec Lithography GmbH and SUSS MicroTec Photomask Equipment GmbH & Co. KG from 2018 - 2022- Managing Director of SUSS MicroTec Solutions GmbH & Co. KG since 2022

Opening Remarks

Schimpf, Klaus
Fab Manager
Texas Instruments

Abstract
Coming Soon

Biography
Now 25 years with TI- 1997: Phd in Physics Research Centre Juelich- 1997: joining TI in Freising as Product engineer working on Development and yield improvement of Annalog technologies- 2007-2020: various mgmt roles in Engineering and Operations- 2021: Fab Manager , FFAB TI Freising

TI’s Path to Net Zero Activities

Stur, Alexander
Facilities Engineering Manager
Texas Instruments

Abstract
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Biography
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Topic Coming Soon

Franchi, Marco
Sales Marketing Executive
Tokyo Electron Europe Limited

Abstract
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Biography
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Lights Outside Tunnel

Yu, Douglas
Vice President of TSMC R&D and TSMC Distinguished Fellow
TSMC

Abstract
High Performance Compute (HPC) and AI/ML have been realized by advanced nodes IC and advanced system integration technologies. Device /chip scaling and heterogeneous system integration, eg. TSMC 3DFabric^TM, which consists of CoWoS^®, InFO and SoIC^®, become the twin engine to drive semiconductor technology. Recent new wave of generative AI with LLM showed that HPC and AI/ML have tremendous room for future growth. In the meantime, higher performance compute with higher energy efficiency become even more critical requirements than ever to support the demand. We will continue the scaling of both device/IC and advanced system in classical m-electronics based computing system. Furthermore, photonics-based system integration technology will be added which are complementary to the classical system integration to meet the ever-increasing energy efficient performance requirements for future HPC and AI/ML.

Biography
DDoug Yu is a Vice President of TSMC R&D and TSMC Distinguished Fellow, responsible for system integration technology pathfinding. Previously, Doug has pioneered and led TSMC Cu/Low-K technology development, industry first wafer-level system integration technology platform, TSMC 3DFabric^TM, including CoWoS^®, InFO and SoIC^TM, and TSMC COUPE, a photonics-based system integration technology.Prior to TSMC, Doug worked with AT&T Bell Labs. He received Ph.D. degree in Materials Science and Engineering from Georgia Institute of Technology, Atlanta, GA.Doug is a recipient of IEEE Rao Tummala Award, IEEE EPS Microelectronics Manufacturing Award, and President Science Prize, Taiwan. He is an IEEE Fellow, TSMC Distinguished Fellow, and a member of National Academy of Engineering. He has given numerous invited/keynote/plenary speeches in international conferences and published 150+ papers to elevate system integration technology profile. He has (co)-authored 1500+ US granted semiconductor technology patents.

Designing Atomic Level Process Chemistries. The Role of Atomistic Simulation in Developing Sustainable Deposition and Etch Processes.

Nolan, Michael
Head of Group Materials Modelling for Devices
Tyndall National Institute

Abstract
In modern semiconductor device fabrication, the dimensions involved means that Atomic Level Processing, exemplified by Atomic Layer Deposition (ALD), is widely used for film deposition. Further scaling and use of complex three-dimensional structures means that Thermal Atomic Layer Etch (tALE) will start to take centre stage in etching. The key chemistry takes place at surfaces which drives the self-limiting characteristics and other advantages of these atomic level processing approaches.However, there is a side to device processing that needs to be addressed and this is the heavy environmental impact and non-sustainable nature of current atomic level processing chemistries. Specific examples include: up to 99% of precursors introduced into the processing tool are simply wasted, the high process temperatures, the complex synthesis of precursors (which can add to their high cost), using fluorinated and other environmentally unfriendly chemicals, the large number of sequential deposition & etch cycles which remove material that is wasted and the potentially large number of laboratory experiments (many of which fail) that are needed to develop a new process chemistry. I will present how first principles atomistic simulations based on Density Functional Theory can be used to predict the chemistry of atomic level deposition and etch processes and how these simulations can help with enhancing the sustainability of semiconductor devices processing, setting the industry on the path to truly green and sustainable manufacturing processes. The first topic is the simulation of plasma enhanced deposition (PE-ALD) of metals, using the example of cobalt for next generation interconnects. Our simulations show the first example of an atomistic level study of the full PE-ALD cycle for Co metal. We showed that the process requires use of ammonia or mixed H2/N2 plasma, eliminating the requirement to explore different plasmas to see what works. Calculated energy barriers for key steps give guidance regarding the temperatures required for the process, eliminating the need to explore the role of temperature through multiple time and resource consuming experiments. Finally, we also show how substrate pre-treatment can reduce nucleation delay and therefore deposit the target film more rapidly.Our second example is MLD of hybrid materials, using alucone and titanicone as the prototypical examples. Using aliphatic ethylene glycol and glycerol results in less-than-ideal growth per cycle (they lie flat) and poor ambient stability. Therefore, we developed functionalized benzene rings as rigid alternatives and show that the molecules remain upright, which provides high GPC and stability. Subsequent work on titanicones with both DFT and experiment, using these aromatic precursors, confirms the enhanced stability of MLD films using aromatic molecule, which also show high growth rates. My presentation therefore demonstrates how first principles simulations are a vital part of developing greener and more sustainable atomic level processing chemistries for semiconductor device processing. Finding efficient processes through simulations can increase the usage and efficiency of film processing. Other examples where simulations can and will play a role include developing non-halogenated ALE chemistries, better design of reactors to maximise precursor use, better precursor design with higher atom economy and finding alternatives to unsustainable synthesis chemistries.

Biography
Dr. Michael Nolan is the Head of Group - Materials Modelling for Devices at Tyndall National Insitute, UCC, Ireland. Tyndall is Ireland's leading ICT and DeppTech research institute with close on 600 staff and students and is world leading in ICT, communications, photonics, device processing and materials. Dr. Nolan is also interim Cheif Scientist, Chairperson of the Science Council of the Irish Centre for High End Computing and Associate Editor of the Diamond Open Access Beilstein Journal of Nanotechnology. He is a Funded Investigator on the Science Foundation Ireland Research Centres Insight, AMBER and VistaMilk. Currently Dr. Nolan leads a team of 4 PhD students and 7 postdocs in the first principles simulation of new atomic level processing chemistries, which is carried out together with leading groups in Europe, including M. Knez, A. Devi, C. Detavernier and M. Karppinen and beyond, e.g. S. George. This encompasses atomic layer deposition, atomic layer etch and hybrid molecule layer deposition.He received his PhD in Microelectronic Engineering in 2004 from University College Cork and was a postdoc with Prof. G. Watson (Chemistry, Trinity CD 2003-05) and Dr. S. Elliott (Tyndall Institute 2005-09) and has been a tenured researcher since 2009, having been promoted to Principal Scientist in 2015 and Head of Group in 2022. Dr. Nolan has graduates 7 PhDs and supervised 7 postdocs. He has published extensively on modelling of surfaces and surface chemistry for energy, semidonductor device and medical device applications.An important aspect of the group's work is interaction with industry, either through direct funding or leveraged co-funding. Work with industry includes LAM Research (Enterprise Ireland Innovation Partnership, co-I), Stryker (Enterprise Ireland Innovation Partnership, lead-I), Intel, Applied Materials and Logitech, with other contracts subject to commercial sensitivity. Dr. Nolan has a licence agreement with UMICORE and two patents.

Germanium Substrates for Photonics: GaAs Replacement Advantages and New Production Possibilities through CMOS Integration

Zyulkov, Ivan
Business Development Manager
Umicore

Abstract
Fast growth of consumer and automotive markets drives developments of new photonic devices such as micro-LEDs, multi-junction VCSELs and imagers both in the NIR and SWIR spectrum. While most of the photonics devices produced today are manufactured using GaAs substrates as a platform, there are more and more developments showing advantages of using Germanium (Ge) over GaAs. In this presentation we are focusing on technical advantages of using Ge, explain nuances of epitaxial growth on Ge substrates such as auto-doping effects and anti-phase domains and how to avoid them. In addition, we are going to discuss in more details the environmental and financial benefits of performing Ge substrate recycling for volume applications.Another aspect of photonics device manufacturing is processing of epitaxially-grown wafers into functional devices. While most of the photonics devices are manufactured by traditional III-V IDMs and foundries, cutting edge photonic chips could be made in close collaboration between III-V companies and Silicon semiconductor / CMOS players in order to improve a form-factor, device performance and to drive down production costs. This possibility is currently limited by GaAs wafer size and CMOS fab contamination requirements. Umicore works on 8’’ and 12’’ Ge substrates that can serve as a bridge between III-V world and Semiconductor industry due to the size and Germanium material compatibility with CMOS specs. In this presentation we are going to present our roadmap to CMOS compatible Ge wafer development.

Biography
Ivan currently serves as a Business Development Manager at Umicore, where his focus lies in Germanium-based materials for the photonics market. He specializes in Vertical-Cavity Surface-Emitting Lasers (VCSELs), Light Detection and Ranging (LiDARs), and Augmented Reality/Virtual Reality (AR/VR) technologies.Before joining Umicore, Ivan gained substantial experience in the field of microelectronics, having worked at multiple companies including ASM International and IMEC.Ivan holds a PhD in Chemistry from KU Leuven in Belgium. His research, undertaken at IMEC, revolved around exploring various techniques for metal deposition in microelectronics.

Opening Remarks

Aal, Andreas
Semiconductor Strategy
Volkswagen AG

Abstract
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Biography
Andreas (IEEE SM / CRP) drove the semiconductor strategy & reliability assurance activities within the E/E development at Volkswagen, Germany, for many years, concentrating on technology capability enhancement of most advanced nodes incl. improved HW integration schemes as well as optimization of power electronics for automotive applications. He temporarily joint CARIAD SE between 2020 and 2022 as a system architect and product security officer focusing on semiconductor and SW driven innovations.Wearing always one shoe from the semiconductor industry and the other one from the car OEM, he became a strong representative of the through-the-supply-chain-joint-development and collaboration approach also being rewarded with the EDA Achievement award 2020. He has 24 years of experience with and within the semiconductor industry, has authored/co-authored over 40 publications on reliability and has given tutorials at IEEE IRPS and IIRW as well as invited and keynote speeches during various conferences and conventions.His early collaboration activities began already in 2007 becoming the chair of the German VDE ITG group MN 5.6 on (f)WLR, reliability simulations and qualification. He is currently also chair of the European chapter of the SEMI Global Automotive Advisory Council (GAAC), member of the coordination team of the corresponding “European platform for automotive semiconductor requirements along the supply chain” hosted by the VDE ITG and member of the Bmbf industry advisory board on cyber security. Driving the disruptive automotive transformation process on a collaborative supply chain basis is one of his major passions.

Semiconductor Management from an OEM Perspective

Schmid, Michael
Head of Procurement Semiconductor Management Group/Brand
Volkswagen AG

Abstract
New vehicle architectures, OTA-Updates, and the SW-defined vehicle in general are key drivers for OEMs to pursue further vertical integration. It is crucial to define key hardware guardrails early in the product development process. In addition, the semiconductor crisis has made OEMs more aware of the importance of electronic components, especially in the automotive industry.Volkswagen is actively shaping the future and has implemented key elements of a strategic semiconductor management program. A new top management committee decides on the company-wide semiconductor strategy from a technology and procurement perspective and reviews component sourcings at semiconductor level for conformity with strategy.Volkswagen is implementing a semiconductor category management for the most important semiconductor categories, analogous to major Tier-1s. This results in explicit specifications for each semiconductor category, all the way up to product portfolios, always with an eye towards the future and without hindering innovation. This gives the Group greater control over bills of materials and designs, proactively reducing complexity and improving component interchangeability, while ensuring the use of state-of-the-art technologies wherever possible.In addition, a risk monitor provides a clear basis for decision-making so that potential bottlenecks can be addressed at an early stage. Different dimensions such as end-of-life, probability of natural disasters or structural risks are combined in a score for each component. This tool can be used to identify risks and prepare mitigation measures such as technological alternatives or redesigns.Beyond to the internal transformation, Volkswagen is increasingly pursuing collaboration across the entire semiconductor supply chain – an approach from which both sides benefit, both technologically and in terms of plannability and security of supply in the supply chain. In this way, Volkswagen supports SEMIs goals of sharing best practices, creating standards and driving new and innovative solutions through close collaboration across the supply chain, also incorporating politics in those discussions.

Biography
- Head of Procurement Infotainment Group/Brand (2010-2013)- Head of Procurement Production Material VW India (2013-2016)- Head of Procurement Engineering Services Group/Brand (2016-2019)- Head of Procurement Infotainment, Telematics & HMI Group/Brand (2019-2022)- Head of Procurement Semiconductor Management Group/Brand (since 2022)

Watlow’s Approach Towards Energy Efficiency and Achieving Net-Zero

Parkinson, Blake
Director of Gas Delivery Business Segment
Watlow Electric Manufacturing Company

Abstract
Watlow’s Lean Journey began more than 15 years ago. As we began to implement changes, we quickly learned that this journey would not just improve our manufacturing efforts, but that it would also be the start of our own Green Journey. As a company, we have undertaken many initiatives to reduce our footprint including improvements in HVAC efficiency, lighting, and release of pollutants. Our main initiative is to join many companies in the world and achieve net-zero emissions in 2050 or before. As a supplier to many of the world's leading companies, Watlow is also committed to supporting our customers’ Green Journey. Using unique raw materials, computer-aided simulations, and advanced power control technology, we can ensure that the right amount of heat is applied to the right location and at the right time. Provides our customers with the ability to realize at least a 10% reduction in power output. Which, when scaled to fab-level consumption, provides meaningful support to our worldwide journey to net-zero emissions.

Biography
Blake Parkinson has gained a Master in Business (MBA) and Master in Chemical engineering. He has been with Watlow for 8 years, served in several roles in Operations, Project Management, Process Engineering, and Business Management. Blake has global experience in new product development, supplier development, and cross-functional team leadership. His current role is Director of Gas Delivery and Exhaust in the Semiconductor business unit.

The Great Wolfspeed Takeover

Stigall, Missy
SVP Global Fab Operations
Wolfspeed

Abstract
Coming Soon

Biography
Missy is responsible for the strategy and direction of the Wolfspeed global device factories, developing innovative production solutions, building dynamic manufacturing and engineering teams, and delivering on-time quality execution that meets customer needs. In addition, she sponsors our Management of Change initiative, is responsible for several initiatives in the Global Ops organization, and has a passion for driving critical conversations that result in solutions that evolve inclusion and diversity.Missy has 25 years of experience in the semiconductor industry, encompassing a wide range of roles. She graduated from Southern Methodist University with a BS in Electrical Engineering and from Kettering University with a MS in Engineering Management.

Conversation with

Reynolds, Neill
Chief Financial Officer
Wolfspeed, Inc.

Abstract
Semiconductor powerhouse Wolfspeed is nothing short of an American success story in the semiconductor manufacturing world. The company made headlines back in 2019 when it announced the selection of the Marcy Nanocenter site near Utica, NY for the construction of their state-of-the-art 200mm silicon carbide greenfield fab, part of a broader $6.5 billion global capacity expansion effort. Built in record time, the Mohawk Valley facility was inaugurated and started production in April 2022. Since then, the company has announced the construction of The John Palmour Manufacturing Center for Silicon Carbide in North Carolina to help expand the company’s existing materials capacity by more than 10-fold. This February, they also announced the expansion of the company’s global footprint with the planned construction of a 200mm SiC device manufacturing facility in Saarland, Germany in partnership with ZF to support increasing customer demand as well as the company’s long-term revenue outlook of $4 billion in fiscal year 2027.

Biography
Neill Reynolds joined as Chief Financial Officer in August 2018. Neill is a seasoned finance executive who has led various financial functions at global technology companies. Most recently he served as Senior Vice President of finance, strategy and procurement at NXP Semiconductors N.V., where he led global teams in developing and executing strategic initiatives to expand profit margins and meet growth objectives. Previously, Neill held divisional CFO positions and served on management teams at General Electric, executing growth initiatives for global industrial and manufacturing businesses spanning multiple technology industries. With his extensive leadership experience and industry knowledge, Neill will help ensure the company will meet its growth objectives and return value to investors.

Challenges of Capacity Doubling Under Brownfield and Full Load Conditions

Woittennek, Michael
CEO X-FAB Dresden
X-FAB Dresden GmbH & Co. KG

Abstract
Coming Soon

Biography
Michael Woittennek is CEO - Managing Director, X-FAB Dresden GmbH & Co. KG with a strong focus on cooperation and growth of the teams during the last 15 years in X-FAB. Responsibility for Dresden location including and ~580 employees in operations, facility, quality, controlling, IT and R&D. Short- and long-term goal- and priority setting responsibility. Focus on economy of scale activities (ramp 11.000 wafer starts/month) and clear support of automation roadmap to improve profitability of the site.

Opening Remarks

von Podewils, Mario
Director MEMS & Erfurt Operations
X-FAB Semiconductor Foundries GmbH

Abstract
Coming Soon

Biography
Mario von Podewils has more than 40 years of experience in microelectronics manufacturing. In 1982, he started his career as a maintenance technician for various types of semiconductor manufacturing equipment in the microelectronics industry in Erfurt, Germany. After obtaining his degree in electronics engineering, he spent several years as a team leader responsible for equipment maintenance in various process areas in wafer fabrication at Thesys GmbH, Erfurt. From 1992 to 2001, he was project manager of national and international joint projects in the semiconductor industry, mainly funded by the BMBF or the EU.In 2001, he obtained his diploma in industrial engineering, specialising in operations and production management. Since then, he has held various positions as department and module manager for equipment engineering and the lithography module at X-FAB Semiconductor Foundries AG, among others. In 2007, he took over the position of Fab Operations Manager at X-FAB Semiconductor Foundries GmbH in Erfurt.At the beginning of 2021, he was delegated to the MEMS site in Itzehoe of the XFAB Group as Site Manager. Since autumn 2022, as Director MEMS & Erfurt Operations, he is now responsible for both wafer fabs at the Erfurt and Itzehoe sites as well as X-FAB's global MEMS production.

PhotonixFAB – The EU-funded Pilot Line to Empower Photonics Innovations

Mellin, Joni
BL manager photonics
XFAB AG

Abstract
photonixFAB project aims to empower photonics innovation by SMEs and large entities by providing low barrier access to both low-loss silicon nitride (SiN) and silicon-oninsulator (SOI) based photonics platforms with indium phosphide (InP) and lithium niobate (LNO) heterogenous integration capabilities. Project objective is to establish a European photonics device value chain and initial industrial manufacturing capabilities. Thus, providing a path to scalable high-volume manufacturing for innovative product developers. This will strengthen the continent’s manufacturing capabilities in key emerging areas.

Biography
Joni Mellin has acted as Photonics product marketing / business line manager at X-Fab since 2022. He joined X-FAB from ams OSRAM, where he held Engineering director and other positions in the Full Service Foundry division since 2014. Prior to that, he held managerial and R&D positions at Microsoft, Nokia, Micro Analog Systems and VTI technologies. Joni Mellin helds Licentiate of Science and Master of Science degrees in semiconductor technology from the Aalto University and a dual Global Executive MBA degree from WU Vienna and University of Minnesota

Easy Integration of Machine Interface

Wagner, Frank
Consultant and Developer
ZEISS Digital Innovation

Abstract
The OPC-UA standard is ideally suited for establishing machine-oriented communication with a software system. By using node-set files, it is possible to define the static structure of the OPC-UA interface to all communication partners in a uniform way. However, the standard does not allow the definition of the behavior; a separate documentation must be created for this. The interpretation of the documentation can lead to different interpretations, which results in a high risk of integration problems, especially if client and server are developed independently.In our project, we minimize this risk by providing a generic configurable simulation of the interfaces for client and server. This enables us to provide communication partners with different behaviors with minimal effort, which are used as counterparts before a real implementation.The configuration of a simulator essentially consists of a collection of states of certain tokens. This allows us to derive and generate all possible combinations of the configurations of the tokens, which allows us to define a test oracle for the behavior of the simulator.By integrating the simulator into our QA processes, we have the chance to test all possible failure cases without the need of having a real machine available. This way, many errors are caught before the actual integration in the development process.This procedure has proven itself in our project and makes the integration with the real machine easier and more efficient for us and creates fewer errors on both sides.

Biography
Frank Wagner is a consultant and developer at ZEISS Digital Innovation. He is particularly involved in production technology and automation with a focus on the integration of machines based on Microsoft technologies in the semiconductor industry. Clean code, clean architecture and test automation characterize his area of expertise.