Lerch, Wilfried
Private

Biography
Dr. Wilfried Lerch (m) holds a Diploma and a PhD in physics both from Westfälische Wilhelms-University Münster. After working on the basic diffusion mechanism during rapid thermal annealing he joined ast elektronik GmbH in 1994 which later became Mattson Thermal Products GmbH. Until 2007 he was responsible for process technology at customer sites but also for the advanced, next generation technology and equipment development of lamp-based systems (RTP and Flash). Since 2009 he joined centrotherm international AG and is responsible for R&D and technology of all front-end and back-end semiconductor products (furnaces, lamp-based and low-temperature microwave based equipment as well as soldering tools).

Kraxenberger, Manfred
Vice President
ABB Semiconductors

Biography
Manfred Kraxenberger is currently factory manager for ABB’s BiMOS wafer fab and assembly line in Lenzburg, Switzerland. He studied physical engineering and started working as process engineer at Siemens Semiconductor in Munich in 1986. Over the last 30 years, he has held several engineering and management positions in manufacturing as well as R&D at Siemens/Infineon/Qimonda and Globalfoundries. Prior to his current position he was in charge of ABB’s Bipolar factory.

Addressing challenges testing complex power analog semiconductors

Dirscherl, Toni
Product Manager Power and Analog
Advantest Europe GmbH

Abstract
Innovation and permanent cost reduction measures are driving steady rising semiconductor content. At the same time the pin count stays almost constant and therefore drives the need for complex device I/O structures. Various test requirements from analog/power to digital are observed behind such pins which drive the demand for a flexible ATE resource. High power devices require a careful thermal management to achieve a high measurement stability. An exact defined and repeatable energy delivery of the ATE High Power VI Sources to the DUT is essential. In addition, the power IC market presumes a significant higher mix of devices compared to prevailing digital centric segments. To test such a diversity of products a universal test system architecture is of benefit. A major contributor for saving test cost is to increase the number of test sites. As a consequence, there is a need for additional load board circuitry. Moreover, complex power multiplexing schemes are getting introduced due to resource sharing. With rising site counts a high multisite efficiency (MSE) becomes a key element for throughput optimization. A method to increase ATE efficiency is the parallel execution of test sequences on the ATE hardware, rather than constant interaction between the instrumentation and a workstation CPU. The solution for above challenges is addressed by a universal ATE pin architecture with synchronized pattern based execution for maximum throughput and repeatable setups and measurements. Powerful software tooling supports the capability of complex routing and multiplexing schemes which are seamless integrated into the main test flow.

Biografie
Toni Dirscherl holds a degree as Electronic Engineer from the University of Applied Science in Munich, Germany and joined SZ Testsysteme as Development Engineer for Analog DSP frontends in 1997. After serving 3 years as Senior Application Engineer for SZ Inc and Credence in San Jose/California from 2001 to 2003, Toni Dirscherl took over the position as Product Marketing Engineer for Credence-SZ GmbH. Since the acquisition of Credence-SZ by Advantest Europe in 2008, Toni Dirscherl acts as the Product Manager for Advantest’s Analog and Power Solutions. He has published numerous articles.

Probers with Physical Stimulus – introduction to technology and benefits on WLP MEMS sensor final test.

Kuukkala, Ari
Sales Director
Afore

Abstract
Two wafer probers with physical stimulus are presented. The other one is for environmental sensor having stimuli for pressure, temperature, humidity or other gases. Another is meant for final testing of motion sensors: accelerometers, gyroscopes and magnetometers. The handling of miniature size, light weighted, sensors is getting more complicated. Many of the P&P systems are limited to package size of 2x2 mm. New wafer level packaging technologies enable much smaller form factors, sensors smaller than 1x1 mm. Using probers, DUTs are well organized on adhesive tape and the handling is smooth during the whole process. The presentation shows how the Cost of Test can be brought down by using probers with physical stimulus in MEMS final testing. The sensors can be fed directly from wafer dicing to the prober. The wafer ring with adhesive tape works as a carrier through the whole process. By this new handling method it is possible to shorten tremendously the manufacturing process and decrease the investment costs. The other benefit of a prober with physical stimulus is much higher capacity compared to traditional test systems, such as Pick & Place based test systems. Thousands of sensors can be fed simultaneously to the prober and the time is mainly used for testing, not for loading and unloading like with P&P systems. Due to constant MEMS sensor price dilution the industry is facing a huge cost pressure. In addition, there is a high demand for smaller, miniature size, sensors. New wafer level packaging technologies are responding to both of these challenges. However, the package type itself doesn’t reduce the cost of test (COT), which is one of the biggest manufacturing costs of MEMS sensors. A real case calculation concerning testing of 3-axis accelerometer shows how the final testing with a prober with physical stimulus leads to lowest cost in the market.

Biografie
Mr. Kuukkala has degree in Mechanical Engineering and is working on degree in Electrical Engineering. In addition he has studies in economics. He has worked for Afore over 10 years in different positions; as a mechanical designer, service engineer and R&D manager. Currently he is working in business development and sales still being highly involved to new product development.

Flexible sensor systems for real time monitoring of aircraft structure fabrication

Friedberger, Alois
Head of Sensor Integration
Airbus

Abstract
Over the last years, more and more metallic structures in airplanes have been replaced by lightweight composite materials, especially CFRP (carbon fiber reinforced plastics). This leads to weight reduction and hence reduced fuel consumption. Increased aircraft production rates require mature fabrication processes and adequate quality control. Therefore, real-time monitoring of CFRP processes is needed. We will briefly describe the major fabrication methods for composite based aeronautic structures such as liquid resin injection and autoclave curing. A major and critical step is resin curing which takes place e.g. at 180°C for several hours. The most important parameters during curing are temperature distribution, degree of curing and pressure distribution. The respective requirements will be presented. Several parameters need to be monitored at many positions. A single laminate layer is approx. 125 µm thick requiring very thin sensors. During curing, forces are acting which requires sufficient mechanical robustness or flexibility of the sensor. For all these reasons, an approach based on a large-area flexible PCB has been chosen. However, the sensors are not all based on printed electronics technologies. Instead, hybrid integration of standard silicon pressure sensors and SOI-based pressure sensors has been used to obtain high precision and for the sake of rapid prototyping. The results of extensive testing from room temperature up to 180°C and from 1 to 6 bar absolute pressure will be presented. In addition, the sensors have been embedded in a real structure and its fabrication has been monitored in real-time. We will show details of this flexible sensor system operating in the harsh environment.

Biografie
Alois Friedberger gained his PhD in physics on his work about porous silicon and its application to MEMS (Micro Electro-Mechanical Systems). At Siemens, he worked in the field of microelectronics (CMOS) and surface-micromachining. He worked in the area of micro technologies, microsystems and surface micromachining for 1 ½ years at the Berkeley Sensor & Actuator Center (BSAC) at the University of California at Berkeley. After returning to Germany, Alois was doing research on thermal microsensors at the Daimler Research & Technology Center in Munich. He is currently research team leader at Airbus Group Innovations. A major activity is in the development of detection systems and integration of micro technologies, especially sensor integration in composite materials. Alois has approx. 55 journal and conference contributions and approx. 60 patents and filed patents.

The digital twin in the cloud - smart equipment life cycle management by OEM's

Geissler, Frank
Director Sales
AIS Automation Dresden GmbH

Abstract
Life cycle management is more and more an essential topic for equipment manufacturers, as the equipment building and roll out has to be optimized and as additional services have to be provided for a successful business. The AIS cloud solution is therefore the solution for equipment suppliers. With Monitoring App equipment manufacturers are able to manage all their equipment at on central point. The management includes the configuration and setup data as well as general commercial aspects. In addition allows the Monioring App the visualization of KPIs and additional data from the equipment. The RampUp App is the base for an optimized installation of the equipment starting from the assembly at the shop floor to the commissioning at the customer side. Reduced installation times and faster equipment ramp up are only some advantages of the equipment cloud.

Biografie
Director of Sales AIS Automation Dresden GmbH Since June 2014 Sales Planning, Definition of Sales Objectives incl. Market and Customer Strategy, Marketing, Product Marketing and Management, Account Management

Recent progress in MOCVD Technology for Electronic and Optoelectronic Devices

Heuken, Michael
Vice President Corporate Research and Development
AIXTRON

Abstract
Solid State Lighting (SSL) based on LED, solar energy harvesting and low loss energy saving power conversion based on AlGaInN/GaN electronic devices require advanced, high yield and high throughput MOCVD production technology. To further improve the cost-of-ownership and to allow semiconductor photonic devices market penetration eg for SSL or sensing applications the proven multiwafer Planetary Reactor® as well as the Showerhead reactor family was recently upgraded and automation was added. Simulation of temperature distribution and gas flow allows understanding the growth process as well as limiting technological factors thus contributing to productivity increase. Revolutionary as well as evolutionary steps have led to the introduction of the AIX G5 HT and high productivity Close Coupled Showerhead (CCS) reactors. Both exhibit high wafer capacity configurations with multiple wafer of various size up to 5x200mm for AIX G5+, and 31x4” for showerhead reactors. The basic design rules and principles of MOCVD growth optimization including productivity increase and details of today’s high brightness LED and HEMT technology on Silicon and PSS substrates will be explained. The resulting uniformity data within the 1 % range on 200 mm Si wafer enables state of the art production. The Cost of Ownership (CoO) of MOCVD tools is mainly determined by wafer yield and by reduction of user interaction due to automation. This paper discusses the different developments in the field of MOCVD to facilitate further reduction in production cost and simultaneously improving the device characteristics.

Biografie
Prof. Dr. Michael Heuken was born in Oberhausen, Germany on November 17, 1961. He received the Diplom Ingenieur degree and the Dr. Ing. degree in Electrical Engineering from Duisburg University in 1985 and 1989, respectively. He joined the “Institut für Halbleitertechnik” at RWTH Aachen as senior engineer and has been working in the field of metalorganic vapor phase epitaxy for electronic and optoelectronic devices. In 1994 he finished his Habilitation in semiconductor technology and devices with a thesis on optoelectronic devices. Since then and still at present he has been lecturer for semiconductor technology and devices as well as circuits for communication systems. Prof. Dr. Michael Heuken joined AIXTRON in 1997 in Aachen-Germany where he is now Vice President Corporate Research and Development. His main research interests are in the fields of semiconductor growth by MOVPE, materials characterization, device technology, electronic and optoelectronic devices and circuits. Prof. Heuken is author and co-author of more than 650 publications in international journals and several invited papers at international conferences. He was President of DGKK (German Crystal Growth Association) from 2002 to 2005. He is elected councilor of IOCG (International Organization of Crystal Growth) representing Germany. He is member of VDE/ITG and was board member of OptechNet e.V. and EPIC (European Photonic Industry Consortium). He has been granted several patents in the field of MOVPE technology.

Silicon Wafer Integrated Fan-out Technology (SWIFT®)

Clark, David
Sr Director marketing, business development
AMKOR TECHNOLOGY EUROSERVICES

Abstract
This paper reviews Silicon Wafer Integrated Fan-out Technology (SWIFT®) packaging methodology and its performance in a typical mobile application. In addition, the advantages of a SWIFT® design are reviewed in comparison to a conventional competing 3D packaging technology. Package information, electrical simulation, and reliability test data will be presented to show how SWIFT® technology is poised to provide robust, reliable, and low-cost 3D packaging solutions for advanced mobile products.

Biografie
David Clark currently holds position of Senior Director - Advanced Products Business Unit at Amkor Technology Europe. In this role, David is responsible for strategic business development and marketing of advanced package and test technology for Amkor. Prior to that he has held various roles in sales and business development at FlipChip International, research posts at University of Cambridge, application, product development and process engineering at Vistec Lithography and Agilent Technologies. David has an Honors Degree from University of Glasgow in Electronic, Electrical and Optoelectronic Engineering.

Sensors for Mobiles, Wearables and Home and Building Automation.

Lous, Erik Jan
Engineering Fellow
ams

Abstract
Sensing is often the trigger to a number of events. The sensed property is communicated into a system or network, where analysis is made that eventually results in one or more responding actions. To create meaningful responses, sensible inputs and analysis need to be derived. This is exactly the playfield of CMOS technologies, where its computational power can support seemingly complex situations. The Internet of Things, IoT, is one of such environments where a lot of sensing information is expected to be shared to the benefit of human wellbeing. These application areas are numerous and hence a few situations will be elucidated for smart buildings and personal info systems, where internet can play an interesting role. For many applications the development of IoT often requires sensors at relative cheap prices, while not giving in on performance and quality. Not the least also small form factors and low power, enabling battery and energy scavenging use are dreamed off. Also here CMOS technologies are providing the solutions and driving the capabilities. Therefore, sensors are becoming a 4th option technology in CMOS fabs, besides the current 3: RF, High Voltage and embedded memories. Together with advanced packaging and test methods, miniaturization and mass production are being enabled. Design libraries can be developed in classical ways to integrate sensors with sensor interfaces in new ASIC designs. This enables highly integrated, high performance sensor solutions, well capable to realize many IoT sensor ideas. The above will be shown with a few examples in the areas of humidity, temperature, pressure and gas sensing, biosensors, imaging and several other optical sensor solutions for Mobiles, Wearables and Home and Building Automation.

Biografie
Erik Jan Lous is Engineering Fellow for ams, located in Eindhoven, The Netherlands, He studied Physics and Chemistry at the State University Leiden, The Netherlands. In 1988 obtained his PhD in Biophysics on Photosynthesis, followed by 2 post-doc years at the University of California at San Diego. He has about 26 years experience in the semiconductor process technology, starting in Philips Research, Philips Semiconductors, NXP and currently at ams. From this, 14 years were in sensors areas of: 180nm process, Medical Imaging, PET, SPAD, biosensors, BAW, AMR, HV, mems switch, mems oscillator, mems microphone, relative humidity, temperature and pressure sensors. He has served as development manager and has been part of Technology Management & New Business Creation Teams. Currently he is now 2 years in ams and working in the BL Environmental Sensors.

Investing to Boost Power Electronics From Materials to Systems - Opportunities and Challenges

Zhou, Alan Zhen
Managing Partner
Anxin Capital

Abstract
Over the last 30 years, the semiconductor industry has been driven by rapid growing in demand for CPUs and Memories by personal computers and communications products at a speed and cost predicted by the Moore's law. As Moore’s law approaching its limit, more attention and resources are devoted in developing new devices and new materials including compound semiconductors such as GaN and SiC. These third generation WBG semiconductor materials are ideal for power electronics. As the world’s first Billion dollar fund dedicated to invest in compound semiconductors and build-up the eco-system globally. We have explored investment opportunities and challenges in many companies from start-ups to conglomerates around the world. These companies are developing new power semiconductor materials and devices, advanced power switching techniques, power control and monitoring technologies, power conversion&storage innovations, and adaptive power optimization algorithms, variable motor drives, green technologies for power generation, conversion and distribution, new internet and “sharing economy” business model in power, smart connected grid,etc. Of course, solution size, efficiency, and cost are well-established metrics for power technology advances and trends for these metrics are discussed. In summary, this talk examines the state of compound semiconductor power technology from an investor perspectives, including materials, devices, and systems; and share our vision for how the world of power electronics may evolve over the coming years and where we are investing to build up and accelerate the adoption and mass manufacturing of new materials, devices, and technologies in power electronics for applications in consumer electronics and mobile devices today as well as Electric Vehicles in the near future.

Biografie
Alan Zhen Zhou is the Managing Partner at An Xin Capital focusing on compound semiconductor ecosystem investments from material, equipment, process, device, to systems. Dr.Zhou has over twenty years of semiconductor experiences where he held both technical and management executive positions at IBM, AT&T, Lucent, Agere Systems and Qualcomm. He also founded and co-founded several companies, including CSMC (IPO in Hongkong), MEMSIC (IPO in NASDAQ), Top Global (acquired), Belleds and Bellnet Technologies. As vice president at Qualcomm, Alan was responsible for all Qualcomm chipset business and design wins in China where he managed Sales, Operations, Customer Services and Field Applications Engineering functions. His team delivered >$3B revenue and >150M units of smart phone chipsets per year to over 50 major OEMs. While working for Lucent and AT&T, he established the first communications IC design center and launched the first GSM handset reference design to a dozen leading communications and consumer electronics companies in China. He also built the first submicron IC foundry in China (now China Resources) with technologies transferred from AT&T Bell Labs. Dr.Zhou received both of his MS and Ph.D. degrees in Electrical Engineering and Computer Science from MIT with his BS degree in EE from NYU-Poly.

The Challenge and Opportunity of 200mm/300mm More-Than-Moore (MTM) Technology Transitions

Mininni, Rossella
Strategic Marketing Manager
Applied Materials

Abstract
In recent years, the 200mm wafer fab equipment market has enjoyed somewhat of a renaissance. With the meteoric rise of emerging technologies or the so called More-than-Moore (MTM) class of device technologies, the 200mm and below wafer fabs are seeing increased wafer volume demand and tool utilization rates that are driving the demand for both capacity add and new technology tools alike. While this has proven to be a boon in many respects for equipment OEMs, there are new and existing challenges to be overcome in supporting a growing 200mm market and with that, the increased potential for transition of MTM technologies to 300mm. From technology segment trends, to supply chain inventory, impact of new vs. used on price and delivery times, device technology transitions, to presenting the value of wafer size migration. This presentation outlines and discusses some of the challenges faced by Applied Materials’ 200mm EPG as it navigates the pitfalls and opportunities in rapidly changing legacy semiconductor equipment market place.

Biografie
Rossella Mininni is the Strategic Marketing Manager within the Applied Global Services division of Applied Materials. Her primary responsibilities include market sizing and forecast activities for the More than Moore (MtM) segment. In 2000, Rossella joined Applied Materials in Agrate, Italy as a Process Engineer supporting ST Microelectronics. In 2005 she transferred to Applied’s Silicon Systems Group (SSG) in Santa Clara, California, serving in several positions including Customer Account Technologist for Chemical Vapor Deposition (CVD), Customer Technical Program / Product Manager for CVD and Etch and SSG Product Portfolio Manager. Rossella studied chemistry at the University of Bari, Italy, where she received her Masters degree in Plasma Chemistry in 2000.

Wide Bandgap Power Electronics: What Will it Take for Large Scale Adoption?

Britz, David Alexander
Business Development Manager
Applied Materials

Abstract
New materials frequently face "the chicken or the egg" problem. Until there is sufficient scale of a material's usage, there is little incentive for supply chain manufacturers to invest in unique process tools. Applied Materials will review our perspectives on barriers to adoption of wide bandgap materials for power electronics and what would be required for large scale adoption of these materials.

Biografie
David Britz is a Business Development Manager at Applied Materials in the Office of the CTO. He has held various roles in the optics, and optoelectronics industry. David received an MBA from MIT Sloan and a D.Phil. in Materials from the University of Oxford.

Next generation metrology obstacles will be overcome by MDM (Multi-Dimension Metrology)

Uziel, Yoram
Tecnnology Director
Applied Materials

Abstract
The metrology equipment developers need to prepare new technologies to deal with the following major issues: - A need to accurately measure objects of just a few nanometers with sub 1 nanometer accuracy - An ability to extract signals from under-layers to reveal hidden defects and to characterize hidden elements in the upcoming, complex 3D structures - An ability to detect materials with a small sample, having a sensitivity of just a few atoms In addition to the above requirements, our metrology equipment need to perform this task at an acceptable throughput X CoO (cost of ownership) The MDM concept will be assessed in a few consortia. The idea is to overcome the difficult requirements by smart, rapid metrology data collection, from both in-line and off-line equipment, in order to generate a reliable process control indication which will comply with nano-electronic production requirements. The lecture will describe the difficulties and possible paths to the solution.

Biografie
Yoram Uziel is a technology Director at Applied Materials, IPC/PDC group. He has a BsC in mechanical engineering and an MsC in business management. Yoram has more than 30 years of semiconductor metrology equipment experience and more than 20 related patents.

Interconnect Technology Trends for Single Digit Nodes

Naik, Mehul
Principal Member of Technical Staff
Applied Materials Inc

Abstract
Interconnect resistance is the one of the most critical high value problem for CMOS scaling. There is nice little trade-off between resistance scaling, good metal fill and reliability. We will explore the challenges and options for extending Copper metallization from the perspective of these trade-offs. Beyond Cu, resistance scaling will be driven by conductors that have mean free path lower than that of Cu; which promise larger conductor volume and better reliability. We will take a close look at the leading candidates and summarize the state of the art.

Biografie
Mehul Naik is a Principal Member of Technical staff with the Advanced Product Technology Development team in the Transistor and Interconnect Group at Applied Materials Inc. He is responsible for the Interconnect Program and serves as a cross-functional owner of Applied’s interconnect roadmap. Mehul has over 20 years of experience in the Interconnect space where he has authored over 45 publications and holds 50 U.S patents on various topics including Cu and alternate metallization, CMP, selective deposition, process flows, low k integration, and double patterning. He currently serves as program committee member on the International Interconnect Technology Conference(IITC) and Advanced Metallization Conference(AMC). Previously, he has served as the Chair for the Back-End Processes Technical Advisory Board, and was a member of the Interconnect and Packaging Sciences Science Area Coordinating Committee in Semiconductor Research Corporation. Mehul holds a Ph.D. in Chemical Engineering from Rensselaer Polytechnic Institute.

Sprey, Hessel
Manager External R&D and Cooperative Programs
ASM International

Biography
Hessel Sprey received his M.Sc. in experimental physics from the University of Leiden (The Netherlands) in 1989, and joined ASM in 1990. He has been active in equipment and process R&D at various ASM locations for almost all of ASM product lines, since 1996 in project and team leader positions. He has been project and workpackage leader for several European projects, is (co-)author of more than 60 scientific papers and conference contributions on deposition processes, equipment and applications, and holds 12 patents and patent applications. He is currently responsible for the coordination of ASM's External R&D activities and cooperative programs.

Batch ALD and CVD Nanolayers for More than Moore Devices

Zagwijn, Peter M.
Senior Technical Product Manager
ASM International N.V.

Abstract
The emerging era marked as the Internet of Things shows increasing demand of so-called More than Moore (MtM) devices. They find numerous applications, including sensing and detecting in the consumer, health, lifestyle, and automotive markets. In this paper we report on Atomic Layer Deposition (ALD) Technology and Chemical Vapor Deposition (CVD) Applications that enable development of novel MtM devices. ALD Metal Oxide films with high performance parameters such as excellent barrier properties are reviewed. ALD Metal Nitride films form the basis for electrodes that need to be deposited in high aspect ratio structures. We have characterized the capability of selected ALD processes to deposit highly conformal films on 3D structures at low temperatures. Other ALD and CVD dielectrics that modify strain in resonators and MEMS devices are also discussed. All ALD and CVD nanolayers are developed on high productivity platforms for both large and small wafer sizes, to match the low cost manufacturing environment required for the MtM device markets. Examples of device applications discussed include light output enhancement layers for LED components, high sensitivity Gate stacks in Bio-MEMS detectors, improved adhesion layers for TSV metals in MEMS, and High Voltage Gate Dielectrics for III-Nitride Power Devices. Keywords—ALD; CVD; MEMS; Internet of Things; More than Moore; GaN Power; LED

Biografie
After receiving his PhD degree in Physics and Mathematics from the University of Amsterdam in 1993 on Ga Delta-Doping Layers in Silicon, Peter Marc ZAGWIJN did Post-Doctoral research at the FOM-Institute of Atomic and Molecular Physics in Amsterdam in cooperation with Philips Research Laboratories on Model Systems for Scandate Cathodes. He joined ASM in 1996 in Research and Development and as a Principal Process Engineer worked on a suite of Nanolayer Applications on 150mm, 200mm and 300mm wafer sizes. After 8 years in R&D he specialized in the Technical Marketing of Advanced Applications for ASM’s Thermal Products Platforms, currently as a Senior Technical Product Manager. He holds 4 US patents and has (co-)authored more than 30 scientific papers all on the structure and growth of Nanolayers.

How to dice Molded WLCSP's ?

Boulanger, Richard
Managing Director
ASM Pacific Technology

Abstract
HOW TO DICE WAFER LEVEL CHIP-SCALE PACKAGES THAT HAVE BEEN MOLDED TO INCREASE RELIABILITY ? Richard Boulanger, Jeroen van Borkulo, Eric M.M. Tan. ASMPT Laser Separation International B.V. Beuningen, The Netherlands RBoulanger@alsi.asmpt.com ISSUE The introduction of Wafer Level Chip Scale Package (WLCSP) has become one of the key packaging solutions in the semiconductor industry. One of the key innovative package solutions is the Molded Wafer Level CSP (m WLCSP) due to the robust 5 side or 6 side protection of the devices with epoxy mold compound (EMC) This application enhances reliability of the package by reducing chipping and handling damage and improving board level reliability. This paper will address the challenges of dicing m WLCSP’s while ensuring the dies are individually encapsulated to prevent delamination. SOLUTION The demand for molded wafer level chip scale package (m WLCSP) has experienced a significant growth due to the large demand in the mobile phones , wearable technology and automotive markets. The challenging demands of m WLCSP technology require more dies per wafer. As a result, street lane design has to be narrower and allow a sufficient amount of mold compound to remain on the sidewall of the devices. Blade dicing is the Process of Reference for WLCSP but the demands for a more narrow dicing kerf in m WLCSP are too challenging so Laser Dicing is now being explored Multibeam laser dicing will allow the distribution of the laser power into uniform low spot energy to create more narrow dicing kerfs and higher speeds. There are many new challenges such as the coating adhesion, filler size and the wafer alignment. The epoxy material has very unique adhesion properties and coating , materials needed to be optimized The typical coating material had to be modified to improve the adhesion to the Mold Compound and coverage around the Solder Bumps. The filler size needs to be carefully chosen as it affects both kerf width and speed. The filler material is made of fused silica which is evaporated during laser processing and the holes left behind can cause “mouse bites ”on the top and bottom kerf as well as leave a sidewall with multiple craters. Since the wafer is covered with Epoxy, the alignment becomes more challenging. The typical process would remove the outer mold material to expose the wafer and the half cuts done by the Blade Dicing. The machine alignment would then move around the edge to first recognize the crossings and then correct for alignment and then verify before starting dicing Another method being considered is Illumination through the backside of the wafer that needs to transmit through the dicing chuck , the Silicon Wafer and the Mold Compound to a specially equipped camera to capture the information. There are technical challenges to design an optical path that can share an alignment camera and a laser to allow live kerf check. CONCLUSION The m WLCSP package is increasing in popularity due to the demands of increased reliability for the automotive and mobile markets. Several companies are working to develop a mature process which should happen in 2017. This process will include laser dicing instead of blade dicing and has to overcome several challenges that are addressed in this presentation.

Biografie
Richard Boulanger, Managing Director and Vice-President, ASM Pacific Technology, Netherlands rboulanger@alsi.asmpt.com Biography: Richard Boulanger graduated from Ecole Polytechnique at the University of Montreal in Industrial Engineering. He worked at IBM in Bromont, Canada at their Semiconductor Assembly and Test Facility. Over the course of 18 years, he worked in several functions such as Site Quality manager, Memory Business Unit, Sales Director and Strategy Director as well as some assignments in Corporate Headquarters in the USA. He moved to Binghamton, NY as Vice President of a newly formed Business Unit to design, build and sell Flip Chip machines based on a proprietary Linear Motor technology to achieve world class accuracy. He was also responsible for the SMT Process labs in China and the USA. He then went to Switzerland to become the Die Bonder Vice President of Kulicke and Soffa and Managing Director of the newly acquired company Alphasem. Following a short stint as Chief Operating Officer for Synova he became CEO of ALSI in the Netherlands which was then sold to ASM Pacific Technology where he is now the Managing Director of ALSI B.V.

Progression of Moore’s law

List, Frans
Senior Project Manager Strategic Technology Program
ASML

Abstract
In this session the cooperation between industry, SME’s, research institutes and academia in development of next generation semiconductor technologies will be covered. It provides an overview of the results and challenges in enabling 10nm, 7nm and 5nm technology nodes and thereby continuing Moore’s law. Technology areas addressed are Lithography, Metrology, Processing and Mask Infrastructure. The work is supported under the ECSEL Joint Undertaking, projects; E450LMDAP, SeNaTe, TAKE5 and TAKEMI5.

Biografie
Frans List works currently for ASML as Seniors Project Manager Strategic Technology Program. He received his Master degree in Electronic Engineering from the University of Twente, the Netherlands in 1984. Ever since he has been involved in semiconductor product development in roles varying from Integrated Circuit Design, Project-, Program- and R&D management with professional engagements in the Netherlands, England, Italy and Taiwan, leading product development projects, teams and development departments in Philips Research, STMicroelectronics and NXP. In the past he setup and coordinated industrial consortia collaborating on Non-Volatile Memory technology development in European context as part of Medea and Medea+ programs.

Metrology in the context of holistic lithography

Ottens, Jeroen
Product System Engineer
ASML

Abstract
As the requirements for Overlay, Focus und CD uniformity continue to tighten we present the approach by ASML to address those requirements by actively implementing the holistic lithography approach. This approach is based on three key pillars, which are the lithographic scanner itself with a large number of adjustable parameters, the ability to model and predict the scanner performance under different conditions and the availability of accurate and precise metrology for the parameters of interest. In this presentation we show examples of how the combination of these capabilities leads to solutions to advanced process challenges.

Biografie
Master Mechanical Engineer, graduated in 1997 Work history 1997-1998: Mechanical analist for VIRO Engineering 1998-1990: Senior Designer at The LEGO Group 2000-2005: Mechanical analist at ASML 2005-2007: Overlay system engineer at ASML 2007-2010: Waferstage system engineer at ASML 2010-2017: Product system engineer at ASML (of which the last 2 years for Yieldstar)

ASML extends the lifetime of the PAS platform to serve the needs of the 200mm IOT industry

van Aken, Rik
Head of Products & Services - ASML Mature Business Line
ASML

Abstract
The lifetime of the PAS 5500 platform will be extended with another 8 years to the 2030 to serve the needs of our customers in the IOT industry to maintain & extend their 200 mm factories in the most cost-effective way. An extensive program has been set-up to re-design parts, modules & racks of the PAS systems to be able to continue refurbishment and service activities until 2030. This includes as well a major new initiative to extend & adapt the service portfolio to the current & future needs of our customers and to add new productivity and overlay options to our product roadmap, including mid-life upgrades.

Biografie
Rik van Aken is Head of the Products & Services department within the ASML Business Unit Mature Products. He is responsible for product management and marketing activities for the systems, options and services portfolio. Rik has an extensive experience in product management, marketing and business development in multiple industries including Semiconductor, Automotive and Telecoms. He graduated as electrical engineer from the Eindhoven University of Technology and completed an MBA degree at Webster University.

Melvin, Cassandra
Global Product Manager, Semiconductor Advanced Packaging
Atotech Deutschland GmbH

Biography
Cassandra Melvin received her BS in Business Management and Neuropsychology at Rensselaer Polytechnic Institute and is Global Product Manager for Advanced Packaging at Atotech Deutschland GmbH. She is responsible for a rather extensive product portfolio that includes processes for both electrolytic and electroless plating of copper, nickel, tin, palladium, gold, and indium in advanced packaging applications. Prior to joining the Atotech team, she held the position of Business Manager at the SUNY Polytechnic Institute (formerly the College of Nanoscale Science and Engineering) focusing on Technical Programs for semiconductor chemistry and equipment. Cassandra has had numerous articles published in leading technical magazines and her work has been presented at key conferences globally. She is a member of the SEMI Materials and Power Electronics Committees. Additionally, she currently serves as Deputy Country Director, Germany for the Digital Leadership Institute, an international NGO whose global mission is to promote digital inclusion for women.

Direct electroless under bump metallization (UBM) for wire bonding and soldering on next generation power semiconductor materials

Walter, Andreas
Team Manager Electroless Processes
Atotech Deutschland GmbH

Abstract
Direct electroless under bump metallization (UBM) for wire bonding and soldering on next generation power semiconductor materials The presentation will show benefits and feasibility results for electroless plating direct on GaAs, GaN, SiC for next generation packaging in growing power electronics industry. Compared to Si and Ge, these wide band gap materials allow the design of smaller and faster power components with higher reliability and more efficiency. Furthermore, they enable operations at higher temperature, voltage and frequencies, which is necessary for many power applications. Although these materials already gaining more acceptance for new markets, they face some challenges, such as new packaging and design technologies, to become more cost efficient. One solution is to reduce packaging process steps by direct UBM on semiconductor material prior to soldering and wire bonding, which makes sputtering of Al and Cu pads obsolete. Further advantages are 1) higher throughput due to batch and double side processing, 2) self-aligned deposition without patterning and 3) reduced power losses due to low voltage ohmic metal-semiconductor contact after annealing. We will present our proven results that it is possible to deposit electroless Ni on GaAs or Si with different types and levels of dopings. In addition, we will show the feasibility of direct electroless plating on next generation power semiconductor materials, such as SiC, Ge and GaN.

Biografie
Andreas Walter has more than 18 years’ experience in semiconductor industry and is currently working as head of application for electroless plating processes for Semiconductor Advanced Packaging at Atotech. Before he joined Atotech in 2009 he worked 3 years as an Senior Engineer at Qimonda for process integration for new memory systems and 7 years as a Development Engineer at Infineon, where he was responsible for material development and process integration in 300 and 200mm fab for D-RAM and resistive memories. Andreas received his Diploma and PhD in chemistry at the Martin Luther University in Halle, where he started as a scientist for synthesis of OLED dyes and organic semiconductors

Additive impact on Cu microstructure for sub 10µm L/S

Beck, Thomas
Global Business Manager, Semiconductor Advanced Packaging
Atotech Deutschland GmbH

Abstract
Next generation devices require decreasing the RDL pitch down to 2x2µm. Redistribution layers are essential to a variety of packaging technologies, as it is with more RDLs that I/O density is increased. A higher I/O density 1) provides more physical connections to the PCB, enabling better heat flow, which is critical to thermal performance; 2) enables improved electrical performance, as more outputs results in faster electrical signals between die; 3) allows the package to perform more operations in parallel due to the presence of more electrical pathways. In sum increasing the I/O count allows for more complex, high speed die to be packaged and facilitates improved reliability performance. Successful formation and plating of such fine features, however, pose a challenge for both suppliers and manufacturers, with the primary plating challenge being the simultaneous plating of ultra fine L/S, large Cu pads, and filling of microvias with a deposition rate that optimizes throughput. Additionally, the mechanical properties and impurity requirements for the Cu deposition become more difficult to control and optimize with sub 10µm L/S: 1) large grain, polygonal Cu crystal structure for high ductility – which may influence the prevalence of cracks in the metal lines – and low resistivity which impacts electrical performance; 2) low internal stress for minimized wafer warpage and good adhesion – both of which impact yield; and 3) low organic co-deposition for minimized microvoiding. Electroplating with standard Cu electrolytes results in microvoiding that amass after thermal cycle testing and may lead to failures or breakages in the Cu metal lines. To overcome this, the bath conditions, additives, and current density should be adjusted to optimize their influence on the deposit properties in terms of impurities and grain size. This paper will discuss how additives on the molecular scale impact Cu microstructure and will present plating results achieved with a new electrolyte.

Biografie
For the past seven years, Thomas Beck has managed and grown Atotech’s Semiconductor Advanced Packaging division. His primary responsibilities include the management and execution of all activities and objectives related to R&D, process development, integration and introduction of new technologies, global marketing and sales strategies, among others, for both ECD and electroless processes. Previously he held the same position for a different technology division within Atotech, called Surface Finishes. As Business Manager for Surface Finishes, he led many projects to market success.

Embedding for Power Application and Fan-out Packaging at Panel Level

Stahr, Hannes
Groupmanager Technology
AT&S

Abstract
Embedding is without any doubt the key driver for advanced packaging. This has been shown over the last years. Miniaturization is the general unbroken trend in electronics and it looks for a big variety of technical solutions coming from the different main streams of packaging. A new hype was pushed up when TSMC showed their new fan out package solution for the A10 processor in Apple’s iPhone 7. The whole supply chain has reacted by developing materials, equipment and methodologies to support fan-out packaging to catch a piece of this attractive cake. In this field of expectation Fraunhofer IZM has built a consortium for panel level packaging with a focus on panel level molding. This consortium in the meantime has 16 members which are material suppliers, process and machine suppliers, PCB and substrate makers and a big silicon house. In this presentation the latest developments of this consortium and further interesting project results from IZM will be reported. Power application is another field for embedding technologies starting with DC-DC low power converters years ago in AT&S. New concepts with low thermal resistance and low inductance are developed and the industrialization was started. These concepts have been developed in the frame of the Catrene project EmPower which ended this year. The performance of these concepts and power applications will be shown in this presentation furthermore there is a view on the market potential for embedded power application. Authors : Andreas Ostmann , IZM Hannes Stahr , AT&S

Biografie
Hannes Stahr • He studied electronics and telecommunication engineering at the University in Graz and received his diploma in 1988 • He works as a group manager technology in the R&D of AT&S and was deeply involved in the most recent developments for HDI PCB • Since 1997 his focus area is component embedding in PCB staring with printed passive components • In 2008 he guided the FP7 project Hermes to success which resulted in the industrialization of the chip embedding technology und later to the foundation of the business unit Advanced Packaging in AT&S • The Catrene project EmPower was started in 2013 focusing on the development of embedded power modules and power packages using new embedding and power module concepts. He is the consortium leader of EmPower and will report in his speech about the progress. • He is author and co-author in 21 filed patent families for PCB and advanced packaging

GaN High Electron Mobility Transistor (HEMT) defect inspection by high resolution quantitative cathodoluminescence

Sonderegger, Samuel
CEO
Attolight AG

Abstract
Gallium nitride based high-electron mobility transistors (HEMTs) face an increasing demand for various applications such as cellular base stations, Lidar, wireless charging and the power supply segment. Gallium nitride has a number of advantages over Silicon such as a wide direct bandgap of 3.49eV, a break down field ten times larger than that of Silicon and a good electron mobility in bulk and heterostructures. These attributes make GaN and related alloys a compelling material for HEMTs. Nevertheless, integrating GaN based semiconductors on a silicon platform remains challenging due to a large lattice mismatch between GaN and Silicon. This mismatch yields to a high density of defects propagating through numerous layers of the device. These defects need to be analysed and understood during the research and development phase and need to be monitored and controlled during ramp up and production. We use quantitative cathodoluminescence to analyse a cross-section of a GaN-based HEMT. High spatial resolution spectroscopic information might be acquired by exploiting cathodoluminescence combined SEM. CL provides information about the electronic bandgap, variation of local concentrations of elements, strain and defect states in semiconductor heterostructures and insulators at the nanometer scale. We gain a direct insight into the presence of defects within the insulating C-doped GaN layer, and the homogeneity of thin AlGaN layers of varying Al content, emitting CL signal in the deep UV range. CL imaging clearly highlights the presence of defects across the insulating C-GaN, as well as highly localized CL emission from AlGaN layers. Further spectral processing allows characterization of local strain between layers with varied Al stoichiometry, determination of bandgap evolution, as well as characterization of Al content in each layer within 1% precision.

Biografie
Samuel studied at EPFL (Swiss Federal Institute of Technology, Lausanne) and Ecole Normale Supérieure de Lyon (France) and obtained a MS of Physics from EPFL. His master thesis on the optical properties of semiconductors was conducted at the Ioffe Physico-Technical Institute (Russia). During his PhD at EPFL, he further developed Attolight's ultrafast cathodoluminescence technology and used this technique to advance the understanding of optical properties of nitride based semiconductors. Samuel decided to jump into the entrepreneurial world after his PhD thesis and co-founded Attolight with Jean Berney. Since then he has headed the business development of the company with a strong focus on developing industrial applications of cathodoluminescence.

The Future of Mobility and Mobility of the Future – potentials and implications due to more powerful Automotive electronics

Blum, Andre
Project Manager Progressive Semiconductor Program
AUDI AG

Abstract
The value share of electronics in Automotive is increasing and will rise even more in the next decade. An outlook is given onto the manifold possibilities emerging with the next generations of Automobiles. Conventional Automotive electronics requirements do no longer fit for unprecedented use cases of the future. This can be considered as a threat or as a chance…

Biografie
Dr. André Blum joint Audi in 2004, starting as a developer for EMC capabilities of ECUs. In 2008 he finished his PhD work in electrical engineering (power electronics). In the following years he managed several projects and small teams in different production departments. Since the beginning of 2016 Dr. Blum is a team member of the Audi Semiconductor Strategy and works with semiconductor companies on a daily basis. Dr. Blum was promoted to Audi Management in 2015. Based on his long history within Audi, working in the product development as well as in the production & logistics and production planning divisions, Dr. Blum is an expert in automotive electronics as well as in industry 4.0 electronics.

Connected Vehicles – Part of the connected world and foundation of the 3d living space

Strugala, Michael
Senior Expert
Bosch Management Support GmbH

Abstract
Since vehicles got connected by cellular technology associated services, so called “connected services” are of key interest to vehicle users, automotive industry, internet service providers and other stakeholders of the internet. Consumers, who are familiar with service offerings by smart phones and spend an ever longer time of their day in their vehicles, request similar kind of applications in their car to support their daily work and empower their leisure activities with safe, comfortable and reliable services. Besides passenger cars there is an attractive area for fleet managers and logistic providers with commercial vehicles, who typically look for services optimizing the Total Cost of Ownership (TCO) of the vehicle or vehicle fleet. Finally, due to connected vehicles and exchange of data between vehicles and infrastructure, new possibilities of traffic management and multi-modal traffic scenarios become reality increasing safety, flexibility and comfort of individual mobility. This presentation wants to give an overview on the various opportunities of connected services, starting not from the technological drivers but more from the user point of view. Therefore we would not like to focus on technology first, but create an overall view on driver and passenger requirements, including private as well as commercial users, stretching from leisure to work scenarios. Based on this user centric view specific examples for services will highlight the vehicle becoming part of the connected world and forming the 3rd living space. Such examples at the end will give chance to focus on some technological challenges, like security issues or automated driving.

Biografie
Starting his career at Robert Bosch Group in 1988 Michael Strugala took responsibility for development and engineering functions in various business divisions of Bosch comprising semiconductor design, telecommunications, navigation and safety systems. Most recently from 2010 until 2016 he was responsible for the project Car-2-X-Communication and Connected Vehicle in the Car Multimedia division of Robert Bosch GmbH. The project developed and evaluated concepts and infrastructure set up for connected services together with the divisions of the Bosch Mobility Business Division. This included demonstrators and their development by means of agile development approaches like scrum and pilot projects with selected partners. Since beginning of 2017 Michael is retired, but works as a Senior Expert for Bosch Management Support GmbH supporting Bosch Mobility Business Divisions in select-ed topics of data access to vehicles and associated acquisition strategies. Michael was born in Dortmund 1956. He studied Electrical Engineering at the University of Dortmund and finished his diploma thesis in 1982. 1988 he received his Ph.D. from Johann-Wolfgang Goethe University, Frankfurt am Main for his work on VLSI-Integration and Application of associative SIMD computer architectures.

Environmental sensing in the IoT – for a better quality of life

Finkbeiner, Stefan
CEO of Bosch Sensortec
Bosch Sensortec GmbH

Abstract
As the IoT began to emerge, more and more devices have been developed with the purpose of making our lives more comfortable and more exciting – in short: IoT is about improving the quality of life. MEMS sensors are a key technology for the IoT by enabling things to be sensed and connected in all parts of our daily life, such as our homes, vehicles, and cities. A substantial factor that is closely related to the quality of our life are the environmental conditions in our homes and cities. Especially the indoor air quality has a strong impact on our health. In his speech “Environmental sensing in the IoT – for a better quality of life”, Stefan Finkbeiner is going to explore the ways in which environmental sensing can contribute to a better quality of life in the context of the IoT. He will touch upon the challenges of our daily well-being by demonstrating real life examples of how to overcome these risks with the help of MEMS environmental sensing technology.

Biografie
Dr. Stefan Finkbeiner CEO and General Manager of Bosch Sensortec GmbH Stefan Finkbeiner was born in 1966 in Freudenstadt, Germany. He received his Diploma in Physics from the University of Karlsruhe in 1992. He then studied at the Max-Planck-Institute in Stuttgart and received his PhD in Physics from the University of Stuttgart in 1995. Dr. Finkbeiner was appointed as CEO of Bosch Sensortec in 2012, having previously served as General Manager and CEO of Akustica Inc, a Bosch Group company which develops MEMS microphones for consumer electronics applications and is located in Pittsburgh, PA, USA. Dr. Finkbeiner joined Robert Bosch GmbH in 1995 and has been working for more than 20 years in different positions related to the research, development, manufacturing, and marketing of sensors. Senior positions at Bosch have included Director of Marketing for sensors, Director of Corporate Research in microsystems technology, and Vice President of Engineering for sensors. In 2015 Dr. Finkbeiner was recognized with the prestigious lifetime achievement award from MEMS & Sensors Industry Group.

Inline Wafer Edge Inspection - Start-Up Pich - Innovation Village

Priewald, Robin
CTO
Bright Red Systems GmbH

Abstract
Company tagline We develop an Inline Wafer Edge Inspection Metrology to be integrated into semiconductor production equipment for saving inspection time, optimising processes and increasing yield. Elevator Pitch While the semiconductor industry is growing it faces big challenges to reduce production losses of ~12 billion $ each year due to broken wafers. Our patented and fully automated Inline Wafer Edge Inspection helps to optimise processes and to enhance yield while simultaneously reducing inspection costs. Target Market / Customers Wafer Edge Screeners of BRS support semiconductor and equipment manufacturers to increase yield through Inline Wafer Edge Inspection. By profiling the wafer edge thickness, during common wafer pre-alignment processes, precious inspection time is saved and production processes and equipment responsible for wafer edge defects can be identified immediately. Current Company Stage Pilot installations are now being prepared with lead customers. Funding and future Funding Needs BRS was founded in August 2011 and made a cumulative revenue of 600k€ until the end of 2016. About 2 million € will be invested into the R&D of the patented Inline Wafer Edge Inspection Technology until 2019, when the first pilot installations will be accomplished successfully. The worldwide market introduction of the Wafer Edge Screener will then need another 5 million € until the end of 2022. IP & Freedom to operate Freedom to operate analysis done, patent granted in 2012 (Patent# AT510605) and also filed at the European Patent Office in 2013. Competition & Competitive advantage Competitors in the field of wafer inspection are: Kobelco, Rudolph technologies, KoCos, HSEB and KLA Tencor among others. Instead of integrating inspection metrology into production equipment, all competitors sell stand-alone inspection tools only. For this reason BRS is the first company making automated wafer edge defect detection and classification inline.

Biografie
Robin H. Priewald received the Diplom-Ingenieur degree (MSc) in electrical engineering from Graz University of Technology, Austria, in 2009. He also holds a PhD degree from the College of Engineering, Swansea University, Wales, UK, which he acquired under a KESS fellowship on the topic of numerical modelling of an inverse electromagnetic measurement problem in non-destructive testing of steel structures in 2013. Already during his PhD time, he collaborated with a newly founded enterprise, Bright Red Systems GmbH, on numerical optimisation methods and modelling of a newly patented measurement principle. Since 2013 he took over responsibility for research and product development at BRS GmbH, with focus on optical measurement for quantitative characterisation of geometrical object edge features, particularly for edge inspection in the semiconductor industry.

X-ray Metrology: Challenges and Solutions in the 3D era

van der Meer, Juliette
Head of X-ray Application Development
Bruker

Abstract
X-rays are non-contacting, non-destructive and suitable to probe 3D nanoscale features. Therefore, X-ray metrology is used in multiple processing steps for finFET logic and 3D memory structures, providing information on critical dimensions, film thickness, strain and composition. High Resolution XRD (HRXRD) works from first principles and thus no standards are needed. It is a powerful technique to determine strain in epitaxial layers. Microspot measurements are enabled by the latest advances in brilliant small spot X-ray sources and detector technology. µXRF is a volumetric method. It measures atoms, regardless the complexity of the shape. It is capable to measure the thickness of (ultra-)thin films and also the sidewalls around fins. Crystalline defects in the substrate can cause cracks and slip. The latter is problematic and may lead to yield loss, because the overlay budget is continuously decreasing due to multiple patterning schemes. Cracks can eventually cause wafer breakage. XRD Imaging (XRDI) detects defects through the wafer. Bruker offers metrology platforms for all introduced X-ray technologies.

Biografie
Juliette holds a MSc in Geochemistry –direction igneous petrology (2003) and a PhD in Thermodynamics –on molten nuclear fuel salts (2006) from Utrecht University, Netherlands. Then she took a swing. Via a post-doctoral research project on porous silica using various X-ray measurement techniques at CEA Marcoule in France she moved to the field of X-ray metrology for semiconductors in which she works since 2008. 2008-2015: Bruker AXS, Karlsruhe, Germany. Application scientist XRF and thin film metrology 2015-present: Bruker Semiconductor, Karlsruhe, Germany. Head of X-ray Application Development and Product Manager TXRF

Silicon and Wide bandgap devices in power electronics

Udrea, Florin
Professor
Cambridge University

Abstract
The view that Silicon will be replaced by wide bandgap materials such as Silicon Carbide and Gallium Nitride is gradually giving way to the idea that Wide bandgap materials will in fact coexist with silicon to address a growing market in power electronics with increasingly more demanding requirements. Silicon will remain the main material in power electronics for a long time to come. Its strength is not in performance, but in reliability, diversity, cost and smartness. The high end and specific niche markets will however embrace GaN and SiC. GaN is likely to create a larger impact in the lower power range with voltages up to 1.2 kV, while SiC will address the higher voltages (above 1.2 kV) and higher power levels. On paper Diamond is better than any other materials for power electronics and will have its chance in the future provided that there is enough investment from public funds. Its struggle now is to deal with the cost, wafer availability and availability and the lack of shallow dopants. This presentation will address the strengths and weaknesses of the different materials and technologies and present a view of how this material will play in the power device field in the future

Biografie
Florin Udrea is a professor in semiconductor engineering and head of the High Voltage Microelectronics and Sensors Laboratory at University of Cambridge. He received his PhD degree in power devices from the University of Cambridge, Cambridge, UK, in 1995. Prof. Udrea has published over 450 papers in journals and international conferences. He is the inventor of over 100 patents and co-funded 5 companies, three in power devices and two in sensors. Two have been among the most successful trade exists as Cambridge University spin-offs. For his ‘outstanding personal contribution to British Engineering’ he has been awarded the Silver Medal from the Royal Academy of Engineering. In 2015 Prof. Florin Udrea was elected a Fellow of Royal Academy of Engineering

Ligands as Surfactants in CVD and ALD: Making and Modifying Metal Surfaces

Barry, Sean
Professor
Carleton University

Abstract
Controlled deposition of metal films is important for many interesting applications, including microelectronics, as well as substrates for graphene fabrication, SERS and photochemistry. Deposition from the vapour phase offers superior control over purity and size of deposited metal structures, including films. However, shape control from the vapour phase remains a challenge. Precursor compounds for chemical vapour deposition (CVD) and atomic layer deposition (ALD) can influence the shape of deposited metal structures and surfaces: computational studies show that a coordinative ligand can dissociate from the precursor and act as a surfactant, controlling saturation of the surface and nucleation of metal-bearing moieties. When applied in practice, a deposited metal surface can be controlled by judicious choice of surfactant: saturated N-heterocyclic carbenes are superior to phosphine when applied to a gold surface as surfactants, and produce smoother and more well-controlled crystalline surfaces. This concept can be extended to using free bases in the gas phase to limit surface growth and nucleation. Indeed, tetrahydrothiophene was used recently to form monolithic, single gold features with up to 20 square micron (111) plateaus. The design and choice of coordination ligands in metal-containing precursor compounds will be discussed, with emphasis on their role as a surface-controlling surfactant. Examples of CVD and ALD deposited films will be given, and computational modeling of surface chemistry will be presented.

Biografie
Seán Barry is a Full Professor at Carleton University, Ottawa, Canada), where he works on precursor compounds for atomic layer deposition (ALD). Seán was trained in inorganic synthetic chemistry by Darrin Richeson (PhD, University of Ottawa, 1996), and spent three years working on chemical vapour deposition (CVD) and ALD precursors in the group of Roy Gordon (PDF, Harvard University, 1998 – 2000, 2002 -2003). He was instrumental in the design and synthesis of the well-known copper amidinate dimers that are presently used for copper CVD/ALD. He started in Carleton University in 2003 working on guanidinates of the group 13 metals (Al, Ga, In), and has recently studied guanidinates, iminopyrrolidinates and carbenes of the coinage metals (Cu, Ag, Au) for depositing thin films of these metals. His group works mainly on the mechanisms of thermal decomposition and thin film deposition, and have invented several novel characterization methods to better understand mechanism. He was previously the founder and Senior Scientific Advisor for Precision Molecular Design, a start-up company with GreenCentre Canada to commercialize precursors for atomic layer deposition. Seán is also the director of the Facility for Nanoscience, Surfaces, and Sensor Interfaces (FANSSI), which was commissioned in 2015 by a $1.9M Canadian infrastructure grant to study surface chemistry and ALD. He is recognized as a world expert in metal ALD and precursor design. He has long-standing and extensive industrial collaborations in ALD, including Applied Materials, Air Liquide, the Royal Canadian Mint, and BASF, to name a few. He has over 50 papers and 6 patents and patent applications in ALD precursor and process design:4 of the patents were established while an independent researcher at Carleton. In 2012, he was awarded a Marie Curie Fellowship as part of the EU-funded European Research Training Network ENHANCE to undertake metal ALD at the University of Helsinki, and in 2015 he was awarded a $295k Vinnova VINNMER Mobility grant to undertake CVD/ALD research in Sweden.

SmartEEs, a “Sustainable Marketplace for the Adoption, Ramp-up and Transfer of Emerging Electronics Solutions”

GAVILLET, Jérôme
EU programs Manager
CEA

Abstract
The market for organic & printed electronic products is growing at a high level (BUS$ 23-24 in 2014) with predicted annual growth rates of 20 % in all fields. Although the use of OLAE in products is still limited and only have been commercialized by large corporates, the number and type of products has grown significantly. These emerging markets are a huge opportunity for the EU industry. But EU small & mid-size companies have had only a limited access to technologies and often lack the capabilities needed to benefit from OLAE. These include the ability to fully understand the technological implications and the related business implications. They need support in the translation of the OLAE technologies into innovative products, assessing potential markets, finding investors, developing new business models and creating the right partnerships to optimally benefit from OLAE opportunities. SMARTEES will be the Digital Innovation Hub dedicated to OLAE, an organized European innovation network that provides both access to competencies and business support for innovation adoption. SMARTEES will help the European industry to create a competitive advantage within the global economy by providing access to disruptive OLAE technologies and innovation support in a pragmatic, operative and efficient pan-European manner. A 1-Stop-Shop will be set to establish a collaborative environment and to provide wider access to the technology at the same time as coordinating the bespoke services and efficiently and effectively linking them together. 20 Application Experiments will be conducted to explore the technology transfer into business, organization of cooperation, access to finance, services to be provided and act as showcases to raise awareness and activate potential users. The established eco-system will be harnessed by the consortium to propel the continuity of the initiative beyond SMARTEES. This will include the formulation of a comprehensive business plan as a strategic outcome.

Biografie
Dr. Jérôme GAVILLET received his PhD on material physics & surface processing from l’Ecole des Mines de Nancy (F) in 1996. As a researcher, he worked on hydrogen embrittlement of stainless steels for the petrol industry at the Federal University of Rio de Janeiro (B), on zircaloy alloy coatings for the French nuclear industry and on copper interconnects for the semiconductor industry at the University of York (UK). He spent 7 years in microelectronics working as a process engineer for equipment suppliers in Cardiff (UK), Sunnyvale (US) and Grenoble (F). He joined CEA-Liten in 2005 as a project manager in the field of Renewable Energies and Nanomaterials, working on surface energy and thermal management topics. Since 2012, he works as an European program manager, contributing to the management of CEA-Liten’s EU projects portfolio and setting up new business opportunities in the fields of materials, renewable energies, energy efficiency and information & communication technologies. He has authored 10 patents and over 40 publications.

Perovskite-based Solar Cells Towards Large & Flexible devices

Berson, Solenn
Head of laboratory of organic photovoltaic modules
CEA

Abstract
Perovskite Solar Cells (PSCs) have recently emerged as one of today's most promising upcoming photovoltaic technology. Thanks to a unique combination of attractive features (high efficiency, low-cost, tunable bandgap, etc.) and their potential ease of processing, PSCs have drawn a tremendous research interest over the last few years. Record efficiency has then been quickly increasing and performances over 22% are now achieved. Yet, a number of challenges are still to be met to ensure a bright industrial future for PSCs. While few groups have been able to demonstrate large scale PSCs most of the worldwide current research is indeed focusing on small area lab-scale devices (ca 10 mm² or below). These latter are to a very large extent built on glass using spin-coating as the main fabrication method. No matter how promising their efficiency is, these devices are of course very far from any practical application. We here present the current developments of glass and foiled-based perovskite devices with respective power conversion efficiency of up to 18% on glass and 9% on PET foils. The effect of materials’ nature and processing is first investigated and related to devices’ characteristics. Special emphasis is put on planar low temperature processes (below 150°C) that allow for processing on virtually any kind of substrate especially plastic ones. Some of the issues that have to be overcome when increasing device active area and moving from single cells to serially connected modules are then discussed. Efficiency trend from 13 mm² up to more than 10 cm² is finally presented.

Biografie
Dr Solenn Berson (F) graduated from CPE Lyon, France (Lyon school of Chemistry, Physics and Electronics) with a master degree in Polymer Materials and Composites in 2004. She got her PhD degree in organic photovoltaic field at the Laboratory of Molecular, Organic and Hybrid Electronics, CEA Grenoble, France. After an industrial postdoctoral fellowship at the LIPHT in Strasbourg, she joined the Organic Photovoltaic group, CEA, INES, Le Bourget du Lac, France in 2008 as a postdoctoral researcher and since 2010 as a project manager for architectures and processes of organic/hybrid photovoltaic devices. Since 2013 she is managing the OPV group and since 2014, she is the Head of the Organic Photovoltaic Modules Laboratory.

FEOL Patterning Challenges for Sub 14nm FDSOI Technology

Posseme, Nicolas
Senior Scientist
CEA-LETI

Abstract
Fully-depleted SOI devices (FDSOI) are proven to provide excellent control of gate electrostatics. This makes them a real solution to meet performance requirements down to 10nm technology node. However new architectures such as stacked silicon nanowires will be required to maintain low leakage current when further downscaling gate length. Additionally new materials are required to build transistor channel complying with ON-state current expectations, such as new channel materials such as germanium or compound semiconductors or low k materials at the spacer level. These changes in transistor integration raise quite a number of new challenges for etching and stripping in that they introduce new materials with uncommon properties compared to usual silicon-based devices. Another challenging aspect of device downscaling is the enhanced demand for high-selectivity etch. In spacer definition for instance, maximum allowable silicon recess in source / drain regions is less than 0.5nm for the 14nm node. New techniques are being developed that involve a prior modification of the etched layer down to a controlled depth, followed by the removal of the modified layer selectively to the non-modified material. On the technology side, immersion 193nm lithography has reached its limits in resolution and the most critical levels require costly dual or quad-patterning technique to achieve stringent CD specifications in current 14nm and beyond. Solutions to further expand 193nm lithography capabilities at lower costs are showing promising results, such as sidewall image transfer (SIT) or directed self-assembly (DSA). Nevertheless these newly developed techniques involve process adaptations on the plasma etching side since they induce changes in the masking materials.

Biografie
Dr. Nicolas Posseme is senior scientist at CEA-LETI. He received his Ph.D. degree in microelectronics from the University Joseph Fourier of Grenoble, France (2005). He has worked for LETI in different institutions such as ST Microelectronics, IBM and Applied Materials where he lead several research work in the field of plasma etching for nanoelectronics. He has published over 70 scientific papers and two books on the field of plasma etching, and is holding over 20 patents.

DSA: Progress Toward Manufacturing Readiness

Tiron, Raluca
senior researcher
CEA-Leti

Abstract
Density multiplication of patterned templates by directed self-assembly (DSA) of block copolymers (BCP) stands out as a promising alternative to overcome the limitation of conventional lithography. Using the 300mm pilot line available in LETI and Arkema’s materials, the main objective is to integrate DSA directly into the conventional CMOS lithography process in order to achieve high resolution and pattern density multiplication, at a low cost. In this paper the recent achievements in LETI will be discussed. Thus we investigate the potential of DSA to address both contact and via level as well as line and space patterning, by using the graphoepitaxy of block copolymers. These results show that DSA has a high potential to be integrated directly into the conventional CMOS lithography process.

Biografie
Dr. Raluca Tiron, received her PhD degree in molecular magnetism from University Joseph Fourier France in 2004. In 2005 she integrates Resist Expertise Center at CEA-LETI, working on advanced lithography, process development, resist characterization and mechanisms comprehension in 193 nm lithography. Starting with 2008, her research interest focuses on directed self-assembly (DSA) of block copolymers and she is currently leading this activity at CEA-LETI. She has been CEA-Leti project leader in several national and European projects and she is in charge of industrial collaborations around the DSA. She has authored and coauthored more than 80 papers in international reviews and more than 15 patents.

New materials for More Moore and More than Moore

Martin, François
Senior Scientist
CEA-LETI-Minatec Campus, Univ Grenoble Alpes

Abstract
New processes and materials are emerging to provide possible solutions at the crossroad of MOS scaling and diversification of devices for More than Moore and IOT, including sensors, memories, power devices, RF and optoelectronic devices… New materials like 2D dichalcogenides could provide solutions but promises can become reality if manageable processes can be implemented on large substrates. This talk will discuss our motivation to investigate “green” processes avoiding toxic or corrosive precursors and the solutions brought by organometallic chemistries to promote new ALD or MLD deposition processes. Results on Molecular Doping for semiconductor surface doping and MoS2 (WS2) synthesis by Molecular Layer Deposition will be presented and discussed in a more general frame, aiming to promote manageable solutions for smart materials and interfaces tuning towards sustainable and low cost IOT devices.

Biografie
François Martin, 59 years old, is senior scientist in the Thin Film Deposition team in LETI. He was involved in the past decades on Material research and Developments for Advanced CMOS and memories, including HighK/Metal gate stacks for advanced CMOS. He brought his contribution to the introduction of Atomic Layer Deposition for HighK deposition in LETI and participated to European projects on advanced FEOL developments. His field of interest for several years is the research in emerging materials and processes like Molecular Layer Doping and 2D Dichalcogenide deposition in relationship with academic skills dealing with organometallic chemistry, aiming for sustainable processes and materials availability in future nanoelectronic devices. He was also member of the Emerging Material Section of the ITRS (2006-2014).

GaN for a new compact power converter generation

Bouchet, Thierry
Power Electronic Marketing Strategic Manager
CEA LETI

Abstract
Main goal for the next generation of Power converter is miniaturization in order to improve system efficiency at lower cost. Increasing reliability, operation safety and high working temperature (> 300°C) is also expected by end-users. To reach this target, we need to increase the power converter frequency that lead to a reduction of passive devices and contribute to the power converter miniaturization. For low power and medium power applications, GaN/Si technology is the best candidate if we think it at system level. In fact GaN devices allow high frequency capability (>MHz), high current density (at least 10 time higher than silicon) and new integrated functionality (lateral device) at lower cost as technology is CMOS compatible (8 inches GaN epitaxy on a silicon substrate). Power electronics is a key strategic activity of CEA Tech (French CEA institute). CEA TECH value proposition is a complete chain from design to system integration and optimization of Power converter. Our 5 years Power GaN Road map driven by the frequency increase focus on 6 main technological axes: epitaxy, GaN/Si active devices ,HF passive devices, 3D co-integration, GAN IC and new system topologies. 3 main Milestones related to main technology shift are presented to reach in 5 years the System on Chip approach (SOC).

Biografie
Thierry Bouchet earned his PhD in Electrical Engineering in 2001 and went to work for IBS (Ion Beam Services) and then for Atmel, two semiconductor companies. In 2011, Thierry created a fabless start-up (ADIS) in the area of power electronics. Thierry joined Leti end of 2014 and worked on developing of GaN components before becoming Strategic Marketing manager for energy and power electronics.

Graphene Flagship

Kinaret, Jari
Professor
Chalmers University of Technology

Abstract
In this presentation I will describe the Graphene Flagship (www.graphene-flagship.eu), which is a large scale, ten year research initiative funded by the European Commission together with the EU member states and associated countries. The flagship brings together a very large research consortium of academic and industrial partners from over 20 countries, who work together to take graphene and related materials from academic laboratories to society as new products and employment opportunities. I will briefly describe the project, its goals, evolution and results, with a focus on the electronics domain.

Biografie
Jari Kinaret received his M.Sc. degrees in Theoretical Physics and Electrical Engineering at the University of Oulu, Finland, in 1986 and 1987, respectively, and in 1992 he graduated with Ph.D. in Physics from the Massachusetts Institute of Technology. After a brief stay in Copenhagen, he moved to Sweden in 1995 where he works as a Professor of Physics at the Chalmers University of Technology. His research is theoretical condensed matter physics, and his main interests in the last years have been nanoelectromechanical systems as well as optical properties of graphene. He has been the driving force behind the research initiative Graphene Flagship since 2010, and is the Director of this one billion euro endeavor since the project start in 2013.

Jones, Graham
CEO
CMT Semiconductor Services

Biography
European General Manager for Ablestik Laboratories from 1989 to 2009 when the business was acquired by Henkel. Thereafter until his retirement in 2013, Graham was Sales Director for the Henkel Electronic Adhesive business in Europe, Middle East and Africa. Currently he works for CMT Corporation, headquartered in Korea and acts as an advisor for several Asian Equipment supplies, his main focus being on pressure ovens from APT in Taiwan specifically designed for curing polymers without voids.

Enlarging functionalities - from continuous to pulsed processing - in one plasma etch tool, and for a reasonable budget.

SIMON, Bruno
Hardware Engineer
CORIAL

Abstract
CORIAL is a manufacturer of plasma etch and deposition tools with a focus on the development of process solutions for the specialty semiconductor market. The company specializes in the development of modular, easy to use and reliable tools that makes it easier for their clients to widen their sphere of possibilities and reduce their process development times. RIE, ICP, DRIE, and ALE plasma etch technologies are generally employed in the specialty semiconductor market using adapted process recipes but also different equipment. Pushed by budget consideration and rapid evolution of process requirements, there is an increasing demand from academia and R&D centers for more versatile tools. Looking for enhanced functionality for R&D, CORIAL has demonstrated the capability for an etch tool to support ICP, RIE, ALE and DRIE technologies in the SAME reactor. This presentation will outline some key hardware features such as plasma source, reactor design, and pumping system. CORIAL latest advancements regarding software will also be introduced with a presentation of COSMA Pulse, a process control software capable to control and pulse any process parameter with a minimum pulsation period of 10 ms. The talk, will also be an opportunity to prove the capability of CORIAL’s tool to etch materials in both continuous and multiplexed modes with the presentation of the latest process recipes developed by CORIAL process Team for DRIE of SiC, DRIE of Si, DRIE of glass, ICP of GaN, ALE of Si, back sputtering of metals, and more…

Biografie
Bruno SIMON has over 20 years of experience in plasma etch and deposition tools. He joined the CORIAL team in 2006. After 10 years in R&D with a position of Senior Product Engineer, he changed to sales support, managing since a few months Customer Service within the company. Bruno holds a degree in Material Science from INSA Lyon.

Digital Vehicle - requirements for quality and availability of semiconductors

Zerrweck, Frank
Director Instrumentation & Components
Daimler AG

Abstract
Connectivity, autonomous driving, sharing and electrical drive are key trends in the automotive industry. These trends as well as most innovations in automotive require a lot of computing power, which leads to an increasing amount of semiconductors in the car. Customer’s expectation especially in the infotainment domain is of course to see the same performance as known from consumer electronics. However, semiconductors in a car have to follow special requirements in terms of reliability and life-time in order to ensure comfort and safety. Since semiconductors from consumer devices hardly can be used, most of the semiconductors in a car are special automotive grade, the availability of which has to be ensured over many years - not only the vehicle cycle but also for spare parts.

Biografie
Frank Zerrweck works as director Instrumentation & Components at the RD-Department of Mercedes Benz. Currently he is responsible for the development of infotainment components and architecture as well as for the advance development of the next infotainment generation. After studying electrical engineering at Munich University he joined the Daimler AG in 1993. He has extensive experience in research and development, supplier management, quality and purchasing.

Raithel, Stephan
Director Business Unit Gas Treatment
DAS Europe

Biography
Stephan Raithel successfully completed his studies of Business Administration with a German Diploma degree and a bachelor of arts with honors in 2004. Prior to his career at SEMI he was working for a professional service provider where he was in total responsible for 4 different products focusing on consumer goods, financial services and creative industries. In 2007 he joined SEMI, the global semiconductor trade association, in the Brussels office as Senior Manager Operations where he became a key staff in implementing SEMI Europe’s strategy and enlarging SEMI’s presence within Europe. In 2009 he opened the SEMI branch in Berlin, Germany, where he was acting as Managing Director for SEMI Europe as well as fulfilling the role as a CFO for all European activities. Starting July 2016 he moved to DAS Europe - a globally leading supplier of point-of-use abatement concepts – where he holds the position as Director Business Unit Gas Treatment.

Solutions for thin and tiny dies with high die strength and for thinning WLCSP and eWLB wafers

Klug, Gerald
General Sales Manager
DISCO HI-TEC EUROPE

Abstract
DISCO Corporation is a leading manufacturer for equipment and tools for wafer thinning and dicing. “Bringing science to comfortable living by Kiru (Dicing), Kezuru (Grinding) and Migaku (Polishing)” is DISCO’s mission. By combining these three core technologies, DISCO provides total solutions to meet the more and more demanding requirements of the Semiconductor industry in terms of manufacturing thin dies with high die-strength and several new approaches for advanced packaging. Discrete devices and RFID dies, universally used in smartphones and mobile devices, tend to have narrow street widths (cut margins), partially covered with low-k and ultra low-k layers, in order to maximize the number of dies formed on the wafer. Furthermore, mobile and IoT consumer products incorporate an ever-increasing number of such circuit components. With low-k and ultra low-k layers on top, singulation processes become challenging. In addition parts of these applications require the use of DAF-layers on the backside of the dies. In order to fulfil all these requirements, DISCO proposes several solutions, also focusing on avoidance of side wall cracks and interfacial layer damages, such as Dicing before grinding, Stealth dicing, Reverse Dicing before grinding and Plasma dicing, combined with Ablation laser grooving by ns- or ps-laser technology. WLCSP and eWLB applications face big issues in wafer thinning, because the wafers, due to consisting of resin mold and Silicon dies and having high bumps on the front side, tend to easily break when thickness becomes lower than the bump height. Nevertheless such low thickness is required due to increasing bump thickness. DISCO offers a unique technology to grind wafers with 200 µm high bumps down to 50 µm wafer thickness. DISCO Hi-Tec Europe GmbH with facilities close to Munich airport, offers certified Dicing and Grinding Production Services. Customers can utilize afore mentioned Disco technologies in production without investing into DISCO equipment.

Biografie
Gerald Klug studied business engineering at the University of Siegen and graduated in 1998 as Dipl.-Wirt.-Ing., completing his thesis at BMW in Munich. He started his carrier as a designer of coil processing lines for nearly 3 years at a German machine manufacturing company, Heinrich Georg GmbH. At the end of 2000, he joined DISCO as a Sales Engineer for the area of Scandinavia. Meanwhile he has been almost 17 years at DISCO, currently Sales Manager in charge of major customers in Europe.

Solutions for thin and tiny dies with high die strength and for thinning WLCSP and eWLB wafers

Epple, Chirstoph
Sales Engineer
DISCO HI-TEC Europe GmbH

Abstract
DISCO Corporation is a leading manufacturer for equipment and tools for wafer thinning and dicing. “Bringing science to comfortable living by Kiru (Dicing), Kezuru (Grinding) and Migaku (Polishing)” is DISCO’s mission. This way DISCO provides total solutions to meet the more and more demanding requirements of the Semiconductor industry in terms of manufacturing thin dies with high die-strength and several new approaches for advanced packaging. Discrete devices and RFID dies, universally used in smartphones and mobile devices, tend to have narrow street widths (cut margins), partially covered with low-k and ultra low-k layers, in order to maximize the number of dies formed on the wafer. Furthermore, mobile and IoT consumer products incorporate an ever-increasing number of such circuit components. With low-k and ultra low-k layers on top singulation processes become very challenging. In addition a part of these applications require the use of DAF-layers on the backside of the dies. In order to fulfil all these requirements, DISCO proposes several solutions, also focusing on avoidance of side wall cracks and interfacial layer damages, such as Dicing before grinding, Stealth dicing, Reverse Dicing before grinding and Plasma dicing, combined with Ablation laser grooving by ns- or ps-laser technology. WLCSP and eWLB applications face big issues in wafer thinning, because the wafers, due to consisting of resin mold and Silicon dies and having high bumps on the front side, tend to easily break when thickness becomes lower than the bump height. Nevertheless such low thickness is required due to increasing bump thickness. DISCO offers a unique technology to grind wafers with 200 µm high bumps down to 50 µm wafer thickness. DISCO Hi-Tec Europe GmbH, having its facilities close to Munich airport, offers certified Dicing and Grinding Production Services, so that customers can utilize most of afore mentioned Disco technologies in production, even without investing into DISCO equipment.

Biografie
Christoph Epple is working as Sales Engineer for DISCO HI-TEC EUROPE GmbH since June 2013. He received his Master’s degree in Engineering and Management from University of Applied Sciences in Munich in March 2013.

EcoPurge - Efficiency in UHP welding

Blumöhr, Torben
Product Manager
Dockweiler AG

Abstract
Engineers and welders familiar with ultrahigh-purity (UHP) stainless steel Systems know that purging before welding is a critical step in achieving acceptable oxidation-free welds. The downside is that purging can be time-consuming. Depending on the tube Diameter and system's length, preweld and postweld purging can take an hour. Reducing the purge time is a key factor in making this process as efficient as possible. Purge dams achieve this by sealing off the volume of the tube, meaning that just a small chamber needs purging. However welding engineers have been reluctant to use purge dams for UHP stainless steel Systems concerning the potential to damage the electropolished surface. Extensive testing has been done to ensure, that the EcoPurge meets all requirements of the semiconductor industry. As result of our development we created a reliable purging system, which reduces the gas consumption and welding time tremendously.

Biografie
Torben Blumöhr studied industrial engineering and management (M.Sc.) at the university of Rostock. 2016 he startet his professional career as Product Manager at Dockweiler and is working on the implementation of new products

A Wearable Platform for Harvesting and Analysing Electrolyte Content in Sweat

Donohoe, Andrew
Research, Insight Centre for Data Analytics
Dublin City University

Abstract
The biomedical diagnostics industry is currently evolving from large expensive lab based devices to small portable systems allowing personal sensing and point of care analysis. A key example of this is the integration of miniaturised chemical sensing with wearable technology, which is currently one of the fastest growing sectors in the world ¹. One of the main advantages of wearable chemical sensing is the ability to incorporate non-invasive sensing which uses readily available fluids such as sweat to test for a target analyte instead of traditional methods ². Here we present a fully integrated wearable platform for the detection of sodium and potassium in sweat. The platform accesses sweat emerging through the skin during exercise, which is drawn across the sensors by capillary action to a highly adsorbent material reservoir. The sweat electrolyte composition is monitored via an integrated solid-state ion-selective electrode that tracks concentration in real time. The sensor data is digitised, stored locally, and subsequently transmitted via Bluetooth to a mobile phone or laptop. The platform design has been optimised through several iterations and use of rapid prototyping technologies such as 3D printing. Results obtained during on body trials over a period of controlled exercise are consistent with previously published data³ on the use of wearable sensors for the real-time monitoring of electrolytes levels in sweat. 1. Seshadri, D. R., Drummond, C., Craker, J., Rowbottom, J. R. & Voos, J. E. Wearable Devices for Sports: New Integrated Technologies Allow Coaches, Physicians, and Trainers to Better Understand the Physical Demands of Athletes in Real time. IEEE Pulse 8, 38–43 (2017). 2. Glennon, T. et al. ‘SWEATCH’: A Wearable Platform for Harvesting and Analysing Sweat Sodium Content. Electroanalysis 28, 1283–1289 (2016). 3. Gao, W. et al. Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis. Nature 529, 509–514 (2016).

Biografie
Adam Porter is a member of the Adaptive Sensors Group at the Insight Centre for Data Analytics, Dublin City University. He received his PhD (2015) from Dublin City University and his main research interests include the development of novel electrochemical sensors and biosensors, with particular emphasis on their incorporation into practical technologies.

Polyester Films for the Next Generation of Flexible Electronics

MacDonald, Bill
Business Research Associate
DuPont Teijin Films

Abstract
DuPont Teijin Films (DTF) is recognised as the technology leader in flexible substrates for flexible electronics and PV and DTF continues to work with the community to tailor films to meet cost and performance targets. Substrates are unfortunately often taken for granted by the community, yet considerable time and effort can be lost if the wrong substrate is worked on. It is essential to choose the appropriate and most cost effective substrate for a given application. This becomes even more important as this industry moves from demonstrators to commercialisation. It is clear from the feedback we receive when DTF presents that this message is not always understood, especially as new companies emerge onto the scene. The message needs to be continually repeated. This presentation will update the audience with the latest polyester film developments for flexible electronics, including: (i) Themoformable films for in mould electronics offering deep draw coupled with the inherent PET durability properties and the ability to cure conductive inks at higher temperatures (ii) Clear flame retardant films with UL94 VTM0 performance (iii) Ultra clean, cost effective substrates for barrier films; (iv) A new generation of heat stabilised UV stabilised films for frontsheets for flexible PV (v) Super clear, low haze, low iridescence films for Touch Sensors;

Biografie
Bill MacDonald graduated B.Sc and Ph.D in chemistry from the University of St Andrew. He is a Business Research Associate in DuPont Teijin Films (DTF), a 50:50 joint venture between DuPont and Teijin. He is currently actively involved in developing substrates for flexible electronic and PV applications and in understanding the material requirements required for these emerging industries. He has coauthored over 40 papers, several book chapters and regularly presents on the flexible electronic and PV conference “circuit”. He is a Visiting Professor in the Department of Pure and Applied Chemistry, University of Strathclyde.

Automotive Security in a Connected World

Wuchner, Andreas
CTO Security Innovation at DXC
DXC

Abstract
Embedding security in at design, automotive technology, enterprise level protection and continuous monitoring to design secure, deliver secure, operate secure in today's highly technology dependent environment.

Biografie
Bio will be coming on the SEMICON Europe website.

Near hermetic embedding of active components in thin flexible LCP substrates

Hauer, Marc
Manager R&D
Dyconex AG

Abstract
A near hermetic packing technology of active components in a substrate based on liquid crystal polymers (LCP) technology is demonstrated and reliability measurements based on soak testing are presented. Liquid crystal polymers are chemically inert polymers with very low water and oxygen diffusion levels. The thermoplastic properties of these polymers allow the direct bonding of several thin, flexible polymer layers without the use of adhesives. Substrates, based on this material are very homogeneous and have proven stability in salt water immersion for extended periods (12+ months @ 77°C). The high heat resistance of the material set (MOT up to 180°C) suggests a possible use in high temperature applications. When exposed to even higher temperatures (>200°C) the material set can be thermoformed into a 3D structure. The flexibility of the material in an optimized 3D shape allows their use in stretching conditions. To further increase the functionalization of these substrates, active components have been embedded during the manufacturing process. The LCP substrate acts both to encapsulate and as a wiring interconnect which can be used in harsh environments. Resistance measurements of comb structures on a silicon die, encapsulated and interconnected in a LCP substrate and immersed in a salt water solution show very little resistance changes over time.

Biografie
Marc Hauer is R&D Manager and Engineering Manager at Dyconex. 13 years of experience in manufacturing of printed circuit boards, sensors and biocompatible substrates. As Engineering Manager he is responsible for medical implantable and hi-reliability products. In his previous functions he was application and product engineer. Marc holds a PhD in Laser material processing from the Swiss Federal Institute of Technology in Zürich (ETH) and author of 18 scientific papers

Flexible Components are Setting the Stage for Dramatic New Capabilities and Applications

McCreary, Michael
Chief Technology Officer
E Ink Corporation

Abstract
Impressive progress is being made in materials and processes for flexible displays, sensors, power sources, antennas, speakers, and thinning and handling of silicon processing and support chips. In addition to the extensive research and development under way with these, multiple categories of flexible components are already being combined in new commercial launches. Examples of some dramatic new commercial products using using flexible, reflective electrophoretic displays in combination with flexible power sources will be described as well as the outlook for future advances in such technology and applications.

Biografie
Dr. Michael McCreary is responsible for creating a portfolio of advanced technologies at E Ink that will enable new generations of novel display products. McCreary is a 44-year veteran of the imaging industry and previously held a number of leadership positions with Eastman Kodak Company prior to joining E Ink, including serving as the General Manager of the Microelectronics Technology Division, Kodak’s solid-state image sensor business. In addition to his E Ink responsibilities, McCreary currently serves on the SEMI FlexTech Governing Council. McCreary earned a Ph.D. in Physical Organic Chemistry from the Massachusetts Institute of Technology with further studies in solid state and device physics at the Rochester Institute of Technology and business at the Wharton School.

Providing Key Process Enabling Vacuum Capability Through Integrated Sub-Fab Data Management

Collart, Erik
Global Product Manager EdCentra
Edwards

Abstract
The sub-fab, with its vacuum, abatement and ancillary systems has evolved dramatically over the years. In many ways it has become as sophisticated as the fab itself, and now provides key enabling process technology. There is also a growing recognition among semiconductor manufacturers that sub-fab information can no longer be dismissed when it comes to fab process and yield optimization. Available sub-fab data sources such as equipment parameters, process data and equipment failure analyses will be discussed, as well as how these may be integrated to provide overall sub fab health monitoring and deliver vacuum conditions required by today’s leading edge technology nodes.

Biografie
Erik Collart joined Edwards in July 2015 as Global Product Manager for Edwards’ vacuum and abatement equipment monitoring, data acquisition and integrated data management platforms. He has over 30 years of experience in the semiconductor industry. Prior to joining Edwards he he held a number of different positions in semiconductor R&D and process development (Philips Research, Applied Materials), semiconductor equipment development (Applied Materials), and Product Management and Marketing ( Axcelis Technologies, AIBT). He has authored and co-authored over 80 publications in peer-reviewed scientific and industry journals and proceedings and holds several patents. He graduated with a Master Degree in Physics from Katholieke Universiteit Leuven (KUL) in Leuven, Belgium, in 1986.

Area-selective atomic layer deposition for self-aligned fabrication

Mackus, Adrie
Assistant professor
Eindhoven University of Technology

Abstract
Because nanomanufacturing using conventional top-down processing based on photolithography and etching is becoming extremely challenging at sub-10 nm dimensions, there is currently a strong desire in the semiconductor industry to move towards self-aligned and bottom-up fabrication schemes. Area-selective atomic layer deposition (ALD) aims at the deposition of material only on specific surfaces, and therefore has the potential to eliminate alignment issues, while reducing the number of required lithography steps. In this presentation, several approaches for achieving area-selective ALD will be presented and discussed. Special attention will be given to a recently developed method based on using inhibitor molecules in ABC-type ALD cycles. In this method, an inhibitor molecule is chosen that selectively adsorbs on specific materials, and subsequently blocks the precursor adsorption, resulting in area-selective deposition on those materials on which the inhibitor does not adsorb. It will be shown that an ALD process consisting of acetylacetone inhibitor, bis(diethylamino)silane precursor, and O₂ plasma pulses, enables area-selective ALD of SiO₂ on for example GeO₂, SiN_x, or WO_x, without coating Al₂O₃, HfO₂, or TiO₂. The opportunities for using such an area-selective ALD process in self-aligned fabrication schemes will be discussed.

Biografie
Adrie Mackus (1985) is an assistant professor in Applied Physics at Eindhoven University of Technology, TU/e. He earned his M.Sc. and Ph.D. degrees (both cum laude) in Applied Physics from TU/e in 2009 and 2013, respectively. Adrie worked as a postdoc at the department of Chemical Engineering at Stanford University in 2014-2015, after which he returned to TU/e in 2016. His research covers the field of thin film deposition by atomic layer deposition (ALD) for applications in nanoelectronics, with the focus on area-selective deposition and on the study of the underlying reaction mechanisms.

Trends in Passives for Power Electronics

Kügerl, Georg
Executive Vice President and CTO
EPCOS OHG - A TDK Group Company

Abstract
The capability of a power electronic system is strongly influenced by its passive components. In this regard, the passives should offer a maximum level of operating temperature, switching frequency, electrical field and current, and robustness. This calls for new materials and technologies, innovative product designs, and an increased level of component integration. Passive components that fulfill these requirements enable new possibilities for power electronic systems and are therefore called ‘More-than-Moore Passives’. In this presentation we review the specific requirements on passive components used for power electronics. We outline some of the current physical and practical limitations of passives, and present some examples how these constraints can be overcome. Emphasis is placed on new materials for improving the high temperature and high frequency characteristics of capacitors and inductors. Also some examples of system integration of passives are given.

Biografie
Dr. Georg Kuegerl earned his PhD in Physics at the Graz University of Technology (TU Graz) in Graz, Austria. In 1992 he joined Siemens Components, which in the meantime is a part of TDK Corporation. He is now the Chief Technology Officer of TDK's Piezo and Protection Devices Business Group, and is also Head of the TDK European R&D Center.

Human failure & mindset change

Hagen, Jan
Associate Professor
ESMT Berlin

Abstract
Dealing with errors – your own and those of others – is a challenge although we all make mistakes. As leaders we may recognize this and expect our staff to alert us on our own errors. However in practice this rarely happens. A view on airline flight decks shows us that pilots follow a concept that provides valuable lessons for managers. We will explore the concept of dealing with errors in the aviation industry and discuss the applicability of this error management concept in other organizations.

Biografie
Jan Hagen is an associate professor at ESMT European School of Management and Technology in Berlin. Jan’s research and teaching focus is on leadership. He is particularly interested to understand how teams and organizations deal with errors. Apart from articles in academic journals he published the book Confronting Mistakes – Lessons from the Aviation Inustry when Dealing with Error (Palgrave Macmillan) in 2013. His research received media coverage in international outlets like the BBC, Financial Times, The Economist, The Guardian, Forbes, Harvard Business Manager, Irish Times, and Sunday Times. Jan directs the ESMT open enrollment program Leadership under Pressure and is the host of the ESMT Error Management Conference. He teaches in executive education programs and human factors training of the German Federal Armed Forces. In addition to his academic work, he has more than 15 years of experience in management and consulting.

Advanced Mask Aligner Lithography for MEMS and Advanced Packaging

Eibelhuber, Martin
Deputy Head of Business Developmnet
EV Group

Abstract
Mask alignment systems are an essential part of the manufacturing lines for MEMS, LEDs and advanced packaging. In particular MEMS devices gain cost and technology advantages which are given by highest throughput, large depth of focus and insensitivity to bowed and warped wafers. In particular the large depth of focus enables the pattering of high topographies like within a deep etched cavity or over tilted side walls. Additionally this can be also used to efficiently and precisely pattern thick resists up to the range of 100µm. Recent improvements on the mask aligner equipment provide these and more advantages but with significantly improved throughput of 165 wph, most precise alignment down to 250nm and increased exposure intensity up to 120mW/cm².

Biografie
Martin Eibelhuber is deputy head of business development at EV Group for bonding, lithography and nanofabrication technologies and particularly focusing on compound semiconductors, nanotechnology and engineered substrates. He holds a PhD (Dr. techn.) in technical physics from the Johannes Kepler University Linz specialized on nanoscience and semiconductor physics. As a university staff member he gained professional experience in photonics, nanofabrication and material characterization.

DPSS Laser Debonding for Thin Wafer Handling

Uhrmann, Thomas
Business Development Director
EV Group (EVG)

Abstract
Thin and flexible wafers are often a challenge to process on standard semiconductor equipment; therefore temporary bonding for mechanical support is used and already well established for various applications. Especially UV laser debonding offers process characteristics like high throughput and debonding at room temperature, combined with the availability of high temperature stable materials. Solid state lasers provide several advantages in regards of maintenance and consumables costs and are therefore a reasonable choice for laser debonding. In this paper we will identify and examine critical process parameters for successful laser debonding with a solid state laser with a beam shaping optics for good process control. A successful debond is characterized by delamination between carrier wafer and device wafer with lack of carbonization, therefore the degree of carbonization is evaluated in dependence of the specific process parameters like radiant exposure and beam overlap. Different material systems from different suppliers are evaluated as the value of the parameters vary depending on the used system. The impact of each parameter is analysed during this study.

Biografie
Dr. Thomas Uhrmann is director of business development at EV Group (EVG) where he is responsible for overseeing all aspects of EVG’s worldwide business development. Specifically, he is focused on 3D integration, MEMS, LEDs and a number of emerging markets. Prior to this role, Uhrmann was business development manager for 3D and Advanced Packaging as well as Compound Semiconductors and Si-based Power Devices at EV Group. He holds an engineering degree in mechatronics from the University of Applied Sciences in Regensburg and a PhD in semiconductor physics from Vienna University of Technology.

Holding out for a HERO - Autonomously Navigating Robots

Stegemann, Burkhard
Sales Director
Fabmatics GmbH

Abstract
Since September 1, 2016, the merged companies HAP Handhabungs-, Automatisierungs- und Präzisionstechnik GmbH Dresden and Roth & Rau - Ortner GmbH have been operating under the new name Fabmatics GmbH. The company is an experienced specialist for the automation of material flows and handling processes in semiconductor manufacturing plants and other high-tech production environments. Both predecessor companies have been implementing automation projects with great success for more than 20 years. One of the focal points of Fabmatics is retrofitting 200mm factories in order to make them fit for future market demands. Currently, there are some two-hundred 200mm factories world-wide. In light of rising global cost pressure, a majority of semiconductor manufacturers is expected to modernise their factories and to automate processes significantly as a result. The presentation will show best practice automation projects, focused on material handling and production logistic applications with the mobile robots HERO FAB and SCOUT from Fabmatics, even at positions where automation previously seemed impossible. Learn how a smart integration and combination of automated systems for cassette transportation and storage, lot identification & localization as well as carrier and wafer handling can retrofit older 200 mm fabs in order to increase their competitiveness. Older does not mean obsolete!

Biografie
Born in 1969, Burkhard Stegemann studied Physical Technics at the FH Aachen and completed his final year at Coventry University. In 1996 he joined Carl Zeiss in Jena in the department of microscopic wafer inspection. After two years in R&D/ application, he changed to product and project management. As part of the acquisition of the Zeiss business field “optical wafer inspection” by HSEB Dresden GmbH in 2004, Burkhard Stegemann joined HSEB. His responsibilities were sales and service. Since May 2014 Burkhard Stegemann is sales director of HAP GmbH Dresden and due to the merger of HAP and Roth & Rau - Ortner, since September 2016 sales director of Fabmatics GmbH.

3D Vision for intelligent Automation and the next generation robots

Florin, Claude
CEO
Fastree3D SA

Abstract
Fastree3D SA is a fabless semiconductor company developing sensors to measure distances to surrounding objects to avoid collisions Automotive safety, autonomous vehicles, drones or service robots requires position and motion sensing in order to navigate efficiently and safely. 3D vision is essential for safety. Collision avoidance requires: - Faster spatial awareness: distance monitoring at vehicle velocity - Safety:confidence level must be guaranteed, even under adverse light - Smarter information: on-chip processing highlight relevant scene features and danger (speed, distance, directions) Our innovation is a 3D camera that is fast (million points/sec to match driving speed), smart (calculate motion and data to achieve detection) and safe (90% confidence levels at 0.1% resolution) with industrial deployment scalability (< 100€/module and high volume) We deliver 2 products • integrated circuit system on chip (SoC), delivered to electronics suppliers. The output of the SoC is diverse: distance, intensity, speed, motion to be chosen depending on the problem • camera modules (detector + laser illuminator) sold to automotive Tier or machine vision integrators. Fastree3D goal is to establish our detector technology as the standard for automotive safety applications in urban driving conditions: • Long range LIDARS are expensive ( > 1'000$ due to MEMS or optical scanning)or detector materials (InGaAs). Scanning sensors require a laser illuminitating sequentially all the scene, point by point. This is slower and can cause latency problems. • Affordable entry-level LIDARS cannot achieve urban driving pedestrian detection, due to low speed (<10fps latency = 15m distance) or to too low resolution (<16 lines). • 2D stereoscopy: only effective under good illumination, precision is low at mid-range, imprecise in low contrast scene • flow-imaging: continuous video-scene segmentation is derived from heuristic algorithm, ambiguity often arises in low light conditions, processing is expensive

Biografie
Summary CEO and founder of Fastree3D developing laser ranging sensors for automotive safety and autonomous vehicles. He has been a co-founder of 3-startups and managed investments in over 12 early-stage ventures. His previous industry career lead to successful product launches based on video processing, image compression and embedded signal processing software. Experience 2013- Fastree3D : prototype CMOS single photon detector arrays with system-on chip Lidar. Technology transfer from 3 Universities with 3.3M CHF venture financing and grants. 2008- Venture Concept : investor in 40 startups including Lemoptix (Head-up displays), Ukko (IOT / V2X), Green motion (EV charging ). Partner at Polytech Ventures, President A3 Angels, Expert at Swiss CTI, and European Commission risk finance advisory board. 1996 HP Communications : innovation, M&A and ventures on video, VoIP (Pipebeach , Alcatel, Ericsson, Nokia, Cisco, 15 telecom providers) 1989 HP Medical / Philips : 7 EU R&D project, digital radiology (PACS), multi-media patient care systems, CEN TC251 medical communications. Education MSc. Electrical Engineering EPFL, Executive education: IMD, MIT Sloane and Harvard Business School Honours 300 most influential persons in Switzerland (Bilan Magazine) , 100 start-up experts (Handelszeitung). Winner: European Photonics Venture Summit 2016, SPIE Photonics Europe 2016, European Venture Summit 2016, Semi-finalist SPIE Photonics West 2017.

Stretch the mechanical limits of electronics

Michaud, Hadrien
Founder
Feeltronix

Abstract
Can rubber be “smart”? Current wearable devices rely on rubber as a structural material as it offers a natural skin-like feel and excellent mechanical properties. However, the smart electronic sensing and communication functions are still restricted to a rigid casing, essentially repackaging a printed circuit board. Feeltronix breakthrough platform technology provides design and manufacturing solutions to distributed standard electronic circuits into rubber that can withstand repeated and extreme mechanical deformations (flex, twist, stretch, fold). Our platform is highlighted by: intrinsically stretchable wires, allowing for simple, generalized design; high wire conductivity (between 0.05 and 0.5 Ohm/sq); and reliable integration of standard components (PCBs and flex PCBs modules, packaged components). In addition, Feeltronix-enabled devices are sweat and water-resistant. Importantly, our processes are derived or adapted from the standards used in the manufacture and assembly of electronic circuits, so are therefore designed to scale to high throughput production with high cost-effectiveness. We are focusing our efforts to market our innovation for wearable electronic devices for which new form factors, high mechanical compliance, and skin-like feel are needed. Our current focuses are within the sports, AR/VR, healthcare, and watchmaking industries.

Biografie
Hadrien Michaud received an engineering degree from École Polytechnique (Palaiseau, France) and an MsC in microengineering from EPFL (Lausanne, Switzerland), both in 2013. He then joined the laboratory of Prof Stéphanie Lacour at EPFL and obtained his PhD in 2017 for his work on stretchable metallization technologies for skin-like wearable transducers. He is a founding member of Feeltronix.

FeFET Memory - Ideal for High-Performance, Ultra-Low Power Embedded Applications

Mennenga, Menno
Business Development
Ferroelectric Memory Company GmbH

Abstract
FeFET is the ideal embedded non-volatile memory (ENVM) for the Internet of Things. FeFET competes against Flash, the incumbant technology for ENVM. Flash faces challenges from several other new contenders such as phase change memory, magnetic RAM, and resistive memory. FeFET stands out against them with high performance, ultra low power, high temperature stability, and low cost - requiring, for manufacture, no capital expenses and only very low operating expenses. In addition, the FeFET gate material retains its memory properties down to 2.5nm - offering a scalability road map up to and beyond the next ten years.

Biografie
Menno Mennenga is a co-founder of FMC where he is responsible for business development. He worked for Advanced Micro Devices (AMD), Atmel, and, as a Freelance Consultant, for several other first tier semiconductor companies. His professional experience includes system architecture, engineering management, marketing, and sales. He holds electrical engineering degrees from Texas A&M University and Dresden University of Technology.

Ferroelectric hafnia - Enabling next generation semiconductor memories

Mennenga, Menno
Business Development
Ferroelectric Memory GmbH

Abstract
10 years ago, ferroelectricity has been discovered in hafnium oxide (HfO₂). Since then, intense academic and industry R&D have proven the ideal suitability of ferroelectric HfO₂ for memory applications ranging from standalone NVM or DRAM replacement to a fundamental change in the embedded memory space. This talk explains the fundamental memory characteristics of ferroelectric HfO₂ highlighting the ideal suitability of the material for requirements that are set by today’s semiconductor products. Ultra-low power consumption and compatibility to advanced manufacturing environments are only a few of these requirements besides scalability, high write speeds and robust reliability. Within the last 10 years of R&D it could be verified that the ferroelectric properties in hafnia indeed meet these criteria and therefore promise to enable next generation memory products at the latest technology nodes. Besides the intrinsic memory properties, the talk will also cover the implementation of the memory material in FeFET memory cells. This memory cell, which is based on replacing the gate insulator of a standard logic transistor by a ferroelectric material, is sometimes considered the “holy grail” in semiconductor device engineering. The discovery of ferroelectricity in HfO₂ has revived this almost forgotten memory concept once again. In 2016, the Ferroelectric Memory Company has been formed in order bring the FeFET memory concept finally into mass markets. We will present the latest status in FeFET development and give an outlook on our memory roadmap.

Biografie
Menno Mennenga is a co-founder of FMC where he is responsible for business development. He worked for Advanced Micro Devices (AMD), Atmel, and, as a Freelance Consultant, for several other first tier semiconductor companies. His professional experience includes system architecture, engineering management, marketing, and sales. He holds electrical engineering degrees from Texas A&M University and Dresden University of Technology.

Database Infrastructure with Smart Software Layer For Semiconductor Manufacturing

Kelly, David Quest
Product Engineering Manager
Finisar Corporation

Abstract
Finisar is a global technology leader in optical communications components and subsystems that enable high-speed voice, video and data communications. Finisar’s facility in Texas is a gallium-arsenide (GaAs) based wafer fab that makes short-wave, infrared vertical-cavity surface-emitting lasers (VCSELs). Today, shipments are growing rapidly as the worldwide VCSEL market moves beyond lasers for optical communications to include high-power laser arrays used for 3D sensing applications. The VCSEL manufacturing process at Finisar involves collecting a large amount of data generated at various process steps, multiple wafer probing steps, and burn-in testing. Data must be correlated for analyzing relationships between parametric results and yield. At Finisar we have developed a data infrastructure that takes advantage of a software layer between the data collection points and the database to validate data before it is recorded. If data does not meet the strict requirements imposed by the software layer, the software layer throws exceptions that can be handled appropriately depending on the context. The database records all parametric data into binary large objects (BLOBs). These BLOBs are arrays of bytes that contain numeric information. Using a BLOB, a full set of wafer probe data with thousands of dies and many tests per die can be recorded in a single database row, which has positive implications for speed and database reliability. The software layer is used to interpret the BLOBs and transform them into a more human readable format. The software layer is used in test software running on probers, data analysis and visualization software, automated processes running on timers, and in table-valued functions deployed to the SQL server. The software layer and the database work together to provide reliable access to process and yield data for analysis by engineers and managers.

Biografie
David Kelly is a senior engineer and product engineering manager at Finisar Corporation in Allen, Texas, USA. David has been a professional in the semiconductor industry for 10 years. He received his Ph.D. in solid-state electrical engineering from the University of Texas at Austin in 2006. He has worked in a variety of areas including silicon-based process engineering, analog product engineering, reflective display chips, test engineering, and semiconductor data infrastructure. His team is currently working on overhauling and expanding Finisar Allen’s VCSEL fab data infrastructure to support the growing demands of the VCSEL market.

Pressure Sensors: Challenges in Design and Production

Peschke, Matthias
Vice President Production
First Sensor AG

Abstract
Pressure sensor manufacturers cover a broad range of processes and technologies to produce high-performance sensors and sensor systems for pressure ranges between 0.01 and 2,000 bar. Trends such as the on-going miniaturization in sensor technology, higher demands on reliability and long-term stability or growing intelligence lead to challenges within the value chain of sensor production. Manufacturers have to develop innovative solutions for growing market demands. In addition, they have to consider investments, flexibility, quality, and cost influence in production. In Front End production, high investments in “standard” semiconductor processes and special MEMS processes are combined with essential effects on sensor quality. Innovative packaging solutions can significantly influence the robustness of sensors. A rising influence on costs during the manufacturing process can be noted for calibration which is driven by intelligence and functionality requirements. Moreover, the demand for new and competitive technologies for high pressure ranges is growing. The lecture focuses on pressure sensor manufacturing steps and works out challenges as well as upcoming trends in sensor technology. Examples for corresponding solutions developed by First Sensor will be introduced, e.g. the use of thicker backplates during packaging processes to ensure mechanical decoupling. Further topics are First Sensor’s STARe technology for higher long-term stability and T-Bridge as a flexible technology for high pressure measurement. Furthermore, the advantages of COB and TSV micro soldering technologies will be discussed.

Biografie
Dr. Matthias Peschke completed his degree in Physics at TU Darmstadt and wrote his doctorate on the topic of “The effect and technology of gas-sensitive field-effect transistors.” He is a recognized expert for, e.g. the qualification of a variety of technologies, the development and implementation of series production processes, and transnational technology transfers and synchronizations. Dr. Matthias Peschke is Vice President Production and has been part of the management team of First Sensor AG since 2015.

Packaging of Image Sensors and Devices

Mattheier, Lutz
Manager Assembly Technology Development
First Sensor Packaging GmbH

Abstract
In the past Imaging Sensors and Devices have been mostly assembled in ceramic single packages or ceramic substrates. So mainly the requirements for cleanliness and temperature management could be fulfilled by single devices. Meanwhile Imaging Sensors and Devices are more and more seen as part of a whole Printed Circuit Boards (PCB) Assembly and will be implemented as part of an active circuitry on a PCB. The packaging process flow has to be designed in a way to guaranty electrical function and module reliability. Can this be done in compliance with the requirements of the Automotive customers? Usage in harsh environments, high robustness and reliability, long lifetime combined with zero defect yield targets. Could this be achieved by use of the COB Technology? First Sensor AG will support their customer base on this difficult way. Mobility and information Technology mainly drive the market into higher reliability requirements, smaller packaging and lower cost. But Chip-Size-Packages and Wafer-Level-Packaging stand for high number of devices to cover high equipment, setup and tooling costs. First Sensor Packaging GmbH Dresden did search for partners and new technologies to make such solutions available for Prototyping and affordable for small customers and their small demand of devices. Here we talk about combination of classic Chip On Board (COB) Technology with new methods: - Assembly of large Imager-Die’s (up to 200mm by 150mm) - Assembly of Matrix Devices (e.g. 4 x 4 die matrix, 32mm by 32mm) - Assembly of Die’s developed in Through Silicon Via (TSV) Technology - Customized design and molding - Adapting of such solutions to the needs of the Automotive industry Outlook: - Special and new methods of PCB creation (2.5D Technology) - Modified materials and methods to create glass cover for optical Sensors and Devices.

Biografie
Lutz Mattheier, Manager Assembly Technology Development, First Sensor Microelectronic Packaging GmbH Lutz Mattheier begann im Juli 2007 als Manager Process Technology bei der Microelectronic Packaging Dresden GmbH und ist seit 2017 für die Technologie- und AVT-Prozessentwicklung verantwortlich. Seit 1994 arbeitete er 3 Jahre für Siemens Regensburg in der Die und Wire Bonding Entwicklung, 3 Jahre als Assembly Engineering Manager bei White Oak Semiconductor in Richmond Virginia, 2 Jahre für ESEC Schweiz als Director Process Technology Wire Bonding, 1 Jahr für Kulicke&Soffa Deutschland als Manager Center of Excellence und 4 Jahre als Head Process Technology bei der Swissbit Germany AG Berlin. Zuvor arbeitete er für 8 Jahre im Zentrum Mikroelektronik Dresden in der Entwicklung der Thermosonic und Ultrasonic Drahtbondtechnologie. Lutz Mattheier erhielt sein Diplom der Elektronik Technologie 1986 an der Technischen Universität Dresden.

Conformable organic LCDs on plastic enabled by high-performance OTFT technology

Banach, Mike
Technical Director
FlexEnable

Abstract
Today there is an increased demand for flexible and curved displays for various applications (e.g. automotive, digital signage and consumer electronics) that will offer more design freedom, while enabling new use cases and improving user experience. Although display technology has come a long way in a short time, there is still a major challenge to be solved – the majority of displays today are glass-based which leads to form-factor constraints. Organic electronics will play a pivotal role in enabling flexible displays that break form factor constraints of glass and unlock new product applications and use cases. In particular, organic LCD (OLCD) technology opens a new avenue for LCD – it enables glass-free, conformable, high performance displays, combined with a low manufacturing cost that is driven directly by the uniquely low temperature process (sub 100ᵒC) afforded by OTFT. This low cost process has been demonstrated on commodity plastics which have been integrated into highly functional plastic LCD modules. The process has been designed so it can be easily transferred into existing display factories providing a quick route to high production capacity and yields. The organic transistors used are capable of driving full colour displays and operating at video rate. Performance is critical for the success of any display technology. A series of technological advances have led to TFT performance that is superior to amorphous silicon. For example, in terms of mobility, manufacturable OTFTs are now at least three times better than amorphous silicon, whilst having leakage currents nearly 1000X lower – both of which bring direct performance benefits to the display electro-optical performance alongside the benefits of flexibility. The presentation will describe the attributes of OTFT-based LCD technology, its readiness and scalability for mass-production and the value it brings to specific applications and markets.

Biografie
Mike Banach is the Technical Director at FlexEnable. He started his career as a researcher in flexible electronics at the Air Force Research Laboratories at Wright Patterson Air Force Base in USA. He initially joined Plastic Logic in 2003 and played an instrumental role in developing and industrialising its proprietary flexible electronic technology. At FlexEnable Mike and his team have delivered breakthrough technology developments with organic transistors including flexible displays (OLED and OLCD) and sensor arrays. He holds a doctorate degree from the University of Cambridge and a BA from the University of Cincinnati.

Landesberger, Christof
Group manager
Fraunhofer EMFT

Biography
Christof Landesberger received the diploma degree in physics from Ludwig Maximilian University in Munich. He joined Fraunhofer Institute in Munich in 1990 and is now heading the research group “Thin Silicon” within the department “Flexible Systems” at Fraunhofer EMFT. He has been working in the field of ultra-thin silicon since more than 15 years and prepared more than 20 patent applications in the field of handling and processing techniques for ultra-thin semiconductors. His current research topics are focusing on packaging technologies for ultra-thin semiconductor devices, including self-assembly and flexible chip foil packages. The Fraunhofer-Gesellschaft is Europe’s largest application-oriented research organization. With 24,000 staff and over 60 institutes throughout Germany as well as numerous international research centres and liaison offices in Europe, the USA and Asia, Fraunhofer-Gesellschaft has an established reputation for excellence at the front rank of applied research and development. All institutes perform contract research and development for industry and public authorities. Fraunhofer Research Institute for Microsystems and Solid State Technologies (EMFT) in Munich is active in the area of microelectronics and microsystems engineering. In the field of flexible electronic systems and related processing and manufacturing processes it focus on advanced techniques for wafer thinning, various carrier techniques for thin wafer handling, 3D-intgeration and thin die assembly. Furthermore, EMFT research is on foil-to-foil and chip-to-foil integration, roll to roll processing, ultra-thin chip interconnection as well as on testing and reliability analysis. Fraunhofer EMFT is equipped with state of the art machinery for wafer processing, micro-fabrication and characterization of electronics on both wafer substrates and plastic film substrates.

Kutter, Christoph
Director
Fraunhofer EMFT

Biography
Prof. Dr. rer. nat. Christoph Kutter is the director of the Fraunhofer Research Institution for Microsystems and Solid State Technologies EMFT since 2012. Additionally, he holds the professorship with focus on Solid State Technologies at the Universität der Bundeswehr München. His focus areas at Fraunhofer EMFT are research and development of sensors and actuators for people, the environment and the Internet of Things, utilizing Functional Molecules, Silicon Technologies, Devices and 3D Integration, Foil Technologies, Micropumps and Design, Test & System Integration. Prior to that, Christoph Kutter held various executive positions at Infineon Technologies AG and Siemens AG, such as heading the development of communication products, the chip card and central research. Christoph Kutter was responsible for several central improvement projects aiming at increasing efficiency in research and development, as well as leading the enterprise-wide innovation initiative.

Flexible ultra thin silicon foil packages.

Bose, Indranil Ronnie
Group Manager
Fraunhofer EMFT

Abstract
We report on a chip foil package technology for thin silicon ICs, wherein the bare silicon ICs are thinned down in the range 12-40 µm and are then packaged face-up in a polymer foil package. These packages are flexible yet offer superior reliability and stability for the fragile bare chips. This entire process is roll to roll process compatible and offers a economically viable solution due to the large scaleup possibility. The packages are subjected to bending and mechanical tests and the results thereof are shown in the paper. (A detailed abstract will follow in the next 2 weeks.)

Biografie
Universität der Bundeswehr München, Germany (University of the German Armed Forces, Neubiberg - Munich, Germany) Pursuing Habilitation and Teaching Assistant at the Institute of Physics Technische Universität Dresden, Germany Dr.-Ing. (summa cum laude), Electronics Packaging Laboratory (IAVT) from the Faculty of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, USA Visiting Researcher at the Georgia Tech Research Network Operations Center (GT-RNOC) Ludwig-Maximilians-Universität München und Technische Universität München - CDTM Elitestudiengang Technology Management - Elitenetzwerk Bayern, Germany Honours Degree in Technology Management Technische Universität München TUM, Germany Master of Science M.Sc. West Bengal University of Technology, India Bachelor of Technology in Electronics and Communications Engineering

CMOS based microdisplays, imagers and sensors enhanced by OLED/OPD integration

Richter, Bernd
Head of Department Organic Microelectronic Devices
Fraunhofer FEP

Abstract
The close collaboration of classical microelectronics with organic technologies allows the realization of advanced microdisplays and imagers. This work presents the key technologies and the spectrum of devices and applications from ultra-low power displays for mobile applications, displays with embedded image sensors for fingerprint applications up to imagers with extended spectral range based on organic photodetectors.

Biografie
Bernd Richter received his diploma in electrical engineering from TU Dresden in 2003. After graduation he becomes a research fellow at Fraunhofer IPMS, where he was involved in system and IC design. Since then he is focusing on the design and manufacturing of OLED microdisplays and sensors based on the organic on silicon technology. Now he is managing several projects and the department "Organic Microelectronic Devices" at Fraunhofer FEP.

Pfeffer, Markus
Group Manager
Fraunhofer IISB

Biography
Dr. Markus Pfeffer (M): holds a diploma in Electrical Engineering and a PhD (Dr.-Ing.) with specialization in manufacturing optimization both from the University of Erlangen- Nu-remberg. Since 2002 he is with Fraunhofer IISB in the department Semiconductor Manufac-turing Equipment and Methods. He is leading the group Manufacturing Control with a strong focus on equipment control, contamination control, manufacturing optimisation, equipment assessment and discrete event simulation. He was/is involved in several national and interna-tional cooperative R&D projects, e. g. FLYING WAFER, PULLNANO, IMPROVE, EEMI450, SEA-NET, SEAL, NEREID, EuroCPS and SEA4KET in a variety of functions.

Dr. Production: How to quickly implement latest research on "Industry 4.0" in production

Schellenberger, Martin
Group Manager Equipment and APC
Fraunhofer IISB

Abstract
The semiconductor industry is a strong pacesetter in many technological aspects - last but not least in advanced data collection, data analytics and the use of data-driven production optimization. Other industries refer to this as "Industry 4.0". The application of APC (Advanced Process Control) is state-of-the-art in many semiconductor production lines. And still, the race towards broader and deeper utilization of data in a "smart factory" is going on, striving towards predictive analytics and implementation of machine learning, e.g., in the areas of predictive maintenance or prediction of process and machine behavior. Thus, there is an ongoing need to implement latest research results on "Industry 4.0" in production lines - and this affects not only current 300 mm fabs, but also 200 mm lines - and it affects not only the so called frontend-of-line, but also the backend. In this presentation, an exemplary overview about both existing and evolving approaches for data-driven production optimization is given. This overview will be combined with a hint towards cost estimation and ROI for such solutions. A specific focus will be set on how to quickly implement latest research results in the domain of "Industry 4.0" in production: an approach for applied R&D will be presented, which facilitates turning a production machine into a "smart equipment" in a time frame of some months.

Biografie
Martin Schellenberger received the diploma in electrical engineering in 1998 and a Ph.D. in electrical engineering in 2011, both from the University of Erlangen-Nuremberg, Germany. From 1998 to 2006 he was a Research Assistant with the Fraunhofer Institute of Integrated Systems and Device Technology (IISB). Since 2007 he is Group Manager at Fraunhofer IISB, responsible for equipment and advanced process control. His research interests include equipment development and optimization for semiconductor processes, manufacturing science solutions for quality control, predictive methods for process control, equipment automation and productivity enhancement.

Vogel, Martina
advisor to the institute management of Fraunhofer ENAS, strategy coordinator and manager marketing/PR
Fraunhofer Institute for Electronic Nano Systems ENAS

Biography
Martina Vogel studied physics at the University of Technology Chemnitz, Germany. She obtained her PhD from the same university in 1994. From 1996 until 2001 she worked as project manager at the GPP Chemnitz mbH. From 2001 until 2006 Martina Vogel was responsible for quality assurance of memory products at ZMD. In 2006 she joined the Center for Microtechnologies of Technische University Chemnitz. Since 2009 she is with Fraunhofer ENAS and works as advisor to the institute management and manager marketing/PR. Since 2015 she works additionally as strategy coordinator of the institute.

Power Electronics of highest power density for Automotive Applications

Hilpert, Florian
Groupleader Aviation Power Electronics
Fraunhofer Institute for Integrated Systems and Device Technology IISB

Abstract
Over the last decade new Technologies in power electronics like WBG Devices enabled the development of systems with highest power densities. As volumetric designspace is crucial in the design of Automotive Systems, this opened up a broad field of Automotive Applications especially in power regions above 100kW. Today there is a wide and growing field in Power Electronics for Automotive Applications, ranging from HV DCDC converters and drive inverters for electric vehicles to intelligent power distribution in the LV board grid for fault tolerant E/E architectures in automated driving vehicles. The presentation will focus on latest research prototype systems developed mainly for Automotive Applications to illustrate the advantages of new WBG technologies together with advanced system design like low inductive module packaging. The development of systems with highest volumetric power densities also constantly reduced the weight of the power electronics, enabling the development of lightweight Systems with high gravimetric power densities. An Outlook in possible future Power Electronic Applications for the More and All Electric Aircraft will be given.

Biografie
2006-2011 University of Erlangen-Nuremberg, studies of Mechatronic with focus on Power electronics and Electric Drivetrains 2012-06/2017 Scientific Engineer at Fraunhofer Institute for Integrated Systems and Device Technology IISB, Group Drives and Mechatronics, Responsible for System Design of Automotive Power Electronic Systems with focus on System-Integration and SiC Drive Inverters 07/2017-now Groupleader of the Workgroup Aviation Electronics Focus is to transfer Technologies from Automotive Applications to provide Power Electronic Systems of highest Power Densities for future Aviation Applications like More and All Electric Aircrafts

Biodegradable flexible conductor structures

Hoffmann, Michael
Senior Scientist
Fraunhofer Institute for Organic Electronics, Electron Beam and Plasma Technology FEP

Abstract
Biodegradable flexible conductor structures allow flexible electronics devices which decompose after an intended period of operation. Examples are medical implants which are absorbed by the living organism or devices that can be recycled by industrial composting facilities. Key components of such devices are suitable substrates and conductive tracks. As substrate material, polylactic acid (PLA) is a common choice since it is clinically approved for absorbable implants and it is established as being biodegradable according to EN 13432. As conductor material, magnesium is a well-established material for absorbable implants. We show how conductive tracks of magnesium can be produced by vacuum thermal evaporation onto PLA foils. A direct deposition onto pristine PLA foils does not yield any film due to poor sticking. The sticking behavior can be improved by seed layers, by high energy plasma pretreatment and by outgassing. We show how conductive tracks of down to 120 µm nominal width can be produced with a sheet resistance of 2 Ohm/square at 50 nm Mg layer thickness – comparable to planar magnesium layers on glass. We analyze the mechanisms limiting the structure quality and the mechanical properties of the conductor structures.

Biografie
Dr. Michael Hoffmann received his Ph.D. in physics at TU Dresden in 2000. He continued with basic research on optical spectroscopy of organic semiconductors at the Department of Chemistry, Princeton University until 2001 and at Institut für Angewandte Photophysik (IAPP), TU Dresden until 2006. Then, he joined Fraunhofer Gesellschaft, where we worked in the field of organic electronics. Currently, he is senior scientist at Fraunhofer Institute for Organic Electronics, Electron Beam and Plasma Technology FEP in Dresden.

With RFID Sensors into the Cloud

Deicke, Frank
Head of Business Unit Wireless Microsystem
Fraunhofer IPMS

Abstract
RFID technology is mainly applied in the area of logistics, traditionally used to identify objects, goods or commodities. Modern industrial applications also often require the wireless measurement of physical parameters such as temperature, humidity, light, pressure or acceleration with the help of sensor technology. This is especially the case when the use of cable connections are not possible due to inaccessible locations and moving or rotating parts. In such situations, passive RFID sensor transponders provide a viable solution by combining extremely energy-efficient sensor technology with standards-based RFID protocols. The energy needed to measure sensor values is completely delivered via commercially available RFID readers. Because of their high energy needs, active wireless systems usually rely on replaceable or rechargeable batteries for additional energy storage. In this context, there is always the question of maintenance costs incurred with either replacing or recharging energy stores. Taking energy directly from the field of the reader, passive RFID sensor transponders are, in contrast, completely maintenance-free and, with a virtually unlimited service lifetime, can be incorporated into inaccessible places. The presentation is about how to deploy RFID-based sensor transponders into modern real world application scenarios comprising issues such as reader integration, software based system integration using OPC-UA and Auto-ID companion specification as well as cloud based client solutions. It is also discussed how to use sensors and actuators in combination to not only receive measurement data but also interact within a system.

Biografie
Frank Deicke is head of business unit Wireless Microsystems at Fraunhofer IPMS. He received his diploma and Ph.D. from TU Dresden in electrical engineering, short range, and RFID communication in 2004 and 2009. After that he joined Fraunhofer IPMS as a scientist. Later he setup a new R&D group developing short and mid-range Li-Fi communication technologies. Frank Deicke is co-founder of Li-Fi consortium. Since 2015 he has been head of business unit Wireless Microsystems and responsible for Li-Fi and sensor-based RFID technology developments as well as system integration.

Sensors and electronics for electric vehicles: recent trends and upcoming developments

Middendorf, Andreas
scientist business development
Fraunhofer IZM

Abstract
Achievements in technology of sensors and electronics are the main drivers for the amazing innovations in the automobile industry in the past two decades. Safety, efficiency and comfort attributes are today realized in almost all vehicle classes. The ongoing miniaturization and integration processes enable the scale effects and cost reduction potentials. Electric vehicles and the therefore needed infrastructure demand further efforts, especially if transportation systems are combined with the smart energy grid or autonomous driving performance is realized. For this scenarios further, sometimes new electronics, sensors and actuators have to be integrated in the vehicle and one challenge is the safeguard of reliability with simulation, qualification and test. Reasons are totally different use cases and mission profiles and the need to bring the latest technology to the market. The presentation outline mainly the hardware aspects like packaging or sensor fusion.

Biografie
Andreas Middendorf Dr.-Ing. Electrical Engineering Andreas Middendorf works in the Business Development Team of the Fraunhofer Institute for Reliability and Microintegration (IZM). He was working as a scientist in the department Environmental and Reliability Engineering of the Fraunhofer Institute for Reliability and Microintegration (IZM) and of the Technical University Berlin since May 1995. He was responsible for the development and implementation of methods and demonstrators for the estimation of lifetime for electronic appliances. Further on he is investigating technological aspects which combine the electronics design with environmental engineering techniques. This includes environmental assessments through LCA and through other methods, especially for Eco-Design, the evaluation of recycling attributes, the development of databases and software as well as environmental oriented product evaluation. He carried out courses on EcoDesign for electronic companies, holds four patents and has coordinated several cooperative research projects in Germany and Europe. Since 2010 until 2015 he was senior manager for the application field automotive and transportation systems and in charge for the System Reliability and Measurement Group at IZM. He studied electrical engineering at the Technical Universities of Aachen and Wuppertal where he specialized on information and communication technologies.

Laser Direct Imaging (LDI) for Advanced Packaging

Toepper, Michael
Business Development Manager
Fraunhofer IZM

Abstract
Embedding die technology is one of the hottest topics in the area of Advanced Packaging. It migrated over the last decade to two types: Embedding into PWB (embedded die) and reconfigured molded wafer. FO-WLP (Fan-Out Wafer Level Packaging) has been proven as one of the most versatile packaging technologies in the last years. The technology is combining high performance, increased functionality with a high potential for heterogeneous integration and reduce the total form factor. Main advantages of FO-WLP are the substrate-less package, lower thermal resistance and higher performance due to shorter interconnects together with direct IC connection by thin film metallization instead of wire bonds or bumps. Especially the inductance of the FO-WLP is much lower compared to FC-BGA packages. In addition it can be used for multi-chip packages for SiP. Lithography is a key aspect for this technology because the lines and space requirements are reaching the area of thin film processing. Cost reduction has been achieved by moving to 330 mm-Technology and the move to panel level processing will push the technology further to lower cost. This can be viewed as a merge between the Embedded Die technology based on PWB infrastructure and the FO-WLP on Wafer Level. In this presentation the high potential of LDI (Laser Direct Imaging) will be discussed for the applications in FO-WLP with a focus on Panel Level Packaging.

Biografie
Michael Töpper has a M.S. degree in Chemistry and a PhD in Material Science. Since 1994 he is with the Packaging Research Team at TU Berlin and Fraunhofer IZM. In 1997 he became head of a research group. In 2006 he was also a Research Associate Professor of Electrical and Computer Engineering at the University of Utah, Salt Lake City. The focus of his work was Wafer Level Packaging applications with a focus on materials. Since 2015 he is part of the business development team at Fraunhofer IZM. Michael Töpper is Senior Member of IEEE-CPMT and has received the European Semi-Award in 2007 for WLP. He has published several book chapters and is author and co-author of over 250 publications.

Passive wireless SAW sensors using advanced piezoelectric material and structures

Ballandras, Sylvain
CEO
frec|n|sys SAS

Abstract
Passive acousto-electric devices are extensively used for now quite a long term for various radio-frequency applications. Among all of these, the possibility to develop sensors and associated systems using surface acoustic wave (SAW) or bulk acoustic wave (BAW) devices has been widely investigated and has yielded numerous academic as well as industrial developments. Particularly, the capability of these devices to be remotely controlled without on-board power supply has received a growing interest during the passed 15 years. Different strategies can be implemented for probing these sensors, based on time-domain analysis or using spectrum techniques depending on the sensor nature. Whatever the considered approach is, an effort must be paid to adapt the device architecture to a reliable translation of the perturbing effect. The accuracy of the system is therefore controlled by the stability of the measurement approach. According to targeted resolution/accuracy, these sensors can be used for monitoring temperature, pressure, stress or any combination of these parameters in industrial or day-life process. These devices have made an extensive use of standard single-crystal substrates such as quartz, lithium tantalate and niobate. However, new challenges have pushed the development of alternative crystals (Langasite and related materials, GaPO4, BST, etc.) particularly suited to high temperature applications and also composite wafers based on piezoelectric films on Silicon Sapphire and other non piezoelectric substrates. In this presentation, we introduce basic principles of radio-frequency acoustic devices and the various structures usually implemented for sensors. Several examples allows for illustrating the implementation of these devices and a focus is then proposed on material development for wireless SAW/BAW sensors. We provide an outlook of state-of-the-art wireless applications, with a discussion on further developments of such devices and their relation with IoT.

Biografie
Sylvain Ballandras was born in Strasbourg in 1965. He joined the CNRS in 1991, after his PhD in Engineering Sciences from the Université de Franche-Comté. He joined Thomson Microsonics in 1997 for a one year industrial training project. From 1999 to 2005, he was responsible of the Acoustics & Microsonics research group at CNRS/LPMO. He also created at that time a consulting office to answer other demands from industry. In October 2003, he was promoted Research Director at CNRS, in the newly created FEMTO-ST Institute in Besançon. From 2005 to 2008, he was co-director of the joined laboratory between TEMEX company and FEMTO-ST devoted to SAW filters and sensors. In 2008, Sylvain Ballandras group joined the Time-Frequency Department of FEMTO, creating the CoSyMA research platform for industry/academic partnership in acoustics. He has been involved in the creation of SENSeOR, a company dedicated to wireless SAW sensors as CSO (part time) of the company from the end of 2008 till beginning of 2012. In March 2013, he left the CNRS to create his own company, frec|n|sys, devoted to the design, fabrication and marketing of SAW resonators and filters, acoustic-based RF-MEMS devices and SAW sensors for harsh environment applications. He was laureate of the French Research Ministry contest for innovative company creation in 2013. frec|n|sys has received several honorary recognitions to encourage its growth from 2013 till today. Sylvain Ballandras is a member of the IEEE UFFC Society.

Maximum Utilization of Chemically Amplified Resist

Momota, Makoto
Research Manager
FUJIFILM Corporation

Abstract
Variety of technologies have been developed to overcome resolution limit on photolithography because of the smaller design rules to realize low voltage, high integration, cost down, etc. For the purpose, photo resist plays the one of the important roles to drive pattern shrinkage, where FUJIFILM proposed Negative Tone Development (NTD) in order to fully utilize ArF Chemically Amplified Resist (CAR) capability since 2005. Organic solvent dissolves unexposed resist to form negative tone image, which process can print highly fine dark pattern by the high contrast of the bright mask. (e.g. hole or dark trench patterns formed by dot or bright line masks) In this presentation, chemistry and features of NTD will be described, besides, NTD can be diverted to KrF or EUV lithography, of which expected advantages will be introduced, respectively.

Biografie
Makoto Momota joined Fujifilm Research & Development Centre in 1990, then to move Fujifilm Electronic Materials Japan in 2003. In 2005, he was relocated to Fujifilm Electronic Materials U.S.A. as a Product Development Manager for advanced 193 nm resist. He had developed variety of photo resists from i-line, 248nm, up to 193nm, who is currently involved in Electronic Material Research Laboratory in Fujifilm since 2007 as a Research Manager, for advanced resist materials development.

The Industrial Internet (IIoT) Opportunity

Rudd, Douglas
Sr. Marketing Manager, Channels & Alliances
GE Digital

Abstract
The industrial internet represents a never before seen potential for the European economy. We have the talent, knowledge and infrastructure to actively participate in the productivity revolution and the digital transformation must be at the core of this mission.

Biografie
Mr. Rudd is a Sr. Marketing Manager, Channels & Alliances at GE Digital Europe.

Monitoring of Atomic Layer Deposition processes using remote optical emission spectroscopy

MEYER, FLORIAN
TECHNICAL SUPPORT ENGINEER
Gencoa Ltd

Abstract
Atomic layer deposition (ALD) is a key process in the fabrication of semiconductor devices. Effective monitoring of these processes is important for reduced setup time of the process as well as detection of contaminants during the deposition. Conventional residual gas analysers, such as quadrupole RGAs, have difficulty monitoring ALD processes due to the high process pressures (typically above 1E-4 mbar) and the presence of hydrocarbons contained within many ALD precursors. These hydrocarbons often contaminate the RGA filaments, rendering the sensor unusable. An alternative gas monitoring sensor that operates directly at pressures above 1E-4 mbar has been built around plasma emission monitoring. A small “remote” plasma can be generated inside a vacuum sensor. Consequently, species that are present within the vacuum will become excited in the sensor’s plasma, emitting a spectrum of light, which can then be used to identify and monitor the emitting species, resulting in a robust, multi-purpose vacuum sensor. Crucially, this sensing method has been shown to be robust when exposed to the ALD processing environment. This presentation will describe the principal of this sensing method and present examples of its use in monitoring ALD precursors such as water vapour, ammonia, trimethylaluminium (TMA) and tert-butylimidobisethylmethylamino (TBTEMN).

Biografie
After finishing his B.Sc. in Electrical Engineering at TU Braunschweig, Florian Meyer joined Gencoa’s R&D team in October 2015 for an internship. In October 2016 he went back to Germany to work as Technical Sales and Support Engineer for Gencoa’s customers in Germany and Europe.

Enabling an End-to-End Ecosystem for 22FDX - Materials, Design, Manufacturing

Cordovez, Juan
Region Head, EMEA
GLOBALFOUNDRIES

Abstract
FDSOI technology has benefited from appreciable market traction by delivering low-power and cost-effective-performance to wireless and battery-powered applications. In order for such an advanced technology to efficiently serve its target markets, it requires a robust end-to-end ecosystem that enables prompt and high-quality delivery of differentiated solutions. Specifically, the complexity and compressed schedules of organic product development have reached inaccessible levels, therefore platform ecosystems must be crafted to create an open market place for tailored solutions and services that lower the barrier of entry into next generation silicon. To this end, the GLOBALFOUNDRIES 22nm FDSOI “22FDX®”technology, has been deployed accompanied by a complete ecosystem – from substrate to packaging - that offers open access to enablers that accelerate the development of wireless, IoT, automotive, and mobility segment solutions. This work will present the 22FDX design ecosystem features and focus on FDSOI materials, semiconductor and system design methodology, fabrication, and value-add service offerings. Examples of these ecosystem value adders will be presented including FDSOI-specific use-cases related to materials, design, and manufacturing.

Biografie
Juan Cordovez joined GLOBALFOUNDRIES in November 2012 and brings almost 20 years of semiconductor customer engagement, field technical sales, and design innovation experience. He leads the GLOBALFOUNDRIES EMEA Region and is responsible for end-to-end customer engagement from lead through revenue. Prior to this Sales and Business Development role, Juan led the GLOBALFOUNDRIES Customer Design Enablement team including including ownership of Field Applications Engineering, PDK, Device Modeling, and Design Methodology. Prior to GLOBALFOUNDRIES, Juan served as Vice President of Sentinel IC Technologies. In this role he conceived business model and founded independent design enablement startup focusing on RF/analog/power design productivity. Juan was architect and principal programmer of several patented RF CMOS SoC and BCD IC design productivity tools as well as lead for customer engagement and software support. Prior to founding Sentinel, he was the manager of Design Enablement and Design Support at Jazz Semiconductor. Prior to Jazz Semiconductor, he was with Conexant Systems in the Advanced Process Technology group. Juan received BS and MS degrees in Electrical Engineering from the University of California, Irvine. He has authored over 12 technical publications and educational seminars, holds several patents in the area of IC Design Enablement, and is a Senior Member of the IEEE.

Beyond full automation

Rothe, Jan
Manager Factory Solutions Group
GLOBALFOUNDRIES

Abstract
With the full automation of standard manufacturing scenarios, the focus in leading edge semiconductor manufacturing has moved to fab performance optimization, to reducing the remaining manual exception handling tasks for the manufacturing workforce and to prioritization of such tasks. The key challenges to this endeavor are the identification of the most problematic exception cases, the implementation of fully or partially automated solutions for these and in developing prioritization methods for operators to address the most critical manual efforts in the right order. Due to the ever-growing number of data sources as well as the sheer amount of data that is available for such analysis in a modern factory, new ways of addressing the analysis challenges are required. In addition, new process requirements drive increasingly complex dynamic run-path decisions and constraints. Such process complexity driven restrictions are detrimental to the ideal manufacturing flow. On the other hand, elimination of all of these constraints – while potentially possible – requires significant effort. It is therefore of increasing importance to better understand the effect of these constraints on manufacturing performance to be able to focus on those constraints benefits of resolving these largely outweighs the corresponding effort. In our presentation we will present several case studies addressing both the data analytics as well as the task prioritization methods GLOBALFOUNDRIES has developed to overcome these challenges.

Biografie
Jan Rothe holds a PhD in computer science from the Dresden University of Technology. He joined Advanced Micro Devices in 2004 and in 2009 became a member of the Manufacturing Technology department, being responsible for high automation scenarios. Today he manages the Factory Solution Group with oversight of manufacturing systems for all 300mm factories at GLOBALFOUNDRIES, including Factory Flow and Operator efficiency solution development. Dr. Rothe is an active member of the SEMI standards program and received a SEMI International Collaboration Award for leadership of an international SEMI task force.

Low power circuit architectures for 22FDX-Technology

Teepe, Gerd
Director Marketing for Europe
GLOBALFOUNDRIES

Abstract
The „Internet of Things” (IoT) is identified as the new driver for semiconductor growth. Emerging applications like machine vision, virtual reality and automotive advanced driving functions are becoming the next big driver for the microelectronics industry. Also, new RF-architectures for 5G-radios will be driving significant silicon volumes in the future. In this context the FDSOI-Technology offers significant power reductions, as this technology comes with a substantial new design freedom on the back-gate bias control. Those circuit functions can be used to steer the circuit into high performance or into low power at run-time through software control. It can also be used for Process-Voltage-Temperature (PVT) corner tightening, when the supply voltage is reduced down to 0.4 Volt. This point operates close to the transistor threshold voltage, where spreads on transistor parameters are widening. Here the back-gate bias mechanism provides a very smart compensation method. GLOBALFOUNDRIES has developed the 22FDX™-Technology, a planar, fully depleted SOI-technology with a roadmap into 12FDX™. Compared to bulk technology, 22FDX™ realizes significantly higher transistor packing densities. The greater drive strength of the transistors can be used for higher clocking speeds than bulk or, alternatively, to reduce the power dissipation. FDSOI-technologies like our 22FDX™-Technology are a natural progression path forward from bulk-based silicon technologies for low power embedded-control- and for the emerging IoT-applications.

Biografie
Dr. Gerd Teepe Director Marketing for Europe CMOS Platforms Business Unit In his role as Director Marketing for Europe, Gerd is responsible for leading the CMOS Platforms marketing initiatives in this region. Prior to this, he was leading the Design Engineering Organization of GLOBALFOUNDRIES in Europe. Dr. Teepe has been with this company since its creation in 2009 and is based at the FAB1-site in Dresden. Before GLOBALFOUNDRIES, Gerd was with AMD, Motorola-Semiconductors, and NEC, Japan in R&D, Design, Product Management and Marketing roles. Gerd holds a Master’s Degree and a phd. from Aachen University (RWTH), Germany.

FeFET: The embedded non-volatile memory for leading edge HKMG CMOS technologies

Dünkel, Stefan
Integration Engineer NVM
GLOBALFOUNDRIES Fab1

Abstract
Ferroelectric HfO2 enables a scalable and CMOS compatible embedded non-volatile memory (eNVM), keeping pace with the scaling demands of leading-edge logic technologies. We have developed an innovative and non-invasive eNVM process applicable for HKMG technologies. The hafnium-based FeFET was embedded into GLOBALFOUNDRIES high-volume gate-first 28nm HKMG super low power platform (28SLP). The simultaneous integration of CMOS devices together with the FeFET on the same chip is demonstrated in this talk. The FeFET gate stack (material, thickness, etc.) can be optimized independently from the baseline 28nm device integration. An arbitrarily mixed placement of CMOS and FeFET devices in the same circuit is possible. We will show test results of an embedded 32 MBit memory array and discuss pattern write and read capability. High temperature data retention, program/erase endurance and benchmarking against other memory concepts will be presented.

Biografie
Dr. Stefan Dünkel received the Diploma (Dipl.-Ing.(FH)) in electrical engineering in 2005 from the University of Applied Sciences Dresden, Germany, and his PhD in microelectronics from Dresden University of Technology in 2010. In the same year, he joined GLOBALFOUNDRIES, working as a device engineer on the development of 45nm, 32nm and 28nm SOI and bulk CMOS technologies. Since 2015 he is working as an integration engineer in the embedded-NVM group focusing on the development and prototyping of different memory concepts. Dr. Dünkel is author or co-author of more than 40 publications in scientific journals or at scientific conferences and inventor or co-inventor of about 75 patents.

Strategy to Assess and Mitigate Chip Package Interaction Risk Factors for Automotive Application

Kuechenmeister, Frank
Principal Member Technical Staff
GLOBALFOUNDRIES Inc.

Abstract
Automotive is the fastest growing segment in the Foundry business and a major driver for innovation in electronics. The development in the automotive industry is increasing tremendously the complexity and variety of the electronics in modern cars. And these requirements for substantial computing power resulting in the need of advanced silicon solutions. Package-induced failures in the Back End of Line (BEoL) metallization layers in advanced silicon technology nodes have drawn attention in the industry resulting in significant research and development activities. The concern is caused by the selection of the set of materials in BEoL, the transition from SnAg bumps to Cu Pillars, the transition from Au to Cu wire bond and the use of cost improved package solutions. A systematic approach is needed to understand CPI related risk factors especially in conjunction with the application in the automobile industry. The understanding of the different failure modes and their influencing factors is essential to reach highest level of reliability. One approach is the establishment of methods which can give quantitative data beyond the standard reliability stress tests. The paper will reveal a general strategy to assess these risks starting from data generated on wafer level (blanket film and integrated BEoL stack) to an early risk assessment on package level. The understanding of the different failure modes for automotive application and their influencing factors is essential to reach highest level of reliability. The approach is the establishment of methods which can give quantitative data beyond the standard reliability stress tests for consumer application. The paper will discuss the design and functionality of CPI test structures incorporated on the test vehicles. The paper will reveal data for the qualification envelope for different interconnect technologies including wire bond and wafer level packaging fan-out with focus on 22FDX® technology.

Biografie
Dr. Frank Kuechenmeister received a Diploma in Polymer Chemistry and a doctorate in Chemistry from the University of Technology in Dresden, Germany. He held post-doctoral appointments at the Departments of Polymer Science at the ETH Zuerich, Switzerland, the University of Massachusetts in Amherst, USA and the Department of Electrical Engineering and Micro Systems at the University of Technology in Dresden, Germany. He joined AMD in 1999, which converted to become GLOBALFOUNDRIES in 2008 as process engineer working the area of C4 bumping. He was promoted to principal member of technical staff in 2016. He currently leads the chip-packaging interaction team and coordinates all related efforts throughout all technology nodes at GLOBAL-FOUNDRIES. Dr. Kuechenmeister holds more than 30 C4 bump and packaging-related patents and trade secrets.

A novel process chain for the embedding and interconnection of ultra-thin chips in flexible substrates

Zimmermann, Andre
Executive Board Member
Hahn-Schickard

Abstract
In order to truly make thin flexible systems smart the integration of ultra-thin Si-based chips is essential. This however requires the development of novel process chains for the reliable embedding and interconnection of the delicate chips. Here we present a novel, mask-less process chain based on conformal coating, laser direct imaging and inkjet printing of interconnections. As a completely digital process chain, this is particularly interesting for smaller batch sizes.

Biografie
André Zimmermann was born in Schweinfurt, Germany, in 1971. He studied chemistry and crystallography at Julius-Maximilians-Universität Würzburg as well as materials science with specialization in mechanical engineering at Technische Universität Darmstadt. After several stays in the USA at NIST and University of Washington he received his PhD in 1999 at Technische Universität Darmstadt. He held positions as group manager at the Max-Planck-Institute for Metals Research, Stuttgart, and as senior manager for electronic packaging within the corporate research and development of Robert Bosch GmbH in Waiblingen. Since January 2015, he is professor for micro technology at the Institute for Micro Integration (IFM) of the University of Stuttgart. Simultaneously, he is the head of the Institute for Micro Assembly Technology at Hahn-Schickard in Stuttgart.

The Impact of Connecting Cars into the Internet of Things

Miles, Dean
SVP & Head of Automotive Sales Connected Services at HARMAN International
Harman

Abstract
Provide the lay of the land for electronics industry. Their current developments of technology. Who they see their strategic partners being. Significant changes in the marketplace with respect to the amount of data being transmitted into an electronic device via wireless and what they are doing to ensure cyber security.

Biografie
An adaptable and proactive Manager with varied experience in Project and People Management. An excellent communicator and leader who adopts a highly motivated and committed approach to all endeavors, developing effective solutions and ideas to improve performance and deliver results. A team player with the ability to meet targets and deadlines, remaining calm and focused when working under pressure. Specialties: Project Management, Operational Management, Team Leadership, Financial planning, Target setting and Monitoring, Product Design, Cost Management, CMMi process compliance.

Magnetic functionalities for flexible interactive electronics

Makarov, Denys
Head of research group
Helmholtz-Zentrum Dresden-Rossendorf e.V.

Abstract
The flourishing and eagerness of portable consumer electronics necessitates functional elements to be lightweight, flexible, and even wearable. Next generation flexible appliances aim to become fully autonomous and will require ultra-thin and flexible navigation modules, body tracking and relative position monitoring systems. Such devices fulfill the needs of soft robotics, functional medical implants as well as on-skin electronics. Key building blocks of navigation and position tracking devices are the magnetic field sensors. We developed the technology platform allowing us to fabricate high-performance shapeable, namely, flexible, printable, stretchable and even imperceptible magnetic sensorics [1]. The technology relies on smart combination of thin inorganic functional elements prepared directly on flexible or elastomeric supports. The unique mechanical properties open up new application potentials for smart skins and wearables, allowing to equip the recipient with a “sixth sense” providing new experiences in sensing and manipulating the objects of the surrounding us physical as well as digital world. Combining large-area printable and flexible electronics paves the way towards commercializing the active intelligent packaging, post cards, books or promotional materials that communicate with the environment and provide the respond to the customer. For this concept, we fabricated high performance magnetic field sensors relying on the giant magnetoresistive (GMR) effect, which are printed at pre-defined locations on flexible circuitry and remain fully operational over a temperature range from -10°C up to +95°C, well beyond the requirements for consumer electronics. Our work potentially enables commercial use of high performance magneto-sensitive elements in conventional printable electronic industry, which, although highly demanded, had not yet been possible. [1] D. Makarov et al., Shapeable magnetoelectronics, Appl. Phys. Rev. (Focused Review) 3, 011101 (2016).

Biografie
Denys Makarov is head of the research group “Intelligent materials and devices” at the Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Germany. His work is influential for the topic of magnetism in curved geometries and opened up new research field of spintronics on flexible, bendable and stretchable surfaces enabling the magnetic field sensorics to be reshaped on demand after its fabrication. These so-called shapeable (flexible, printable and stretchable) magnetoelectronics have great potential for eMobility applications and in medicine. These activities are supported by major projects, such as ERC, ERC Proof of Concept and EU FP7-ICT FET Young Explorers Grants. Denys is a Senior Member of the IEEE.

Ultra-Low Warpage Liquid Compression Molding (LCM) Development for Advanced Wafer Level Packaging

Chao, Jay
Sr. Scientist
Henkel Electronic Materials LLC

Abstract
As the size of electronic devices is getting thinner and smaller, the requirements for semiconductor and automotive packaging materials become more and more challenging. Especially in Wafer Level Packaging (WLP), there’s a strong need for advanced liquid compression molding (LCM) materials with improved warpage control and finer filler in order to meet the more sensitive process requirements. Regardless the package design variation, Fan-Out or Fan-In type, the warpage issue is driven by the reduced (thinner) package dimensions and the nature of CTE mismatch between thermoset encapsulant and silicon wafer. On top of this, tighter environmental requirements driven by REACH are asking for replacement of anhydride based resins being commonly used in LCM materials today. Recently, Henkel developed a new type of anhydride free LCM material with lower cure shrinkage and finer filler that demonstrates much improved (ultra-low) warpage control after molding of Fan-Out type of wafer level packages. Furthermore, the low warpage level is maintained after several process steps and thermal aging. The low warpage and less cure shrinkage allows polymer molecules to have less stress during reliability tests. Compared to traditional anhydride-based LCM, our reliability data (after 500 cycles of uHAST & AATC) already demonstrates advantage of no filler-fall-off, no delamination, better chemical resistance, etc. For workability, the new system has improved work-life, fast-cure at 110-130 Celsius, good gap filling, etc. Taking advantage of the proprietary resin and formulation design, Henkel’s new LCM materials are currently widely evaluated with positive results in new FO-WLP designs and WLCSP applications asking for 5-side or 6-side protection.

Biografie
Jay Chao, earned Ph. D in Materials Chemistry at the University of Michigan. He started as project supervisor in 2003 with National Starch (later, part of Henkel Electronics, based at Bridgewater, New Jersey, USA). He then became scientist and senior scientist with the company, having in-depth experience in many electronic adhesive areas, such as electronic die-attach, barrier and sintering materials, advanced packaging materials. He is currently product development senior scientist at Henkel Electronics, Irvine, CA.

Enabling Materials for Semiconductor and Sensor Assembly

de Wit, Ruud
EIMEA SU Head Semiconductors
Henkel Electronic Materials NV

Abstract
Henkel's Electronic Materials division is globally active in developing and offering specialized adhesives, encapsulants, coatings, inks and soldering materials for automotive, industrial and consumer electronics applications AND semiconductor and sensor assembly. Using its broad technology toolbox, the Henkel Semiconductor steering unit is successfully developing innovative solutions in liquid, film and B-stage format for : - Advanced semiconductor packaging (like low warpage wafer level encapsulation and 3D interconnect) - RF and Power device assembly (like high conductivity die attach, Insulating Metal Substrates and in-package EMI shielding) - MEMS sensor assembly (like ultra-low and stable modulus <1 MPa) - CMOS Image and Biometric sensor assembly (requiring low outgassing and low temperature cure <80 Celsius) During this Forum presentation several of these new developments for Semiconductor and Sensor Packaging will be briefly highlighted. Of course, more detailed information can be discussed and shared at the Henkel booth B1-1567.

Biografie
Ruud de Wit is active in Semiconductor and Sensor Packaging since 2000 when Henkel started its specialized Electronic Materials division. During more than 25 years of Henkel service, Ruud gained broad experience in multiple roles like technical support, quality assurance, account management and business development. Ruud is currently heading the Henkel's Semiconductor steering unit in EIMEA.

Conductive Die Attach Adhesives – Effect of Aging at 200C and correlation with Chemical Base

Winster, Tony
Technical Advisor
Henkel Ltd

Abstract
The choice of die attach adhesive used within a molded package can have an effect on the package reliability and lifetime. Latest generation automotive electronic components tend to have higher power dissipation than previously, and also are frequently located in harsher environments, leading to significantly increased operating temperatures – in some cases up to 200C. Therefore the selection of all materials becomes more critical. This work reports the results from an on-going study of a range of electrically conductive die attach materials, based on different chemistries (Epoxy, BMI, Polyimide and Silicone) applied in paste and film formats. Chips with bare silicon and silver metaillised backsides are included in the evaluation, as are leadframes with bare Cu, silver plating and PPF plating. The aim is to allow selection of the most appropriate chemistry for existing applications, and to guide product development for future requirements.

Biografie
Tony Winster is an Application Engineer supporting Henkels Semiconductor packaging products in Europe. He studied Metallurgy & Materials Science, before working on materials & packaging methods for high reliability circuits. He joined Ablestik in 1989, and has continued his technical support role with Henkel since 2008.

Air and water quality monitoring with low cost sensor networks

Zevenbergen, Marcel
Sr. researcher
Holst Centre/imec

Abstract
Both air and water quality has a strong influence on human health and wellbeing. Monitoring the air/water quality and making the data available to end-users is the first step towards awareness for a healthier society and environment. To achieve this goal, measuring sufficient spatial and temporal data is critical and hence dense sensor networks are needed, both indoor and outdoor. The sensors in these networks need to be relatively low cost, preferable small and low power. The talk will outline the state of the art in gas and water sensors for air/water quality monitoring networks and considers emerging and potential future developments. Outdoor gas sensor network will mainly monitor pollution and measure pollutants including nitrogen monoxide (NO), nitrogen dioxide (NO2), sulphur dioxide (SO2), carbon monoxide (CO), ozone (O3) and volatile organic compounds (VOCs). In case of indoor applications, air quality is more related to comfort (temperature, humidity, carbon dioxide (CO2)) or to safety (VOC’s, CO). Holst Centre/imec the Netherlands is developing wireless sensors nodes that are able to quantify multiple parameters (both with of-the-shelf and in-house developed sensors) validated in real life applications. For water quality monitoring, I will introduce a single-chip electrochemical sensor for simultaneous detection of multiple ions in fluids. The first generation is able to quantify pH and conductivity, two crucial parameters for water quality assessment. This sensor solution is a generic platform that can be extended to other ions tailored towards specific applications beyond water quality, such as monitoring of nutrient concentrations for agricultural applications and disposable point-of-care solutions for bodily fluids. Next to sensor technology, also smarter network design, smarter data use and new tools will be shown. The need for good calibration and reference measurements, to ensure good data quality from these sensor networks, will be discussed.

Biografie
Dr. Ir. Marcel Zevenbergen received his PhD in physics at Delft University of Technology in 2009. During his PhD, he developed an electrochemical sensor capable of detecting single molecules in solution. In 2010, he joined Holst Centre/imec the Netherlands where he develops novel electrochemical sensors for water quality, nutrient monitoring and healthcare.

Integration of Connected Vehicles

Gern, Michael
General Manager, Automotive and Manufacturing Solutions at Hortonworks
Hortonworks

Abstract
The US oem perspective on the integration of all various technologiies including wireless networks, semiconductors, computer storage, high speed data transfer. Sensor technology. Machine learning and AI. Overview of the barriers and challenges with respect to this technology development and integration.

Biografie
Watch for a complete Bio on the SEMICON Europe website.

Speed up Wafer-level Magnetic Test

LEBRUN, Laurent
CEO
Hprobe

Abstract
Hprobe offers a 3D magnetic field wafer tester for all types of magnetic devices : - Planar and perpendicular Magnetic Tunnel Junction (MTJ) - STT-MRAM - SOT-MRAM - TMR sensors Hprobe has developed a unique patented technology of multidimensional magnetic field generator for magnetic devices and sensors wafer level characterization and testing. With our 3D generator technology, each magnetic field spatial axis is driven independently. User can apply and control the magnetic field in any direction of space, as well as generate rotating fields. The Hprobe equipment is a plug and play 100mm to 300mm automated wafer tester for magnetic devices and sensors. Our wafer tester is the preferred tool for wafer level characterization and testing under magnetic field. It uses a patented 3D magnetic field generator and state of the art, customizable, commercial hardware to bring a full test solution for all magnetic devices, from sensors to MRAM. A full software for wafer level testing automation is available which includes the magnetic sources generation, a set of pre-defined tests for electro/magnetic parameter extraction on thin films materials, MRAM and sensors.

Biografie
Laurent LEBRUN – CEO – « Arts et Métiers » engineer, PhD

FD-SOI film-thickness metrology

Braun, Sebastian
project/product leader
HSEB Dresden

Abstract
The newly evolving technology of building transistors superior in speed and/or power consumption on fully depleted silicon on insulator wafers (FD-SOI) is well known to be critical dependent on film thickness homogeneity of the silicon and BOX layer used. These transistors compete with the early FINFET or if combined with it makes its production easier while boosting FINFET performance to even higher parameters at the same time. The threshold voltage of a FD-SOI transistor is reported to depend with 25 mV/nm on a nominal 8.5 nm thick silicon SOI film thickness (Khafikirooz et al, 2010). Hence, in order to gain the full benefit of the FD-SOI technique the silicon film thickness and its homogeneity needs to be tightly controlled during wafer and chip manufacturing. Any thickness variation makes the low voltage operation worse by dictating to run the chip at the voltage level of the worst transistor. We present a metrology technique in shape of an AOI tool dedicated to this purpose. The system combines the extreme thickness resolution and accuracy of sub-Angström range with the needed high spatial resolution and a production worthy wafer throughput. The lateral resolution can be adjusted by recipe parameters to the user needs from full wafer overview to sub-micron resolution. We use an all optical method with special emphasis on high reliability and reproducibility. Results of the tool performance checks like reproducibility and accuracy are reported. Measurement results are presented for a range of production wafers. The tool is a new part of HSEB’s field proven modular tool platform for fully automated inspection and metrology applications. Thus, it can run fully automatic as well as in a manual mode and incorporates all automation requirements in a SEMI conform manner.

Biografie
Sebastian Braun did his master degree in Mechatronic (deepening: Simulation and Control) at the Technical University Darmstadt in 2013. After participating as product developer in different minor medical and automation projects, in 2014 he was promoted to leadership of a comprehensive redevelopment project of a cable manufacturing machine. After completion of alpha and beta phase, he changed to HSEB and assumed the product management of BALDUR platform in 2016.

NFC and printed electronics – a perfect match for flexible NFC sensor tags

Germann, Thomas
R&D Project Engineer
Identiv GmbH

Abstract
Recently, more and more NFC tag chips have become available that exhibit functionality beyond pure identification or delivery of NDEF Messages (= NFC Data Exchange Format): Some with integrated sensors, GPIOs or I2C Master capabilities, up to full-blown microcontrollers. Since roll-to-roll NFC tag assembly machines rely on as little components as possible being placed onto flexible substrates, printed electronics is a perfect match in order to enable mass-production of novel NFC sensor tags: Each upwinding and unwinding process bears the risk of disconnecting a rigid discrete component from the flexible substrate, or even of breaking the chip. Therefore it is desirable to have as little machine passes in the assembly machine as possible, which are required for each component – preferably only one, but two at maximum. Especially printed resistors, sensors, batteries and indicator elements help Identiv build solutions based on next generation NFC tags for the logistics, industrial, pharmaceutical and medical area. Identiv has recently built and released the first fully flexible NFC sticker that carries an NFC ASIC chip with an integrated temperature sensor and a datalogging state machine that are connected to a printed battery. Together with an NFC enabled smartphone and a companion app, cold-chain monitoring can effectively be performed without the need to deploy expensive reader-infrastructure in a large scale. An updated version based on an NFC-enabled ARM Cortex M0+ has been launched this year. Another example is a passive sensor tag that communicates by means of an NFC-chip with I2C-Master capability with any kind of I2C-enabled sensor, whereas the pull-up resistors are printed to reduce discrete component count and enable mass production Identiv is taking a leading role in integrating printed electronics into their products, especially concerning upgrading Identiv’s production equipment for manufacturing and at testing every single produced unit.

Biografie
Thomas Germann joined Identiv in 2013 as Development Engineer in the R&D department of Identiv’s RFID transponder & reader business unit. He is mainly responsible for development of novel UHF & HF RFID tags, as well as NFC products with functionality beyond pure identification. Thomas brings a strong background in RFID label and printed electronics product development from his previous work, which enable the product & process development of cutting edge flexible RFID & NFC sensor tags and corresponding systems. Thomas holds a Diploma (M.Sc.) in Engineering Physics from the Technische Universität München (TUM).

Towards Graphene-based heterojunction devices for microelectronic applications

Wenger, Christian
Team leader
IHP

Abstract
The integration of dielectrics or semiconductors on Graphene is of critical importance for the development of a new generation of Graphene-based hetero-junction devices. The deposition of a high-k dielectric, like Al2O3 or HfO2 or of Silicon on top of Graphene is still challenging due to Graphene's lack of dangling bonds. In this paper, two strategies for the dielectric-Graphene and Silicon-Graphene integration will be presented. Atomic Layer Deposition (ALD) or Atomic Vapour Deposition (AVD) processes have been explored to deposit high-κ dielectrics on Graphene with negligible damage of the Graphene layer. However, the nucleation of the dielectric film is hindered by the chemical inertness of the Graphene surface. Therefore, the initial ALD or AVD growth on Graphene requires a functionalization of the pristine Graphene surface with reactive groups. Plasma enhanced CVD (PECVD) is of interest for applications requiring low thermal budgets such as the back end of line (BEOL). However, high energy ion bombardment related to plasma exposure readily correlates with worsening of material properties. We demonstrate, that by the use of PECVD at a very high frequency of 140 MHz, thin a-Si:H layers can be grown softly without changing the properties of the underlying Graphene significantly. The herein presented deposition strategies for dielectrics and semiconductors on Graphene surfaces demonstrate a significant progress towards a complete fabrication scheme of Graphene-based heterojunction devices in microelectronic technologies.

Biografie
Christian Wenger received the Diploma in physics from the University of Konstanz, in 1995 and the Ph.D. degree from the Technical University of Dresden, in 2000. Since 2002, he has been with the Innovations for High Performance Microelectronics (IHP), where he works in the field of functional devices for medical and space applications. In 2009, he received the post-doctoral degree at TU Dresden. He has authored and co-authored more than 150 papers and holds 6 patents.

SiGe BiCMOS and Photonic technologies for high frequency and communication applications

Mai, Andreas
Department Head
IHP

Abstract
In last decades the continuously improvement of SiGe-BiCMOS technologies fulfilled the increasing demand for novel high speed mm-wave applications as optical networks, automotive radar or imaging and sensing systems. Moreover photonic-electronic co-integration and scalability of certain photonic solutions moved into the focus of technology developments worldwide. In this talk we will present recent progress in device developments of SiGe heterojunction bipolar transistors and related BiCMOS technologies exceeding the 0.5 THz regime as well as monolithic integrated silicon photonic components in a SiGe BiCMOS environment for electronic-photonic-circuit technologies. Based on these technologies circuit developments for broadband optical communication, high frequency circuits for wireless communication up to 240 GHz as well as transceiver circuits and photonic-electronic ASICs will be presented.

Biografie
Dr. rer. nat. Andreas Mai received his diploma degree in physics from the Technical University of Brandenburg in 2006 and his PhD in 2010. He joined the “Process Integration” group of the IHP Technology department and his main research was focused on the development of a 130nm SiGe-BiCMOS technology for mm-wave applications and the integration of RF-LDMOS transistors. He leaded the “Process Integration” group with the responsibility for service and certain research activities as well as technology developments at IHP and became the acting department head of the “Technology-Department” in IHP in 2015. He is an IEEE member, Chair of the ECS-SiGe processing symposia and head of the Joint-Lab between University of Applied Sciences Wildau and IHP.

New impulses for sensing in automotive: automated driving and electrification in the new infrastructure

Dixon, Richard
Principal Analyst Sensors
IHS Markit

Abstract
The automotive industry has never been in such a state of flux. Electrification of the engine and automation of the driver function, not to mention connectivity to the world at large, are three of the main factors sculpting the automotive landscape in the next 20 years. Vehicle architectures, systems and components will all be radically affected as a result, and new opportunities will certain result. In this presentation IHS Markit will address the technology for some interesting new applications for sensors, including - In cabin driver monitoring for L3 applications using TOF sensing - Technology for LIDAR-based distance sensing applications - High quality audio experiences using MEMS microphones - Precision navigation in support of automated driving using MEMS inertial sensors - Current sensors for electric cars IHS will also discuss the ramifications for existing sensing applications, some of which will disappear.

Biografie
Richard Dixon, PhD Principal Analyst, Automotive Sensors Richard Dixon is Principal Analyst for Automotive Sensors at IHS Markit and author of more than 30 automotive-related consulting and market research studies. He is a world-renowned expert on all aspects of passenger car sensors used in safety, powertrain, infotainment and body applications. His responsibilities comprise the development of databases that forecast market demand for more than 20 types of sensors (MEMS, magnetic, inductive, ceramic...) deployed in more than 100 automotive applications. His most recent research includes mapping the entire sensor requirement by engine and exhaust system at car model level and sensors for future automated driving. As part of his duties he has supported organizations with custom studies, e.g. future scenarios for car sensors or analyzing the automotive supply chain. Prior to IHS Markit, Richard was a senior analyst at iSuppli with responsibility for MEMS and sensors in automotive and industrial sectors. Prior to his work as an analyst, Richard Dixon worked as a journalist in the semiconductor industry, and also has five years of experience as a commercialization professional providing support for early stage NASA technologies. Richard graduated from North Kent University with a degree in materials science and earned a doctorate from Surrey University.

(R)Evolution in Automotive Electronics: New Technologies and Architecture

De Ambroggi, Luca
Senior Principal Analyst
IHS Markit

Abstract
The increasing electronics system complexity and the need to optimize the development and manufacturing process is driving a revolution in the in-vehicle electronic architecture. The presentation will go through the major drivers and enablers of such transformation and it will describe several factors that have triggered already for few years significant mind-set and architectural transformations for vehicle electronics. Such factors are affecting each single automotive domain, from Body to ADAS, passing through infotainment, and that will be influencing as well the entire vehicle architecture in terms of networking and interconnection of the several electronic control units (ECU). Just facing the vehicle architecture in its globalism, vehicle manufacturers might opportunistically leverage different trends, affecting different domains at different time, to control cost and hardware proliferation. As example, maintaining the overall number of ECUs under control is essential, and it can be achieved by integrating functionality (and ECUs) in a stable automotive domain like infotainment, while increasing the number of feature and ECUs in other segments, like ADAS, which still are quite dynamic, as well as still characterized by a relatively low attach rate. On the innovation side, new technologies will appear and further transform vehicles performance and the semiconductor market. Artificial Intelligence is in evolution: from Infotainment applications (voice and speech recognition) to Autonomous driving. IHS Markit expects AI to enable “real” self-driving vehicle, especially when targeting L4 and L5 autonomous levels. New algorithms and hardware optimized for AI in the automotive segment will materialize in the next few years, changing today´s application scenario.

Biografie
Luca De Ambroggi Senior Principal Analyst, Automotive Electronics & Semiconductors Luca De Ambroggi is responsible for all aspects of systems electronics and semiconductor research for telematics, infotainment, ADAS and related automotive applications. He also supports sales and marketing as well as strategic business development endeavors in the growing European automotive segment. Luca joined the company with 16 years of semiconductor industry experience, including product and design management and technical marketing. Having served a broad range of functions throughout his tenure, he possesses deep technical comprehension as well as an ability to address strategic market and business scenarios. He began his career as a design engineer with STMicroelectronics and has held various technical and marketing positions within both STMicroelectronics and Infineon. Luca graduated from the University of Catania in Electro-Technic Engineering. and he is fluent in Italian, English, and German

Is digital health dead?

Roashan, Roeen
Senior Analyst
IHS Markit

Abstract
A growing skepticism is causing key stakeholders in healthcare to doubt the value proposition of digital health, and whether it will transform how healthcare is delivered. This is likely what will push digital health to fulfill its promises of efficiency, quality and personalization. This session will provide an industry update on key application markets across clinical care, virtual healthcare, consumer medical, and sports, fitness and activity monitoring. In addition, these markets will be addressed alongside disruptive forces, such as artificial intelligence, genomics, and robotics. Does digital health require a complete new system for healthcare, or can it thrive in conventional healthcare models? The session will also try to answer these questions, as it is fundamental to whether continuous investment in digital health is appropriate or not.

Biografie
Roeen Roashan is a Senior Analyst in the Healthcare Technology research team at IHS Markit. His specific area of coverage is digital health, where he has developed an industry-leading intelligence service on topics such as consumer medical devices, virtual healthcare and wearable technologies. Roeen has been quoted in Forbes, Fortune, Time Magazine, Wall Street Journal, Washington Post, Le Monde and Al Jazeera. Before joining IHS, Roeen held positions in analyst and consulting roles. Roeen received his BSc from Copenhagen Business School in Denmark, where he conducted research on NFC based mobile payment systems. He received his MBA from California State University Long Beach in Long Beach, California. Roeen is currently based in Copenhagen, Denmark.

ECSEL OSIRIS Project : Development of a European isotopic SiC supply chain

PIOTROWICZ, Stephane
Research Engineer
III-V LAB

Abstract
OSIRIS project, a Research and Innovation Action (RIA), started on May 1st 2015. It aims at improving substantially the cost effectiveness and performance of gallium nitride (GaN) based millimetre wave devices. It proposes to elaborate innovative SiC materials using isotopic sources in order to offer thermal conductivity improvement of 30% which is important for SiC power electronics and microwave devices using GaN high electron mobility transistors (HEMT) grown on SiC semi-insulating substrates. The improved thermal SiC properties will be obtained by using single isotopic atoms for silicon and carbon, namely 28Si and 12C. The SiC wafer size will be targeted to 100mm (4-inches) which is today widely used in industry. For microwave GaN/SiC HEMT, this isotopic approach should create a complete shift in the currently used SiC substrate/GaN epi-wafer technology by growing the high thermal conductivity (+30%) semi-insulating SiC on top of lower cost semiconducting SiC substrates. The project is also evaluating HEMT microwave power performance improvement at 30GHz thanks to better thermal environment. For power electronics, this innovation will be essentially focused on thermal improvement not on price fall, i.e. better electron mobility at a given power dissipation as mobility and drift mobility decrease with temperature and also better carrier transport thanks to lower scattering rates. Schottky and p-i-n diodes will be tested using this material. This project involves partners from France, Norway, Slovakia, and Sweden. This Consortium is very complementary and this work could not be realised without this collaborative work at European scale as no country would have on its own the different expertises required. The presentation will give an overview of the project outcomes including isotopic material, GaN epitaxy, processing, physical simulation, thermal assessment and device performances.

Biografie
Stéphane PIOTROWICZ received the PhD. Degree in Electronics from the University of Lille in 1999 at Institute for Electronics Microelectronics and Nanotechnology (IEMN). In 2000, he joined the Thales Research Center and worked on the design of hybrid and MMIC power amplifiers on InGaP/GaAs HBT technology for Radar and Space Applications. He is currently in charge of the GaN HEMT for RF applications program at III-V Lab (a joint lab of Nokia Bell Labs France, Thales Research and Technology & CEA Leti). His background concerns design, modeling and RF characterization at transistor and circuit level as power switches, power amplifiers and low noise amplifiers for T/R modules.

Dekoster, Johan
Program Manager
imec

Biography
Johan Dekoster received the M.S. degree in Exact Sciences (Physics) in 1988 from the KU Leuven, Belgium. In 1993 he received the Ph.D. degree (Physics), also from the KU Leuven. From 1993 till 1999 he held postdoctoral fellowships from the Research Council and the Fund for Scientific Research at the Institute of Nuclear and Radiation Physics of the KU Leuven. In 1999 he joined the OTN business unit of Siemens. He was project leader for several development projects for data, voice, video and LAN. In 2007 he became program manager OTN at Nokia Siemens Networks. In April 2008 he joined imec as R&D manager of the Epitaxy group with responsibility on epitaxial deposition of group IV and III-V semiconductor materials. Since November 2012 he is program manager of the equipment and materials suppliers collaborations within the Semiconductor Technology and Systems unit at imec.

Adelmann, Christoph
Principal Member of Technical Staff
Imec

Biography
Christoph Adelmann obtained a PhD degree in condensed matter physics in 2002 from Université Joseph Fourier Grenoble for work at the CEA Grenoble. Until 2006, he was a postdoctoral research associate at the Department of Chemical Engineering and Materials Science at the University of Minnesota working on spintronic materials and devices. He subsequently joined imec where he is working as a Principal Member of Technical Staff in the Thin Films Group on metallic and dielectric materials for logic, interconnects, and memory as well as on novel devices for nanoelectronic applications. He is currently the technical lead of projects on advanced alternative metallization for BEOL as well as magnetoelectric and spintronic devices for beyond-CMOS logic applications.

Gate-All-Around MOSFETs based on Vertically Stacked Horizontal Nanowires

Mertens, Hans
Principal member of technical staff
Imec

Abstract
Gate-all-around (GAA) transistors based on vertically stacked horizontal nanowires are promising candidates to replace FinFETs in future CMOS technology nodes. First of all, GAA devices provide optimal electrostatic control over semiconducting nanowire channels, which enables downscaling of the gate length to below the FinFET limit, while maintaining low off-state leakage [1]. Besides, horizontally oriented nanowires are an evolutionary extension of FinFETs, as opposed to vertical nanowires which require more disruptive technology and design changes [2]. Finally, stacking of nanowires is relevant for enhancing the drive current per footprint. Based on these considerations, GAA transistors made of vertically stacked horizontal nanowires have been included in the ITRS roadmap to reduce the contacted gate pitch, which is a key figure of merit for CMOS device density, to below ~40 nm in 2019-2021 [3]. In the context of the industrial relevance described above, we present the fabrication of Si GAA devices on bulk Si substrates. Multiple processing aspects that are relevant for bulk CMOS technology definition are addressed, including stacking of 8-nm-diameter Si wires at 45-nm lateral pitch and 20-nm vertical pitch [4], and nanowire-compatible replacement metal gate processing in combination with threshold voltage tuning by dual work function metal integration [5]. Temperature restrictions for the formation of shallow trench isolation, and the interaction between N- and P-type junction formation on one hand and nanowire release processes on the other hand are discussed as well. [1] K. J. Kuhn, IEEE Trans. Electron Devices, vol. 59 (7), p.1813, (2012). [2] L. Liebmann et al., VLSI Tech. Dig., p.112 (2016). [3] The International Roadmap for Semiconductors (ITRS) 2.0, http://www.itrs2.net/ (2015). [4] H. Mertens et al., VLSI Tech. Dig., p.158 (2016). [5] H. Mertens et al., IEDM Tech. Dig., p.524 (2016).

Biografie
Hans Mertens is a principal member of technical staff at the international nanoelectronics research center Imec, based in Leuven Belgium. His main research interest is gate-all-around process integration based on group-IV semiconductors. Prior to joining Imec in 2012, he was a senior scientist at NXP Semiconductors, working on SiGe BiCMOS technologies for RF small-signal applications. Hans Mertens holds a M.Sc. degree in Applied Physics from Eindhoven University of Technology, and a Ph.D. degree in Physics from Utrecht University, both in The Netherlands.

END-OF-CMOS AND BEYOND CMOS, APPLICATIONS FOR ALE

Efrain, Altamirano-Sanchez
PMTS
imec

Abstract
The continuous increment of pattern density with the aim of following Moore’s law has brought many challenges to the integration processes involved in the manufacturing of integrated circuits (IC). Specifically, sub-N7 technologies require self-aligned processes to overcome lithography overlay (OVL) limitations. Atomic layer etch (ALE) or quasi-ALE approaches provide the means to develop high selective and self-aligned etch processes. For example, the patterning of contact to active in a N7 technology faced tight OVL requirements and tough litho-etch bias restrictions. These issues were solved thanks to a quasi-ALE process. In semiconductor technology roadmap, the usage of 2D (MX2) materials is foreseen as an alternative to Si, Ge, SiGe and III-V channels. The integration of 2D materials in a hetero-structure such as required by a tunneling field effect transistor (TFET) will bring etch challenges; for example: a) selective etch of Silicon and dielectrics to MX2. b) layer-by-layer etch of MX2 (MX2 thinning). In a first part, this presentation will cover some patterning approaches where quasi-ALE was successfully used. In a second part, the emphasis will be put on the etch challenges driven by the integration of 2D materials for future technology nodes, and how ALE can enable it.

Biografie
Efraín Altamirano-Sánchez is a Chemical Engineer and holds a PhD from the Metropolitan University of Mexico (UAM). He has more than 15 years of experience in nanotechnology R&D in Europe. He joined imec in 2006, where he holds a Principal position (PMTS). He is a specialist on Front-End-of-Line (FEOL) and Middle-of-Line (MOL) patterning. His current interest is focused on multiple patterning using either 193i or EUV lithography, selective deposition and Atomic-Layer-Etch.

Imec's silicon photonics platform enabling 100Gb/s OOK optical links.

Absil, Philippe
Director
imec

Abstract
With the emergence of the Internet of Things there will be an unprecedented growth in data center infrastructure needs requiring deployment of novel technologies with improved performance at lower power consumption and lower cost. Addressing these requirements, optical solutions are replacing copper cables for the intra-data center interconnects with increased lines data rates. In this presentation we will present the latest performance updates of imec silicon photonics platform demonstrating 100Gb/s OOK optical links enabling the next generation of optical transceivers.

Biografie
Philippe Absil, Ph.D. is the director of the 3D and optical I/O technologies department at imec since 2013 and has been responsible for the silicon photonics technology platform development since 2010. Before that he spent seven years managing the advanced CMOS scaling program at imec. In the early 2000’s he developed the passive photonics platform technology for Little Optics Inc., Maryland, USA. He earned his Ph.D. degree in 2000 from the department of electrical engineering of the University of Maryland at College Park, USA. His doctoral work contributed to the early demonstrations of semiconductor micro-ring resonators.

Lithography Material Readiness for HVM EUV Technology

De Simone, Danilo
PMTS
IMEC

Abstract
In the last years the continuous efforts on the development of extreme ultraviolet (EUV) lithography has allowed to push the performance of EUV photoresists on the ASML NXE:3300 full field exposure tool. Today N5 logic technology node is considered to be the first scaling node at which industry will likely insert EUV into production which will bring a reduction in total cost of ownership. For this purpose, imec test vehicles have been developed to evaluate EUV patterning performance with N5 design rules. In this landscape EUV materials are key enablers of EUV technology and these test vehicles are used to debug the patterning capability of such materials aiming to find robust solutions that offer the best performance in terms of sensitivity, resolution, roughness and defectivity. Furthermore, it is imec’s objective to bring novel valuable material concepts, that are at an early development stage, to a higher level of maturity and propose them as alternative materials for nano scaling through an incubator path model named at imec “Lab-to-Fab”. In such a context today both chemically amplified (CA) and metal-oxide (MO) EUV resists are part of the patterning strategy for the critical N5 BEOL layers. However, HVM requirement to have a cost-effective low exposure dose photoresist (<20mJ/cm2) still remains a big challenge. In this work the state-of-the-art of EUV patterning materials are discussed in multiple aspects: i) the patterning challenges for critical features as 16nm dense line space patterning and 18nm dense contact hole and pillar patterning, ii) the integration of EUV resists in novel process schemes, as the tone reversal process, iii) the impact on patterning performance of substrates underneath the photoresist, iv) the challenges of EUV metal-oxide resist to move to HVM environment. Finally the latest patterning developments for N3 technology node are introduced.

Biografie
Danilo De Simone holds a MS degree in Chemistry from University of Palermo (Italy) and he has 17 years of experience in semiconductor R&D in the field of nanolithography. For seven years he leaded the development of lithographic materials for 90nm and 65nm NOR flash devices for STMicroelectronics (STM) in Italy and covered the role of assignee at STM Alliance in France and STM in Singapore working on multiple R&D and production projects. In 2008 he moved to Numonyx leading the R&D on lithographic materials and taking the co-ownership to develop 32nm double patterning modules for Phase Change Memory (PCM) devices. In 2011 he moved to Micron Technology working as principal engineer to introduce 45nm PCM devices in HVM and to develop lithographic solutions for novel devices. In 2013, he joined the international nanoelectronics research center IMEC in Belgium as principal member of technical staff leading the research on photo materials for EUV lithography.

Wearable as medical devices

Van Helleputte, Nick
R&D Manager
imec

Abstract
Recent years have seen a significant advancement in wearable technology for healthcare. This talk will discuss how wearables can make a difference in medical applications. For a number of chronic diseases like COPD, hypertension and sleep apnea, today there are no convenient methods available for reliable long-term disease management. This is an area where wearables can make a significant difference. The talk will focus on current state-of-the-art and discuss technological advancements and breakthroughs that are needed to achieve this. Furthermore, quite a few of these chronic conditions are related to lifestyle. Hence these can in theory be prevented. Unfortunately this involves behavioral change, which is an extremely tricky thing to accomplish. The current crop of wearable medical devices doesn’t really address this space. The virtual coach program aims to develop systems and technologies to truly enable personalized coaching towards effective and acceptable change behavior. By combining physiological and contextual information, behavior profiling is achieved. The virtual coach will use this information to analyze your personal behavior, cravings, triggers and provide directed feedback at the right time. As such through programs like the virtual coach, wearable health devices are transformed into active devices that can enable behavioral change and hence achieve true preventive medicine.

Biografie
Nick Van Helleputte received the MS degree in electrical engineering in 2004 from the Katholieke Universiteit Leuven, Belgium. He received his Ph.D. degree from the same institute in 2009 (MICAS research group). His PhD research focused on low-power ultra-wide-band analog front-end receivers for ranging applications. He joined imec in 2009 as an Analog R&D Design Engineer. He is currently R&D manager of the biomedical circuits and systems team. His research focus is on ultra-low-power circuits for biomedical applications. He has been involved in analog and mixed-signal ASIC design for wearable and implantable healthcare applications. Nick is an IEEE member and served on the technical program committee of VLSI circuits symposium and ISSCC.

200mm/8-inch GaN-on-Si CMOS compatible manufacturing technology

Marcon, Denis
Business Development Manager
imec

Abstract
Wideband gap technologies (SiC and GaN) are the most promising candidates for performance beyond the Si limits. In particular, GaN combines high performance with a low cost technology thanks to the fact that GaN can be grown on 200 mm/8-inch cheap Si(111) substrates (GaN-on-Si) that can be processed in a high productivity CMOS fab. Imec is world-first to show a normally-off/enhancement mode (e-mode) device technology on 200mm/8-inch GaN-on-Si wafers, which simultaneously achieves a very low dynamic Ron dispersion (below 20%) and state-of-the-art performance and reproducibility. This technology is ready for prototyping, customized low-volume production and technology transfer. In this talk, we analyze the challenges related to the manufacturing of 200 mm/8-inch GaN-on-Si wafers in a CMOS fab. Firstly, we describe the inherent challenges related to the growth of GaN layers on Si substrates and show our latest results on GaN-based epi-buffers. Secondly, we discuss and show our latest results of imec’s 200mm/8-inch GaN-on-Si e-mode device technology for 200V and 650V power switching applications.

Biografie
Denis Marcon received a M.S. degree from the University of Padova in 2006. Subsequently, he received the degree of Doctor in Engineering (Ph. D.) from the Catholic University of Leuven and imec with the thesis entitled “Reliability study of power gallium nitride based transistors” in 2011.He is leading author or co-author of more than 50 journal papers or conference contributions. Currently, he is in imec, Belgium and he is directly responsible for the partnerships with imec in the field of GaN power electronics and on dedicated development projects of Si-based device and sensors.

Orthorhombic phase formation in doped HfO2 for ferroelectrics

Popovici, Mihaela
Senior Researcher
Imec

Abstract
Ferroelectric (FE) materials are potential candidates for emerging memory applications due to their spontaneous polarization, which can be reversed by the application of an electric field. A ferroelectric gate stack for non-volatile random-access memory (RAM) applications utilizes the polarization of the ferroelectric material within the gate stack. Atomic layer deposition of thin films in 3D structures is the most envisaged method to achieve 3D Ferroelectric Field-Effect Transistors (FEFET). The observation of ferroelectricity in HfO2, currently mainstream as gate dielectric in semiconductor logic technology, has redirected focus to this material as ferroelectric. HfO2 is a polymorphic material. The monoclinic phase is the most common crystal structure obtained through thermal treatment at temperatures below 900oC when thin films are deposited as a pure HfO2. However, the cubic HfO2, which is known as a very high temperature phase, can appear at lower temperatures when doped by a metal during deposition. Larger radius dopants (e.g. Gd3+) in comparison to Hf4+ favor the formation of the cubic phase, whereas smaller radius dopants (e.g. Al3+) can induce the appearance of the tetragonal phase. However, the appearance of the less-known non-centrosymmetric orthorhombic phase (o-HfO2) can be triggered below a certain doping level and layer thickness and when the cystallization of the doped HfO2 films take place under the stress induced by a cap layer. At imec, we investigate the fabrication of a 3D vertical FEFET with silicon-insulator-silicon (SIS) structure. A 3D ferroelectric Al doped HfO2 device for NAND applications was fabricated. Electrical results confirmed the presence of the ferroelectric phase with a coercive voltage (2Vc) of 6V extracted from the hysteresis loop. Reliability studies showed the potential of this device for nonvolatile memory applications.

Biografie
Mihaela Popovici is senior researcher within the Semiconductor Technology and Systems unit at imec, Belgium. She has a BSc and MSc in Chemical Engineering and received her PhD in Materials Science and Engineering in 2004 at the “Politehnica” University of Timisoara, Romania. After a two years post-doc at Philips Research Netherlands (Photonic Materials and Devices department) she joined imec in 2007. Her main expertise resides in dielectric oxides and metal thin films development (ALD, CVD and PVD), physical and electrical characterization and design of complex materials stacks with applications in microelectronic electronic devices, such as metal-insulator-metal (MIM) capacitors for DRAM, Ferroelectrics and active layers mainly for RRAM, STT-MRAM and Interconnect applications. Currently she is the technical lead of the DRAM MIMCAP project and involved as material expert in the Ferroelectrics project at imec. During her career, together with the technical teams, she has demonstrated the ability to bring innovation, reflected by her patent and publication track record. Today she has an h-index of 15.

How to reduce your inventory and improve performance

Samson, Sam
Global V.P & EMEA CEO
IMS

Abstract
IMS Who are we. IMS, which has been operating in the global markets for 12 years, is responsible for inventory management, procurement and logistics of companies with international deployment. It offers its customers innovative and creative solutions that lead to considerable savings in inventory management and purchasing costs. The company has started its services to the semiconductor industry, but since its establishment, it has served a wide range of industries - from pharmaceutical, automotive, energy food and more. Our advantage. "Our advantage is that we are deployed all over the world and inventory management and procurement is our exclusive specialty, instead of having to contact thousands of suppliers, conduct tenders, and ask for bids - we do this for our customers and at the end of the month the customer receives one invoice from one supplier. With thousands of suppliers all over the world We have extensive experience with large-scale shipment by air, sea and land forwarding, we have fewer faults and better prices for our customers " www.utiims.com

Biografie
Sam (CPA, MA) is EMEA Region CEO and Global VP at IMS. Sam is a Senior Executive & Member of the Board of Directors, with vast multi-disciplinary experience of over 25 years in all aspects of operations, strategic planning & corporate finance, within a global public environment.

Engineered Si-based Substrates for the State-of-the-art RF Devices - A Characterization Perspective

Emam, Mostafa
CEO
Incize

Abstract
The market of wireless devices continues to grow very rapidly. Today, as the Internet-of-Things is getting closer to a daily life reality, a whole new era of devices communicating wirelessly is taking place in the very near future. Wireless communication depends on RF technologies that have specific requirements at different technology levels, starting from substrates on which devices and circuits are developed. These requirements need to be measured, validated and improved. Traditional characterization techniques are not satisfactory any more and a need has emerged for new and innovative characterization approaches that meet increasing industry requirements in terms of operation frequency and power. Quality, precision and rapidity of tests are also critical for the time-to-market industrial cycle. This talk addresses the new techniques developed at Incize to characterize the new-engineered Si-based substrates and devices (active and passive) targeting the continuously growing wireless market.

Biografie
Mostafa Emam received the Diplôme d’Ingénieur degree in electronics and signal processing, and the M.Sc. degree in design of microelectronics circuits and systems, both from the Institute National Polytechnique, Toulouse, France, in 2005. He received the Ph.D. degree in engineering sciences from the Institute of Information and Communication Technologies, Electronics and Applied Mathematics (ICTEAM), Electrical Engineering, Université catholique de Louvain (UCL), Louvain- la-Neuve, Belgium, in 2010. From 2006 to 2010, he was a researcher at UCL where he worked on wideband characterization and modeling of MOSFETs. Since 2011, he is the founder of Incize, a company providing an innovative characterization and modeling service for devices and materials in all fields of operation. Incize focuses on the characterization and modeling of SOI devices in dc, RF, large-signal, and high- frequency noise, for harsh-environment applications and under mechanical-stress conditions as well as the design and simulation of RF SOI circuits. Dr. Emam is IEEE senior member, the author and co-author of more than 35 scientific articles and book chapters, a reviewer for several IEEE journals and the technical chair of the SubVt division of the IEEE International S3S Conference since 2015.

Packaging for Automotive – Challenges and Solutions

Meyer, Thorsten
Principal Engineer
Infineon Technologies

Abstract
First modern electronics entered automotive vehicles in the 1950’s and 1960’s with the introduction of semiconductor transistors in car radios and power diodes in alternators. Since then electronics have spread into all relevant areas of the automobile. They are supporting applications in the area of motor and chassis functions, comfort and security and safety, about 80% of all innovations are created by electronics already today. Autonomous driving, electro mobility, connectivity and energy efficiency will give another boost to electronics in the automobile industry. The mayor elements will be “intelligent” sensors, powerful electronic control units and “mechatronic” actuators. Those automotive electronics require highly integrated solutions with technology and packaging features from consumer electronics, but designed and qualified for harsh conditions of automotive industry. We will introduce to packaging technologies for integrated systems, sensors and MEMS with focus on chip package interaction. The mm-wave radar devices application, sensors including MEMS devices and different kinds of power devices like drivers for LEDs will be discussed from package point of view. Embedded Die technology, also an important future packaging technology for the support of system integration, will be discussed. We will show that there is a strong importance of Co-Design for package integration. For the ever increasing reliability requirements the selection of the right packaging materials and processes is crucial and will be discussed. Finally an advanced package integration concept has to also fulfill the thermal and performance requirements as well as to meet cost targets. This plurality of requirements to electronics in automotive shows, that there will be no single package solution fulfilling all needs. In this presentation we will introduce into the manifold of package solutions.

Biografie
Thorsten is Principal Engineer Package Concept Engineering at Infineon Technologies in Regensburg, Germany, responsible for New Package Platforms and New Package Definition. Until March 2015 he was leading the Package Technology and Innovation department at Intel Mobile Communications (IMC) in Regensburg. Prior joining IMC, he was overall project leader for the development of Wafer Level Packaging Technologies at Infineon in Regensburg. Thorsten is author of multiple publications and holds more than 140 patents and patent applications in the area of advanced packaging.

Pairitsch, Herbert
Senior Manager Technology & Innovation
Infineon Technologies

Biography
Herbert Pairitsch holds a degree in electrical engineering from the Graz University of Technology, from where he graduated in the year 1985. In 1986 he started his career at Infineon Technologies Austria AG (former Siemens HL) and held leading positions at various manufacturing and development departments. Since 2014 he serves as divisional Head of R&D Funding PMM (Power Management & Multimarket). His responsibilities include the coordination of national and international research projects in the context of energy efficient electronics like PowerBase (ECSEL Pilot line project).

Contact resistance in pulse conditions

Barbon, Francesco
Development Engineer
Infineon Technologies AG

Abstract
The contact resistance tool (CRes) is a laboratory instrument internally developed used for the measurement of the contact resistance which occurs between the probe contact needle, and the contact surface of the device under test. This parameter is very important and has a big impact on semiconductor test yield, because it influences the signal integrity. The instrument received a hardware upgraded, with a new generator which delivers controlled higher current impulses. The evaluation of the contact resistance with high current impulses will enable to evaluate the current carrying capability (CCC) on various combination of needles vs pads material, under real-life needle operative conditions. The new tool and some initial results will be presented.

Biografie
Francesco Barbon in 2011 obtained his Master of Science in Telecommunications at the Department for Electronics and Informatics of the "Università degli Studi di Padova". In 2014, he terminates his contact as Researcher at the Institute for Electronics Engineering of the University Erlangen-Nuremberg, developing new power detector concept for Six-Port interferometers. At present, he is working at Infineon AG as Development Engineer in the field Test, Technology, and Innovation. His focus is description, verification, and qualification of Probecards used in production for mixed, and analog signals in microwave region.

Silicon Carbide Power devices as enabler for highest power density and efficiency

Friedrichs, Peter
Senior Director SiC
Infineon Technologies AG

Abstract
At all recent power semiconductor fairs and conferences the importance of SiC devices as enabling components for new levels of performance in power circuits was more than evident. Considering the commonly accepted cycles in the adoption of new technologies it is visible that after the success of the diode technology meanwhile also the MOSFETs are on the threshold of the hockey stick in adoption. The contribution will discuss the design challenge for SiC MOSFETs and how a device can be operated in order to fulfill the expectations regarding performance and robustness. Special focus will be put onto the question how to build a bridge from the today IGBT dominated world towards unipolar MOSFET based devices. Furthermore, it will be sketched which additional aspects beside the pure availability of a chip technology will be mandatory for a successful Adoption in power electronics applications. Finally, concrete examples will be presented how a new and significantly more expensive technology can bring added value to the user and the community striving for energy saving and low emission levels. A critical assessment will be made for both, automotive and industrial applications.

Biografie
Dr. Peter Friedrichs was born in 1968 in Aschersleben, Germany. After achieving his Dipl.-Ing. in microelectronics from the Technical University of Bratislava in 1993, he started a Ph.D work at the Fraunhofer Institut FhG-IIS-B in Erlangen. In 1996 he joined the Corporate Research of the Siemens AG and was involved in the development of power switching devices on SiC, mainly power MOSFETs and vertical junction FETs. He holds more than 10 patents in the field of SiC power devices and technology and was an author or co-author of more than 50 scientific publications and conference contributions in this field. Peter Friedrichs joined SiCED GmbH & Co. KG, a company being a joint venture of Siemens and Infineon and originated from the former Siemens research group, on March the 1st, 2000. Since July 2004 he was the managing director of SiCED, responsible for all technical issues. After the integration of SiCED’s activities into Infineon he joined Infineon as Senior Director Silicon Carbide from April 1st, 2011.

IoT for SECS and Non-SECS Equipment in Semiconductor Backend Manufacturing

Woi, Teck Khiong
Senior Manager
Infineon Technologies AP Pte Ltd

Abstract
The emerging of smart devices and smarter equipment accompanied by the trend of more and more IT infrastructure and services being connected through smart networks are pushing the industry development to a higher integration level between cyberspace and physical world. This Cyber-Physical Production Systems is making full use of IoT, where 4M are networked to synchronize inputs, in-process control and outputs data for a real-time execution control with higher confidence level. Equipment being the lowest resource in the IoT chain plays a vital role in generating and consuming real-time data with minimum human intervention. However, over the last decades, focus has been mainly on SECS equipment and ignoring those with legacy or non-standard communication interface. Even till today, still many vendors are not compliant to SECS protocol and will not adopt the standard due to cost and hardware constraints. To overcome the challenge of getting this equipment connected and controlled in the IoT world, a different approach was adopted by factory which could cut down the dependency on the vendor. Infineon embarked this project with PeerGroup (factory automation software provider) to establish a flexible, extendable common Automation Framework to address these issues where individual Connectors are developed to connect to multiple communication protocols like SECS, XML, ftp, TCP/IP etc.. The connectivity opens up the channel for all SECS, non-SECS equipment and smart devices to be integrated seamlessly to factory CIM hosts with more data source and control capabilities that previously being deprioritised due to significant efforts required in IT application development and integration for non-standard protocols. With the improvement from this new approach, system analysts can now re-divert their focus and resources to work closely with production on the implementation in the shop floor and fully exploit the enriched data and control capabilities to drive Smart Manufacturing.

Biografie
Graduated from Loughborough University, UK with Master of Science in Computer Integrated Manufacturing in 1996. 20 years of experience in delivering IT solutions to Backend (Assembly and Test) Semiconductor Manufacturing, ranging from equipment automation, factory automation, process control automation, material handling automation and manufacturing execution systems (MES). Responsible for the equipment automation strategy and roadmap development for overall Backend sites that spread across AP (Singapore, Malaysia, Indonesia, China) and EU (Germany, Hungary). Currently driving Smart Manufacturing projects with strong focus in the area of connect & control using IoT and advanced analytics technologies.

Chip-Film Patch for Hybrid Systems in Foil – Technology and Applications

Harendt, Christine
Head of Semiconductor Integration Business Unit
Institut für Mikroelektronik Stuttgart (IMS CHIPS)

Abstract
Flexible, thin and bendable electronics have the potential to enable many applications by integrating digital and non-digital functionalities on flexible substrates. The desired system performance often requires the integration of different components such as thin and flexible silicon ICs, sensors and thin-film large-area components. Adequate integration technologies for chip embedding and interconnect are a key issue for these Hybrid Systems in Foil (HySiF). Chip-Film Patch (CFP) is an embedding technology for chip thicknesses ranging from a few microns up to 50 µm using wafer based processes. Fine pitch interconnects and multichip patches are feasible by semiconductor processing technologies and adaptive layout techniques. Due to the material properties of the polymers (polyimide and benzocyclobutene) the technology can be optimized for additional large area processes (printed sensors, organic transistors) and is suitable for medical devices or HF applications. CFP technology is used for single devices such as smart sensor patches or as an interposer for multichip modules in a large area foil systems. Applications ranging from embedded multichip modules for industry 4.0 solutions to bendable sensor foils for robotic gripper fingers are presented.

Biografie
Christine Harendt received her Ph.D. in Physical Chemistry from Freie Universität Berlin in 1987. The following year she joined the Institut für Mikroelektronik Stuttgart in Germany (IMS CHIPS) where she heads the Semiconductor Integration business unit. She is involved in the development and application of new technologies in combination with CMOS processes. She has participated in several national and international research programmes and coordinated a European Research Project focussing on the development of miniaturised video endoscopes. Within the cluster MicroTEC Südwest she was involved in the development of the platform PRONTO, a joint initiative of industrial-oriented R&D institutes in Baden-Württemberg for development and fabrication of microsystems. Recently she coordinated a research project developing flexible foil systems for applications in robotics and safety in industrial automation (KoSiF). Her current research interests are fabrication, packaging and characterisation of ultra-thin silicon chips and Hybrid Systems in Foil.

Predictive Intelligence - Project examples for Self-learning Artificial Intelligence in Production

Hilt, Britta
Managing Director
IS Predict GmbH

Abstract
Having data – that is not the key to happiness. But getting insight out of this data causes value add. To do so, you need to look into the future: Predictive analytics and, thus, predictive-optimized processes. In complex processes this is not easy because high dynamic causes continuous changes. However, even toughest “process nuts”can be cracked thanks to innovative Artificial Intelligence which realizes reliable predictions. Due to self-learning algorithms, analytics adapts itself automatically for individual instances which leads to scalable and highly reliable solutions for predictive control. In this presentation, the focus are project examples, i.e. predictive maintenance, predictive quality control, logistics optimization, energy efficiency, …

Biografie
Since 2011: Co-Founder & Managing Director, Marketing & Sales at IS Predict GmbH 16 years at IDS Scheer / Software AG in international consulting and product management, last responsibility: Director Product Management & Solution Marketing

Wafer Inspection beside standard AOI: Avoid Wafer Cracking - Minimize Downtime – Maximize Yield

Weixlberger, Johann
Sales Director SEMI-EL
ISRA Vision AG

Abstract
C. Probst, J. Weixlberger ISRA Vision AG, Darmstadt In todays semiconductor manufacturing environment a high level of wafer inspection after and between various process steps is applied, well known under the general term AOI. These inspection steps apply mostly to surface defects, mainly topside but also backside and edge of wafer material. But there are always more possibilities of defect to show up – or hide - in locations where standard AOI does not apply properly, e.g. inside wafer material. This defects, also known e.g. as micro cracks, are introduced during wafering process as mechanical processes like grinding and polishing are applied; furthermore in wafer thinning processes like in wafer level packaging (WLP) and MEMS, where bare and bonded wafers are thinned by grinding. Finally dicing is a major mechanical stress to single dies that can cause chipping, cracking and delamination. All these defect sources are not properly covered by standard surface AOI. As ISRA Vision started their activities in micro crack detection already many years ago, especially in solar cell manufacturing, this technology meanwhile was transferred successfully into semiconductor applications. This presentation describes methods, applications and results of this kind of inspection technology for former niche applications, but todays state-of-the-art processes that require more than surface AOI.

Biografie
Authors biography: Christian Probst, age 47, holds a degree in physics and acts since more than 20 years in optical inspection for semiconductor and photovoltaic industry as R&D engineer, R&D manager and managing director. Today he serves general and R&D manager in ISRA Visions semiconductor business unit. Johann Weixlberger, age 55, holds a degree in electrical engineering as well as business administration and acts since more than 25 years in semiconductor industry as application engineer, business development and intl. sales manager. Main applications fields have been niche markets like MEMS from its beginnings, optical and HF devices and wafer level packaging technologies. Today he serves as business development and sales manager in ISRA Visions semiconductor business unit in order to apply new inspection technologies in the wide field of special semi manufacturing processes.

Smart Manufacturing - The Digital Transformation Journey

Richstein, Jörg
Sr. Director Engineering Services
Jabil Inc.

Abstract
The Electronic Manufacturing industry is undergoing a dramatic change with Digital Transformation starting to impact every aspect from product design over realization operations and every associated business process including the end customer experience. New technologies incorporated into modules component types further suggest leveraging experience gained in the connected semiconductor industry to enable value creation in downstream likewise connected industry segments. This presentation will touch on some of the enabling elements to realize smart manufacturing concept in a manufacturing environment on its journey into a digitally transformed business where bi-directional connectivity and the realization of a Digital Twin are just two of the items critical to success.

Biografie
Jorg Richstein joined Jabil Inc. in 2011 with 20 years of Design and Manufacturing experience in the T&M sector to lead the Jabil’s Global Manufacturing Engineering Operations. He currently works as Sr. Director of Engineering Services in Jabil’s Digital Solutions Group developing and industrializing advanced manufacturing processes. He is a thought leader of Innovation Initiatives, Creation, and monetization of IP as well as Digital Transformation and expanding corporate strategic core capabilities. For that he collaborates with academic institutions and serves as the IAB Vice Chair of the MIST Center (an NSF I/UCRC program). Jorg got his BS, MS and PhD in Physics from University of Dortmund. Before joining the T&M and EMS industry, he researched particle physics at CERN in Europe.

Wafer probing challenges and solutions

Mai, Joe
Managing Director
JEM Europe

Abstract
Semiconductor packaging has always been inherently linked to wafer probing. On the one hand, package features influence, or even define, pad and bump features (sizes, locations, dimensions, and materials). On the other hand, wafer probing methods and probe card limitations (probe geometries, pitch, etc.) also constrain package development. In addition, the contact between probes and pads/bumps inevitably damages the latter, which can affect bond reliabilty and require complex and costly reliabilty studies. This presentation will first describe some of the links between packaging and wafer probing, and the related challenges, including those of testing at high/low temperatures and at high/low power. Then, we will present the latest probe card technologies and probing methods to address these challenges.

Biografie
Joe Mai is managing director of JEM Europe (located in France), a subsidiary of Japan Electronic Materials, which is a top-4 probe-card supplier. He has been with JEM for over 20 years, playing both technical and business-development roles in the US, Europe and Asia. Throughout his career, he has enjoyed working closely with customers to improve their test capabilities. So please feel free to approach him to discuss any problems or challenges you might have - or if you want to play basketball. :)

Wide Bandgap Materials Parametric Test Challenges

Wilson, Charles Stewart
Business Manager
Keysight Technologies

Abstract
Wide Bandgap Materials Parametric Test Challenges Stewart Wilson, EMEAI Business Manager at Keysight Technologies ABSTRACT: The adoption of new wide bandgap materials such as GaN and SiC has resulted in new Parametric, (Electrical) Test challenges in both device measurement and modelling. These new materials devices are now being manufactured in ever increasing volumes and are quickly becoming mainstream. This paper discusses how Keysight Technologies extended the measurement range of a standard 4080 series Parametric Test system to 3kV. It considers several of the key challenges which include: operator safety, test system security, probe card design and prober safety and chuck requirements.

Biografie
Dr Charles Stewart Wilson Biography Stewart Wilson is currently the European Business Manager for Keysight Technologies range of Parametric Test Equipment. He holds both BSc and PhD degrees in Electronics and Electrical Engineering from the University of Glasgow, Scotland (UK). Dr Wilson has worked in the field of Semiconductors since 1979. During this time he has worked for several semiconductor manufacturers including Motorola and National Semiconductor. In addition he has worked for Semiconductor equipment manufacturers / suppliers; Eaton Corporation and Hewlett Packard / Agilent Technologies / Keysight Technologies in both Europe and the United States. Dr Wilson has been employed by Hewlett Packard / Agilent Technologies / Keysight Technologies since 1985 and has held a number of sales and marketing positions. He is currently the European Business Manager for Keysight Technologies range of Parametric Test Equipment.

Precise localization, motion sensing and add-on data communication: How innovative sensor & analytics solutions enable new applications in the fab of tomorrow.

Trinchera, Oliver
CEO
KINEXON GmbH

Abstract
The industrial Internet of Things is on the rise, leading to a significant digital transformation of production & logistics processes. Thinking about the semiconductor factory of the future, we assume that all objects such as parts, tools and products will interact fully with each other – as if they were steered by an invisible hand. However, to make this vision come true we need to know two essential pieces of information: 1. Where are the objects exactly located? 2. What is the status of the objects? The following contribution deals with a cutting-edge real-time location solution (RTLS) that provides an answer to the two previous questions and that enables manufacturers to bring the automation and efficiency of their production facilities to the next level. At the core oft he solution is a small sensor that captures the 3D-position of various objects such as wafer boats or autonomous ground vehicles with an accuracy of a few centimeters. In addition to that, the sensor captures motion information such as acceleration, rotation and orientation. Moreover, a bi-directional communication path and standardized interfaces allow to transmit process relevant add-on information that is related to the objects, such as temperature and humidity. All information is processed in real-time and made available on a powerful analytics platform. The platform offers a variety of features to describe and monitor production processes and, finally, to improve them in terms of quality, costs and time.

Biografie
Dr. Oliver Trinchera is Founder & Managing Director of KINEXON. KINEXON develops precision tracking solutions for centimeter accurate 3D localization of people and objects in indoor and outdoor environments. A smart analytics platform analyzes the data and provides users with new and valuable insights on various devices such as notebook, smartphone or tablet PC. The KINEXON sensors and applications are used by renowned customers in various industries such as manufacturing, logistics, healthcare, sports & media. The full asset visibility and analytics by KINEXON enable customers to map their processes and optimize them in terms of quality, costs, and time. The company received a number of prestigious awards, including the Smart Digital Award as most innovative Bavarian start-up and the Galileo Master Award of the European Satellite Navigation Competition (promoted by European Commission and ESA, for example). Oliver studied Business Administration in combination with Electrical Engineering at Technische Universität München. Additionally, he studied Technology Management at the Center for Digital Technology and Management (CDTM). Moreover, he holds a PhD from Technische Universität München.

Meeting the increased Demand for 200mm Capacity by Enhancing Capital Efficiency and Fab Productivity for IoT Applications

HAYNES, DAVID
Sr. Director CSBG Strategic Marketing, CSBG MARKETING
Lam Research

Abstract
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Biografie
David gained a B.Eng and PhD in Materials Engineering from Swansea University. His PhD thesis was in the field of organic semiconductors for electronic and optoelectronic applications. In his professional career, David has accrued more than 20 years of experience in the Semiconductor Capital Equipment and research instrumentation sectors with STS, SPTS and Oxford Instruments. Focused on new technology development, he has a strong process background in plasma etch and deposition for optoelectronics, photonics, MEMS, Power and RF Electronics, as well as advanced chip packaging technologies. Building on this technical knowledge, David has a proven track record in developing strategic business partnerships; specialising in new technology developments and introduction of enabling process capabilities to leading semiconductor fabs worldwide. David Joined Lam Research in June 2016 and is currently Senior Director of Strategic Marketing in the CSBG Business Unit.

Leveraging 300 mm Technology Solutions to Enable New Process Capabilities for MEMS

Patton, Evan
VP/GM Reliant Systems
Lam Research Corporation

Abstract
The Internet of Things (IoT) is driving a wide range of devices. MEMS sensors and transducers are critical components in the IoT infrastructure. As this infrastructure proliferates, it will continue to drive demand for increasingly advanced yet cost-effective sensor and transducer technologies. To satisfy this demand, the requirement for semiconductor processing equipment that enhances the customers’ fab productivity and capital efficiency is also growing. Lam Research has been working to extend our product lifecycle through technology enhancements and productivity upgrades to our etch, deposition, and clean technologies to ensure we meet the needs of the MEMS and sensor manufacturing community. While the critical dimensions of MEMS devices are significantly larger than leading edge ICs, the profile, tilt, film quality, materials, and surface roughness requirements are comparable. Applying the technical leadership from fabricating the most advanced devices to MEMS processing equipment is enabling a new level of control for MEMS fabrication. These developments not only focus on our deep silicon etch technology, which is already an established process used in the fabrication of MEMS devices, but also on the processing of new materials that are key to the next generation of MEMS and NEMS. In parallel, through a process of continuing innovation, we are consistently introducing our own suite of smart manufacturing tools that allow these process solutions to be deployed with improved operational efficiency and productivity. In this presentation, we will review the enhanced technical capability of etch, deposition, and clean processing equipment, as well as the smart manufacturing tools that can increase the capability and productivity of IoT device fabrication equipment.

Biografie
Evan Patton is the VP/GM of Reliant Systems in Lam Research’s Customer Support Business Group. He has a broad background in semiconductor process and product development, including developing the SABRE electrochemical deposition system. Evan has over 30 process and hardware patents, and has published several conference and journal papers. He has experience with metallization, CVD, RTP, device integration, III-V development, packaging operations, and etch. He graduated with honors with a BS in metallurgical engineering from Purdue University.

Functional safety aspects in the development of automotive control units with focus on power semiconductors.

Bugla, Gregor
Manager Functional safety
Lear Corporation

Abstract
Energy management in vehicles and the control of energy consumption is one of the challenges in the development of energy-efficient vehicles. One of the key components are power semiconductors , switching and controlling all different kind of car body loads from low to medium rated electrical power and controlling the onward power distribution to further peripheral ECUs. The semiconductors have to meet several automotive requirements on electrical performance, temperature range, EMC, etc. but also important are protection mechanism (Overload, short current, reverse polarity protection) and diagnostic features (open load, short circuit, overvoltage). These topics are related to the functional safety of the control units, a field that becomes more and more important especially in connection with driver assistant systems and autonomous driving According to definitions in IEC 61508 standard functional safety is the part of the overall safety that depends on a system or equipment operating correctly in response to its inputs. The objectives are detection of a potentially dangerous condition and activation of a protective or corrective mechanism to prevent hazardous events arising or providing mitigation to reduce the consequence of the hazardous event. The adaption of the IEC 61508 standard is the ISO 26262 standard, that defines functional safety for automotive equipment. With focus on power semiconductor this presentation illustrates some methods and techniques in the development of safety related automotive systems. It shows the SysML modeling process for safety architecture and safety related path and introduces analyses techniques like FTA or FMEA for an effective technical safety solution. Typical requirements for the power semiconductor devices are addressed. The presentation concludes with a discussion of quantitative safety analysis methods to verify the safety development.

Biografie
Gregor Bugla graduated in Electrical Engineering and Physics and has more than 20 years of experience with Hard- Software and System engineering. Since 13 Years he is working at Lear Corporation and is currently responsible for functional safety and system safety engineering with focus on lighting systems and gateways.

Semiconducting carbon nanotubes and their application in sensors

Bezugly, Viktor
Research leader
Life Science Inkubator Sachsen GmbH & Co.KG

Abstract
For the development of the semiconductor industry and applications, there is an urgent need of new materials which allow further miniaturization of active elements and enable increased energy efficiency and reliability of devices operation. Semiconducting carbon nanotubes (s-CNTs) have extraordinary electronic properties and are very attractive materials for the use in computer chips of new generation. Moreover, their use as active material in sensors opens new areas of sensor applications thank to their outstanding sensitivity and low power consumption. SmartNanotubes is a start-up project at Life Science Inkubator Sachsen. The team produces tailored semiconducting carbon nanotubes for applications in biosensors, gas sensors, nanomedicine, electronics and photonics. We also test our s-CNTs in first prototype devices. The founding of a new company is planned after finalizing the development and validation phase in 2020. At the moment the team is looking for partners for the development and validation of s-CNT-based devices. Several applications of s-CNTs like gas sensors, biosensors and photodetectors are presented.

Biografie
Viktor Bezugly obtained his PhD in Physics at Max-Planck-Institute for the Physics of Complex Systems, Dresden (Germany) in 2004. After this he worked as a research associate at the Max-Plank-Institute for Chemical Physics of Solids, Dresden and since 2010 at TU Dresden where he led a research group "Nano- and Mesoscopic Systems". In 2015-2016 he was CRO and a co-founder of ProNT GmbH. Since 2017 he is the research leader of the group SmartNanotubes at Life Science Incubator Sachsen. There he works on synthesis and chemical functionalization of s-CNTs for their application in gas sensors, biosensors, electronic and photonic devices.

Superresolution multi-layer optical imaging of semiconductor samples using SMAL

Stanescu, Sorin Laurentiu
Technical Manager
LIG Nanowise Ltd

Abstract
Super-resolution optical imaging is one of the most difficult tasks in materials science and especially in semiconductor industry where the sample does not present any fluorescence and conventional optical super-resolution methods like STED (Stimulated emission depletion microscopy) or STORM (Stochastic Optical Reconstruction Microscopy) do not work. SEM (Scanning Electron Microscopy) is an alternative method of achieving super-resolution but it presents many drawbacks (expensive, time consuming, vacuum is needed, no multi-layer imaging). Therefore, we created SMAL (Super-resolution Microsphere Amplifying Lens) to compensate the drawbacks of existing super-resolution microscopy techniques. SMAL is the ideal choice for fast quality control in the semiconductor industry which allows the user to see multiple layers through the microchip and analyse features down to 70nm dependant on sample. Moreover, due to the fact that SMAL acts as an amplifier for both evanescent and propagating waves and performs an overlapping of these two, one can obtain naturally coloured super-resolution images.

Biografie
Sorin Laurentiu Stanescu is the Technical Manager of LIG Nanowise Ltd, the company which created Nanopsis - the first super-resolution optical microscope in the world. He obtained his PhD in novel laser laser devices for nanotechnology and he had a PostDoc position in nano optics at The University of Manchester (Laser Processing and Research Center, School of Mechanical, Aerospace and Civil Engineering). His research is focused now in optical super-resolution microscopy techniques. He has also a lot of expertise in laser cleaning.

The Technologically Transformational Automotive Electronics Market and the Implications for Material Supply

Hege, Klaus
Global Key Account Manager
Linde Electronics GmbH & Co. KG

Abstract
The automotive electronics market is growing fast and is undergoing radical transformation. Until now, electronics components for vehicles were based on rather mature technologies and produced by specialist manufacturers. The most advanced semiconductor technologies will make possible the computing power and memory requirements necessary to analyze data provided by advanced sensors. Quality management is foremost in importance to automotive electronics. Given the safety issues at stake when electronic components are in use in a vehicle in movement, failure of these components is unacceptable; hence, the stringent quality programs being developed. The automobile industry has developed strict regulations to follow, which includes traceability of all manufacturing processes. In particular, modification of materials used must be documented. From a material (e.g. gases or chemicals) supplier perspective, this implies specific quality measures, which include alignment to the quality management techniques used by semiconductor manufacturers. In particular, quality and supply chain robustness are increasingly critical. In this talk, we will discuss the different steps being taken to improve the quality of materials delivered to automotive semiconductor manufacturers through global monitoring of the entire supply chain. Furthermore, we will present examples of long-term supply strategies for specific materials in order to support customers’ product development and commercialization. Finally, with the introduction of electronic components built on advanced technologies by large semiconductor manufacturers, but relatively new to the automotive electronics industry, we will reflect on the global impact on material quality and supply chain.

Biografie
Klaus Hege is Global Key Account Manager for Linde Electronics. In this role, he is responsible for managing a number of Linde’s global key customers in the semiconductor industry. Prior to this role, Klaus hold several other positions in the gas industry, mainly as Program Manager Electronics, Applications & Commercialization Manager, and Product Manager. Klaus holds a Diploma in Physics from the University of Erlangen, Germany, and a Postgraduate Diploma in Business Administration of the University of Barcelona, Spain. Klaus is located in Pullach (nearby Munich, Germany), and can be reached at klaus.hege@linde.com or +49.172.260.7091.

Glass Processing with LIDE technology for MedTech Applications

Lietz, Thorne
Sales Manager
LPKF Laser & Electronics AG

Abstract
Glass offers a unique set of material properties which renders it an ideal material for medical electronics. In addition to its proverbial transparency, glass shows a very high chemical inertness, allows for packages with a high hermeticity and has almost ideal isolating properties. However, micro processing of glass is either limited to the surface or impairs the reliability of the glass components due to process induced micro-cracks, chipping or mechanical stresses. The drawbacks of today’s glass micro processing technologies are overcome by newly developed Laser-Induced-Deep-Etching LIDE technology. In LIDE single laser pulses are used to locally modify glass across the entire thickness. These modifications can subsequently etched anisotropically to form micrometre-scale holes or micro-cuts in case multiple modifications are placed close to each other. As a high throughput technology LIDE can unlock thin glass as a material for a multitude of future medical electronics.

Biografie
Thorne Lietz did an information electronics apprenticeship at Deutsche Bahn from 1985 to 1989 and then worked as an industrial electronics technician in the geophysical surveying technology production department at Geocom GmbH until 1994. He attended the Technicians College Hannover from 1994 to 1996, and then joined LPKF Laser & Electronics AG as a technician in 1996 where he started his work in the service team. He was later promoted to Manager Service & Support (international/national) for Rapid PCB Prototyping, and has been responsible for the national sales and marketing of these systems from 2006 to 2016. Since 2016 he is Sales Manager and Technology Specialist at the LaserMicronics GmbH which is laser job-shop service provider and a 100% subsidiary of the LPKF Laser & Electronics AG.

3D Macroscopy using digital holography

Parent, Jérôme
Head of material science applications
LyncéeTec SA

Abstract
LyncéeTec introduce the first 3D macroscope for fast 3D topography measurements within nano-metric vertical resolution. The digital holographic macroscope DHM® combines intrinsic advantages of digital holography microscopy with a large field of view : 35mm by 35mm Such system enables high throughput inspection of static samples for the semiconductor industry as flatness or defect inspection. Dynamic inspection are also possible as bow or surface wrap under thermal stress, characterization of mechanical oscillator and new applications to discover.

Biografie
Lynceetec

Applications for Mapper technology

Kampherbeek, Bert Jan
Co-founder & CEO
Mapper Lithography

Abstract
Introducing a fast direct writing machine to the semiconductor industry opens up a wide range of new applications. In this presentation several examples will be provided such as a) making each chip truly unique in the hardware which can be used in iot security, but also b) extension of resolution for 200 mm fabs which can be used for the manufacturing of 5G devices. In addition the technical status of the machine development will be presented.

Biografie
Bert Jan Kampherbeek (CEO and co-founder) is one of the three founders of Mapper. He is responsible for the market development and positioning of Mapper in the industry. Bert Jan holds a Master's degree in Applied Physics from Delft University of Technology.

Optimization of Al-doped ZnO films for flexible TFTs and piezoelectric sensors

Saadat, Irfan
Professor Microelectronics
Masdar Institute of Science and Technology

Abstract
In this work, we use of a single material Al doped ZnO system for thin film device and sensor application using its electrical and piezoelectric properties to get the desired functionality of multi-purpose. Including the creation of a DOE to show how Al doped ZnO films conductive and piezoelectric properties can be finely tuned by adjustment of the Al doping levels and growth conditions such as films deposition temperatures, purging cycles, deposition (TMA/DEZ) /purging cycles and even thickness. This us allow for instance to minimize the piezoelectric effect in the flexible TFT channel while maintaining good conductivity or for the sensor where maximizing the effect is required. Fabrication of both test structures to measure and optimize these parameters along with the TFT and the sensor on flexible substrates using common deposition methods with low temperature steps to investigate their mechanical and electrical properties. Development of Al doped ZnO thin films for designing high quality flexible TFTs and piezoelectric sensors. ZnO (especially with Al doping) has a moderately high (very high for a semiconductor) electromechanical coupling coefficients which allowed it to be successfully used in thin film piezoelectric devices an TFT. The ability to make Al doped ZnO versatile for various applications. Especially with the rising interest in the Internet of Things (IOT) applications where flexible TFTs and sensor are now an important area of research.

Biografie
Rizk’s research involves new technologies in memories and sensors which will bring the low-power virtues of Internet of Things (IOT) applications.

High-Scandium Al-Sc Sputter Targets for MEMS Applications

VanHeerden, David
Applications Engineer
Materion

Abstract
Modern sputtering processes place increasingly stringent demands on the metallurgical and chemical properties of targets, and consequently offer unique challenges to the development of new target materials. Critical characteristics include not only target chemical uniformity, purity, defect content, and grain size but also second phase structure and morphology, size, and distribution as well as the presence of internal residual stresses. The development of suitable target materials can be the main bottleneck in the development of new technologies and applications. In this paper we present the results of the development of one such new technically challenging and commercially important system, namely high-scandium Al-Sc sputter targets fabricated via melt processing. The sputter targets discussed in this paper typically contain scandium in the range of 10at% to 50at%. The Al-Sc phase diagram shows that with increasing Sc content the target could be made up of an Al3Sc intermetallic in an aluminum matrix, a combination of Al3Sc and Al2Sc intermetallics, or a combination of Al2Sc and AlSc. Each of these composition ranges offers unique challenges in the development of melt processed targets suitable for 200mm deposition tools. The low Sc alloys are highly prone to chemical segregation during casting, while the highest Sc alloys fabricated were made up of two brittle intermetallic phases which exhibit cracking during solidification. The mid-range alloys proved to be the most challenging with a combination of high processing temperatures, extremely brittle phases, large residual solidification stresses, and a very low overall fracture toughness. In this paper we detail the development of targets in each of these compositional ranges and show examples of materials that have been developed that have proved suitable for magnetron sputtering.

Biografie
David VanHeerden is Global Applications Engineering Manager for the Advanced Materials Group at Materion Corporation with a wealth of experience in a wide variety of materials systems including nanomaterials, electronic ceramics, bonding and joining. Author of more then 20 scientific journals and conference proceedings, VanHeerden holds a PhD from the University of Cape Town, South Africa, in Materials Engineering.

Secondary Equipment – Challenges & Opportunities

Connock, Peter
Chairman
memsstar Ltd

Abstract
Far from being a mechanism for manufacturing “old” products, the use of so called “secondary” equipment has become a mainstream mechanism for cost effective production of an important range of products. It is well known that 200mm production capacity is expanding rapidly, and the re-use and re-purposing of older equipment is fuelling a lot of that growth. However, there are issues to be faced: availability of suitable tools, part obsolescence and shortage of engineer skills to name but a few. OEM’s are trying to address this through the production of “new” 200mm equipment but there is a difficult balance to be reached in terms of cost of production of certain types of devices. The presentation will discuss these issues as an introduction to the subjects that will be covered in the rest of the SEA session.

Biografie
Peter Connock has been working in the semiconductor industry for 40 years with a wide range of responsibilities in development, customer service, marketing and management. He has held long-term positions at Edwards, Applied Materials and memsstar in locations around the world. In his latest role, PENTA Director at AENEAS, he is responsible for the management of the EUREKA cluster PENTA – focussed on catalysing activity in the micro and nanoelectronics enabled systems and applications sector in Europe. PENTA will operate for 5 years, and launched its first call in January 2016. This complements his Board Chairmanship of memsstar, Europe's premier semiconductor equipment remanufacturer and services provider. It also serves the global MEMS marketplace, offering etch and deposition expertise, experience, proprietary and remanufactured systems and know-how to deliver innovative products and services for research, commercial R&D and production. He has further augmented his operational activities by establishing a long-term relationship with industry representative bodies such as SEMI serving on SEMICON, ISS and now the Secondary Equipment committees in Europe for many years. These activities are complemented by his appointment to the nmi Board in the UK – representing the UK microelectronics industry . Peter also specialises in working with SME's at Board level in strategic marketing and business development. Linked In: https://www.linkedin.com/in/dsmcpc

Transparent and flexible moisture barriers as application driven manufacturing approaches

Gautero, Luca
Senior Process Engineer
Meyer Burger (Netherlands) B.V.

Abstract
Marketability of wearable displays benefits from high throughput manufacturing of thin film moisture barriers. These are stacks of PECVD or spatial-ALD inorganics, and jettable or dispensable organics. Transparent and flexible barriers with low WVTR are manufactured strictly below 80ºC. we present production on R2R and S2S throughput above several square meter/hour. Handheld and wearable devices, developed in the last years have lowered the bar of accessibility to information and communication technology in many countries. Improvements of their functionality can therefore increase the wellbeing of a growing, connected, social network. These devices can benefit from lightweight and power-wise OLED displays and thin film batteries. These technologies are enabled by thin film barriers, also known as thin film encapsulation (TFE). Following its mission and technological competence, Meyer Burger B.V. has developed both sheet to sheet (S2S) and roll to roll (R2R) clusters for the fabrication of TFE as stacks of inorganic and organic layers. The individual equipment tool have a well installed base within institutes and industry (ie photovoltaic, display, plastic electronics and PCB applications). Inorganic thin film deposition and organic layer coating are therefore combined into single, fully automated, cluster tools with industrial manufacturing capabilities. Inorganic and organic layers, produced by our equipment have been studied to report the most salient properties for TFE applications. The overall TFE, created by stacking these inorganic layers will benefit from a moisture penetration lag time given by the tortuous path. During sampling activities, the results above have been confirmed by successful TFE applied to OLED displays and thin film batteries.

Biografie
Dr. L. Gautero has experience in thin film encapsulation technology as an innovation maker. This resulted in several publications and conference presentations. His academic path features a PhD degree in energy-related discipline obtained from EPFL, a leading education institution, in 2010 and a more recent graduation from the Executive Master in Energy Management at ESCP in 2015.

High-end equipment for high-tech industries

Ruhmer, Klaus
Head of Sales MicroNanoSystems
Meyer Burger (Switzerland) AG

Abstract
Meyer Burger is a leading global technology company specialising on innovative systems and processes based on semiconductor technologies. The company’s focus is on photovoltaics (solar industry) while its competencies and technologies also cover important areas of the semiconductor and the optoelectronic industries as well as other selected high-end markets based on semiconductor materials. The company currently employs over 1,500 people across three continents. The company’s comprehensive product portfolio is complemented by a worldwide service network with spare parts, consumables, process know-how, customer support, after-sales services, training and other services. Meyer Burger is represented in Europe, Asia and North America in the respective key markets and has subsidiaries and own service centres in China, Germany, India, Japan, Korea, Malaysia, the Netherlands, Switzerland, Singapore, Taiwan and the USA. The company is also working intensively to develop new markets such as South America, Africa and the Arab region. The registered shares of Meyer Burger Technology Ltd are listed on the SIX Swiss Exchange (Ticker: MBTN). Meyer Burger's “SPECIALISED TECHNOLOGIES” have evolved to cover a broad range of applications available in new markets. With its extensive expertise in the cutting of hard, brittle and valuable materials, Meyer Burger is recognised as an important provider in future-oriented markets. The innovative PiXDRO inkjet printing technology from Meyer Burger is a future-oriented technology for high-tech industrial applications in the semiconductor industry. With its FLEx platform, Meyer Burger offers a thin-film system as part of an integrated solution or as a separate process module which meets the needs of tomorrow’s technologies. With its plasma and ion beam technologies, Meyer Burger (Germany) AG offers excellent plasma and ion beam technology solutions for surface treatment and sensor production. www.meyerburger.com

Biografie
Klaus Ruhmer received his degree in Electronics and Telecommunications Technology at the HTL College in Steyr, Austria. He is Head of Sales – Micro Nano Systems at Meyer Burger (Switzerland) AG.

Energy Filter for Ion Implantation - A Novel Production Technique for SiC-Power Device Technologies

Rüb, Michael
Head of Strategy and R&D
mi2-factory GmbH

Abstract
mi2-factory GmbH is a high-tech start-up company from Jena (Germany) which develops, distributes and applies a so-called “Energy Filter for Ion Implantation” (EFII). This innovative tool can be beneficially used for the doping of any semiconductor material. Customers use this novel technology as a process step in the production of Silicon Carbide (SiC) power devices. EFII is a major leverage to improve the cost performance of these devices. In today´s chip production the advantages of SiC cannot be fully exploited due to the large doping inhomogeneity (at least +/-20%) [1] of the epitaxially grown drift zone, which is the core element of any vertical SiC power device such as SiC Diodes or MOSFETs. A solution to this problem is found in EFII [1]. This technology is based on ion implantation in combination with a thin, micro-patterned Si membrane which gets inserted into the ion beam. The membrane serves as a filter that enables a highly precise depth-distribution of doping atoms with a very high homogeneity (+/-1%) over the wafer surface. Furthermore, EFII can be combined with masking which allows for trench-like doping structures in SiC and may enable a real SiC-superjunction transistor. It is the only evident technology which is scalable to production volume for precise and flexible adjustment of the patterned or blanket drift-layer doping of SiC power devices. mi2-factory demonstrated the huge potential of this novel technology in a cooperation with an industrial partner in 2015 [2,3] and is now seeking to establish EFII in SiC power device production. [1] Csato et al.: Energy filter for tailoring depth profiles in semiconductor doping application, Nucl. Instr. Meth. B (2015), Volume 365, Part A, 15 December 2015, Pages 182–186 [2] Rupp et al.: Alternative highly homogeneous drift layer doping for 650V SiC devices, ICSCRM 2015 [3] Rupp et al.: How to further improve the market penetration of SiC power devices?, ECSCRM 2016

Biografie
since 2016 Co-founder of mi2-factory GmbH, Jena Head of Strategy and R&D since 2008 Professor for Microtechnology at University of Applied Sciences Jena 1997-2008 Infineon Technologies Austria AG Power Device Technology Development 1997 PhD. from Friedrich-Schiller University, Jena 1993 Physics Diploma degree from Friedrich-Alexander-University Erlangen- Nuremberg

Energy Filter for Ion Implantation - A major Improvement in Semiconductor Power Device Manufacturing

Tom, Benjamin
CFO
mi2-factory GmbH

Abstract
mi2-factory GmbH from Jena/Germany develops, distributes and uses an innovative tool named “Energy Filter for Ion Implantation“ (EFII). The application field of EFII is the processing of semiconductor wafers. Amongst our customers are major semiconductor companies which use this novel, unique and very precise technology for the production of power devices. At the moment the EFII technology focuses on the doping of silicon carbide (SiC) devices, such as SiC-Schottkydiodes and SiC-Superjunction-MOSFETs. Another application field is the doping of Si-IGBTs. Power devices based on the semi-conductor material SiC have superior properties over those consisting of silicon. In today’s chip production one can not exploit the advantages of SiC completely, since the epitaxially grown drift layer - which is the core element of all SiC power devices - has usually a relatively high doping inaccuracy of 20-25%. This directly translates into larger and therefore more expensive power chips. Another problem with doping via epitaxy is the lack of possibilities to produce doped trench-structures in the epitaxial layer. Therefore, Superjunction-MOSFETs can not be produced in SiC. Fortunately, mi2-factory offers a solution for the above described problems. The main feature is the usage of high-energy ion implantation in combination with our innovative, in-house developed EFII. This tool, which is matched for every customer application, consists of a microstructured membrane which enables a highly precise distribution of foreign atoms in any semi-conductor material. Doping inaccuracy is only about 1%. EFII is the only evident technology which is scalable to production volume for SiC-SJ-MOSFETs. mi2-factory offers EFII to semiconductor power device manufacturers, high-energy ion implantation foundries, ion beam accelerator manufacturers and end-station manufacturers. If you want to learn more about EFII, please contact us: info@mi2-factory.com.

Biografie
Benjamin Tom Since 2016 Co-Founder and Chief Financial Officer at start-up company mi2-factory GmbH in Jena, Germany 2013 . . . 2015 Master studies in Industrial Economy at University of Applied Sciences Nordhausen, Germany 2010 . . . 2013 Bachelor studies in Production Technology / Engineering at University of Cooperative Education Eisenach, Germany

Latest advancements in flexible printed hybrid electronics

Punt, Wladimir
Business Development Manager
Molex Deutschland GmbH

Abstract
Flexible electronics have been in market for many years by etched copper circuitry, using polyimide substrates (“copper flex”). Qualified hybrid printed electronics alternatives are already available and offer a new platform for flexible electronic products and sensor systems, based on a polyester substrate, printing of conductive signal traces and the assembly of electronic components; either sheet- or roll-based production. This talk will cover the introduction of the hybrid printed electronics silver flex technology and look forward to other electronic functions and features that can be supported and combined with the silver flex platform, for example: - Very fine line silver printing - Translucent capacitive sensing - Printing NFC features - Printed batteries - Bio- markers and electrodes

Biografie
Wladimir Punt, Business Development Manager With over 20 years’ experience in technical marketing and business development activities for semiconductors, embedded- and sensor systems, Wladimir joined Molex in 2016 as BDM for Printed Circuit Solutions. With an electronics background, he has been involved in multimedia platforms and sensor solutions at multinationals like Philips Semiconductors and Micronas. Wladimir was also active at several start-up companies, concerning reception of digital broadcast signals and energy harvesting solutions for the “internet of things” (IoT). Wladimir is located in Germany and supports the Molex Printed Electronics products.

Conformal/ Selective Coating Materials for enhanced performance in Automotive Electronics Applications

Wilken, Karen
Application Development Engineer – Electronics
Momentive Performance Materials GmbH

Abstract
Recent trends in the electronics industry, call for higher functionality, miniaturization. and improved reliability performance of printed circuit boards. Conformal coating materials are already widely used in such applications. Compared to organic polymers, silicone conformal coating materials have insulation, heat resistance, & cold temperature resistance advantages, & due to their softer properties, excel in their ability to absorb stress.Performance requirements for conformal coatings include: 1.Durability: The ability to provide long-term dielectric stability under high temp & high humidity 2.Adhesion: Good adhesion to PCB & component surfaces 3.Corrosion Prevention: Protection against corrosion 4.Flexibility: Elasticity of the coating layer to absorb stress 5.Chemical Resistance: Resistance to solvents & oil 6.Fast Cure: Fast cure @ low temp 7.Processability: Ease of application 8.Toxicity: Minimize harmful effects on operators and the environment. 9.Optical Clarity: Transparency or translucence Organic conformal coating materials such as acrylics, polyurethane and epoxy are known to have inherent disadvantages associated with temperature resistance, cure shrinkage and toxicity.Silicone conformal coating materials consist of silicone resin that typically is solvent borne, or silicone rubber that is formulated without solvents and cures by either heat (addition) cure or room temperature (moisture) cure. Based on the performance requirements of conformal coating materials, as long as cure time can be shortened, room temperature cure silicone rubber materials are considered good candidates due to their ease of use and ability to eliminate curing equipment from manufacturing processes. Our latest materials with enhanced reliability performance are highlighted below:Momentive’s ECC3011 and ECC3051S silicone conformal coating materials employ a unique formulation that can help prevent the occurrence of corrosion on vital PCB components and surfaces.

Biografie
05/2017- present: Application Development Engineer - Electronics @ Momentive Performance Materials GmbH 06/2016–12/2016 Research Associate at Forschungszentrum Jülich GmbH, Institute of Energy and Climate Research 5–Photovoltaics 06/2013–05/2016 Ph.D. Student at Forschungszentrum Jülich GmbH, Institute of Energy and Climate Research 5–Photovoltaics: “Low Temperature Thin-Film Silicon Solar Cells on Flexible Plastic Substrates” (submitted: 11th October 2016) 06/2013–12/2016 HITEC Graduate School for Energy and Climate 10/2007–05/2013 Darmstadt University of Technology Field of study: Material Science Grade: Very Good 11/2012–05/2013 Diploma Thesis at Forschungszentrum Jülich GmbH, Institute of Energy and Climate Research 5–Photovoltaics: “Tandem Cells providing high Open Circuit Voltages for photoelectrochemical Water Splitting” 08/2011–10/2011 Internship at BASF SE in Ludwigshafen: “Simulation and Degradation of Organic Light Emitting Diodes (OLED)” 01/2011–02/2011 Practical Specialisation in the Department of Electronic Materials: “Investigation of Trap States in Organic Semiconductors”

From Bulk Gallium Nitride Material to Vertical GaN Devices

Mikolajick, Thomas
Chair of Nanoelectronic Materials TU Dresden and Scientific Director of NaMlab gGmbH
Namlab

Abstract
Due to its direct and large bandgap Gallium Nitride is an essential material for optoelectronics and holds many promises for power semiconductor devices. In the last few years several new devices based on GaN epitaxial grown on large silicon wafers with voltage classes up to 600V have appeared on the market. However, to unfold the full potential of the technology, a vertical device architecture would be highly desirable. This will require bulk Gallium Nitride wafers rather than producing the Gallium Nitride on a foreign substrate like Silicon, Silicon Carbide or Sapphire. The most promising route to an economic production of bulk Gallium Nitride substrate is Hydride Vapour Phase Epitaxy (HVPE) growth. In the first part of this talk, the HVPE growth will be described together with recent results on wafer doping during growth. In the second part a pseudo vertical MOSFET technology on Gallium Nitride substrates will be presented together with first device results. Bringing both aspects together can be the basis for a high performance power semiconductor Gallium Nitride technology of the future.

Biografie
Thomas Mikolajick received the Diploma (Dipl.-Ing.) in electrical engineering in 1990 and his phD in electrical engineering in 1996 both from the University Erlangen-Nuremberg. From 1996 till 2006 he was in the semiconductor industry developing CMOS processes, Ferroelectric Memories, emerging Non-volatile Memories and Flash Memories first at Siemens Semiconductor and later at Infineon. In late 2006 he moved back to academia taking over a professorship for material science of electron devices and sensors at the University of Technology Freiberg, and in October 2009 he started at Technische Universität Dresden were he now holds a professorship for Nanoelectronic Materials in combination with the position of scientific director at NaMLab GmbH. Since April 2010 he is the coordinator of the “Cool Silicon” Cluster in Dresden. Prof. Mikolajick is author or co-author of more than 300 publications in scientific journals or at scientific conferences and inventor or co-inventor of about 50 patents

Kroehnert, Steffen
Director of Technology
NANIUM S.A.

Biography
Steffen Kroehnert is Director of Technology at NANIUM since 2010. He worked for 20 years in different R&D and management positions at Siemens Semiconductors, Infineon Technologies, Qimonda and NANIUM in Germany and Portugal. Steffen is active member of several technical conference committees of IEEE CPMT, IMAPS, SMTA and SEMI. Since begin of 2016 he is chair of the European SEMI integrated Packaging, Assembly and Test Special Interest Group (ESiPAT). Steffen is author and co-author of 23 patent filings in the area of Packaging Technology. He received his Master of Science degree in Electrical Engineering and Microsystems Technologies from the Technical University of Chemnitz, Germany, in 1997.

Roll to Roll CVD Graphene Technology for Transparent Electrode and Flexible Display

Jung, Yoo Yeob
CEO
Nanotech Digital GmbH

Abstract
As a result of significant scientific research and progress over the past, the commercialization of graphene material has attracted tremendous attentions from various industries seeking new materials. When graphene was first introduced, it was immediately recognized as the “wonder material” of the future, as it has multifunctional and unrivalled combination of tensile, electrical, thermal, and optical properties. Opportunities and potentials for commercializing graphene technologies are extensive however there are many technological challenges to overcome. The process of mass producing graphene technology is called Roll to Roll CVD graphene. Nanotech Digital GmbH has introduced the foremost advanced method of Roll to Roll CVD graphene production.

Biografie
About the presenter: The founder/CEO of the company has a Master’s Degree in semiconductor and display engineering as well as an AICPA MBA degree. He has worked as an OLED mass production and micro mass production engineer. He has extensive knowledge in the thin film process, and equipment process. With his expertise in various display and semiconductor equipment process, he established “Nanotech Digital GmbH,” to develop various Roll to roll CVD graphene and applied graphene technology products. About Nanotech Digital GmbH: Our goal is to make mass production of transparent electrode film with Roll to Roll CVD graphene possible by utilizing our deep experience in semiconductor and display equipment engineering and integrating our extensive networks. Our product can be adapted for application fields as flexible display, electric vehicle, solar, super capacitor, etc. We are now seeking for partners and investors to capitalize on our roll to roll CVD grapheme technology in developing new products and applications.

Market trends for small-signal discrete devices

Schwantes, Stefan
General Manager DHAM Waferfab
Nexperia

Abstract
Growing market segments for discrete devices are : - Mobile & wearable - Automotive - Energy efficient industrial applications High-speed interfaces and increasing ESD sensitivity are a strong growth driver Clip-bonded packages are replacing wire-bonded for power efficient applications Different applications result in a broad range of packages The main objectives of new processes, packages, and products are: - Further reduction of power losses in MOSFETs, Bipolar Transistors and Rectifiers - Better protection of system ICs with minimized impact on the electronic signals - Size reduction (especially also height reduction) of packages/products

Biografie
Development Manager for Smart Power Technologies at ATMEL Development Manager for discrete diodes at NXP Business Line Quality Manager at NXP Fab Operations Maanger DHAM Waferfab at NXP General Manager DHAM Waferfab at Nexperia

Hybrid Metrology 2.0: From Metrology to Information Technology

Ger, Avron
VP, Strategic Partnership Programs
Nova Measuring Instruments

Abstract
As semiconductor device architectures have become more complex, with ever-tightening process control requirements, metrology solutions have become more resourceful and innovative. One such solution has been hybrid metrology, which has been defined as the practice of combining measurements from multiple equipment types in order to enable or improve measurement performance. But with advancements not only in metrology, but also computing and machine learning, the combining of data from multiple sources has quickly grown in terms of its sophistication, as well as its benefit to the end-user. Thus, it seems increasingly appropriate that the definition of hybrid metrology be expanded to the practice of combining data from multiple sources of information in order to improve measurement performance. With this interpretation, we present several hybrid metrology solutions that have been developed with leading semiconductor device manufacturers to solve some of their most challenging applications. These solutions utilize hybrid techniques that range from “conventional” hybrid metrology between scatterometry and X-ray based metrologies, to more diversified hybrid methods that rely on information from the complex geometry of the structure, machine learning, and other advanced computing technologies. Collectively, these next-generation hybrid methods enable the solution of many applications that were previously beyond the reach of metrologists’ best methods. In this work, such applications, along with their innovative solutions, will be documented. The flexibility of the hybrid methods—applied to both front-end and back-end applications—will also be made evident.

Biografie
 B.Sc. in electronic engineering from the Technion – Israel Institute of Technology  More than 21 years of experience in the semiconductor industry, including product development, service and application, mainly in Process control related positions.  Held several management positions in Nova, including US service management, Product and algorithms development, and the world wide application group management  Leads Strategic cooperation activities and joint development programs with customers, partners and research centers.

MEMS Sensors for automotive safety

OSAJDA, Marc
Business Development Director - MEMS
NXP

Abstract
Mobility enhances quality of life, but can come at a steep cost. The World Health Organization (WHO) counts 1.2 million people killed on world roads every year. WHO forecasts annual road fatalities to rise to 1.9 million by 2020. Road deaths are currently the number one cause of death for young people worldwide. The economic cost to developing countries is estimated at close to $100 billion per year. Making vehicles safer is not only a moral imperative but an economic one as well. Electronic Systems Save Lives While the momentum is currently on developing highly automated driving solutions to further reduce road fatalities by taking the human factor out of the equation, there will be situations where an accident might not be completely avoidable (human error, unpredictable mother nature events for example). As such, passive safety system as we know them today on our existing vehicles will continue to play a major role in protecting the driver and the occupants, may be even a more important role if the driver and the occupants are not necessarily paying attention to the road conditions in automated driving situations. This presentation will specifically highlight the latest development in terms of MEMS Automotive sensors for passive safety and highlight what makes an automotive MEMS sensors truly different from a consumer/IOT Sensors. What are the requirements in terms of performances, packaging, testing, reliability, functional safety and product longevity and how those challenges are addressed by NXP. Two product examples will be presented: Latest generation of Airbag sensors and Tire pressure monitoring sensor needed to comply with regulation but also for automated driving.

Biografie
Marc Osajda is Business Development Director for Automotive MEMS sensors at NXP Semiconductors, Toulouse, France Prior to this position, M. Osajda was the Director of Freescale Pressure Sensor business unit, with a specific focus on Automotive pressure sensors such as Tire Pressure Monitoring sensors Prior to this position, M. Osajda was in charge of Freescale Global Automotive Strategy. Responsible for market analysis and strategy formulation. M. Osajda joined Motorola's European semiconductor business in 1992 as a design engineer. From 1995 to 2004, M. Osajda was involved with the European Automotive industry, respectively as application engineer for sensors, marketing engineer for sensors and program manager for automotive products Marc Osajda holds a Master Degree in mechanics and electronics from the French “Ecole Nationale Superieure d’Arts et Métiers” (ENSAM).

From Smart Shoes to a Cloud Connected Sports Ball - How Sensor Frameworks enable efficient development

Paul, Shubhadip
Embedded Software Engineer
NXP Semiconductors

Abstract
The world today is more connected than it ever was. From watches to car infotainment, home alarms to blood pressure monitor, everything has become connected. Everywhere you look, you can find examples of products adding connectivity, sensor algorithms, and machine learning to unleash more information than ever before. As an example, let’s explore the Smart Shoe and Connected Sports Ball. A shoe that was only providing a mechanism to cushion and support your foot is now being designed with the capability of connecting to your smartphone and giving your weight, measuring altitude changes, counting your steps and giving you compass direction. This is just the next generation shoes. A ball that was only to be kicked around and play is now being designed with the capability of connecting to the Cloud and providing motion and pressure data to your Smartphone or Desktop which can help you analyze your technique and help improve your skills. In this presentation, I will provide concrete examples of a hardware and software ecosystem designed for battery powered applications requiring a low powered MCU, Bluetooth or Bluetooth Low Energy (BLE) and Cloud connectivity, along with sensor technologies such as Accelerometer, Magnetometer and a Pressure Sensor all powered by an Intelligent Sensor Software Development Kit (ISSDK). Driven by the power of a Sensor Framework such as NXP’s ISSDK to read digital sensor data form multiple sensors and send them over BLE to a Smartphone or Desktop, multiple intelligent systems can be developed in minimal time with minimal effort. This platform can easily expand beyond a smart shoe or a ball by the consumer, medical and industrial markets allowing the next generation connected devices and sensor end nodes to achieve lower powered processing capability and aggregate sensor data.

Biografie
Shubhadip Paul is a Senior Embedded Software Engineer at NXP Semiconductors, a world leader in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. Prior to that, Shubhadip has worked for Aricent, a leader in Embedded Software. He graduated from UP Technical University with a degree in Electronics and Communication Engineering. Shubhadip is actively involved in developing Software for creating Smart Sensing Nodes using NXP Sensors and MCUs. When he isn’t glued to a computer, he loves to drive and explore new destinations with Scenic Roads and National Parks being National Parks always on the circuit.

Enhanced SOI manufacturing process for new generation MEMS devices

Lempinen, Vesa-Pekka
Senior Manager, Customer Support
Okmetic Oy

Abstract
The rapidly growing IoT industry sets new demands for microelectromechanical system (MEMS) devices, the central building blocks of smart systems. Advanced MEMS devices are commonly built on thick-film bonded Silicon-On-Insulator wafers (BSOI), to gain benefits in precision and control of MEMS structures, device miniaturization and packaging. BSOI substrates offer advantages also in high voltage semiconductor device applications, where electrical isolation of devices is improved and allowing smaller device footprint. The tightening requirements on SOI wafer specification and device layer thickness uniformity in particular are driving traditional planarization technologies like CMP to their limits. Okmetic’s new process with superior thickness variation control fully independent of SOI film thickness and suitable for high volume production complements today’s manufacturing technologies perfectly. This new trimming technique for thick-film SOI processes reduces film thickness variation by a factor of five achieving a typical thickness variation of 20-30 nm (1σ) across a 200 mm SOI wafer. This is clearly beyond those achievable through traditional BSOI volume production. The process performance has no equal for film thicknesses above 5 µm but it can also be used in applications previously dominated by alternative SOI technologies in the range < 2 µm such as specific high-performance MEMS sensors, SOI-based smart power devices and silicon photonic devices. The process also brings significant advantages for MEMS applications in which SOI film thickness variation is critical, such as silicon oscillators and pressure sensors.

Biografie
Mr. Lempinen received his M.Sc. in Materials Physics in 1999. Mr. Lempinen has over 15 years of experience in Silicon based material engineering. He has worked for Okmetic since 2000 and held various positions related to R&D, process engineering and applications support. Currently he is working as Senior Manager, Customer Support being responsible for the company’s global technical customer support organization. Prior to his time at Okmetic, Lempinen was involved in photovoltaic research in Electron Physics laboratory of Helsinki University of Technology, Finland and Microelectronics Research Center of Iowa state University, U.S.A.

NEYER, Thomas
R&D Management
On-Semiconductor SiC Development

Biography
Dr. Thomas Neyer has received his PhD from University of Technology in Vienna and Cambridge University in 1995. He joined Siemens HL to work on mixed signal Product design and Test. Over the years Dr. Neyer transitioned to high-voltage Technologies at Siemens and Infineon Technologies and in 2003 he was entrusted to setup Technology Centers of Competence in Malaysia and China. During the PowerFab start and ramp-up in Kulim, Malaysia in 2005, Dr Neyer was building and leading the Fab engineering and manufacturing teams. Subsequently he was appointed as EVP for R&D and Fab Operation of Grace Semiconductors in Shanghai, China - an advanced Foundry for differentiated, analog Technologies. In 2011, Fairchild Semiconductor founded a R&D center for High Voltage Technologies in Munich and assigned Dr Neyer to spearhead the effort and coordinate all related Silicon and SiC HV development activities covering device design, modeling, application testing and High Power package development. in 2016 ON-Semiconductor bought Fairchild and confirmed Dr. Neyer as the world-wide leader of its SiC development program.

1000 V/80 W auxiliary power supply as a demonstration vehicle for Wide Bandgap power electronics system design

Wu, XiaoMin
Sr Application Engineer
ON-Semiconductors

Abstract
With the emergence of Wide Bandgap (WBG) semiconductors, power electronics are experiencing a renaissance. Many design limitations, such as switching frequency, thermal ruggedness and voltage capability of silicon based power devices are being pushed to new limits with Silicon Carbide (SiC) and Gallium Nitride (GaN) based electronics. In order to truly make use of this extended operation range, traditional topologies have to be re-imagined. To switch at higher frequencies, for example, new passives are required; using the extended thermal operation point needs a redesign of the cooling and layout of the PCB, this could lead to extensive saving of material costs. The improved switching efficiency, and reduced die footprint, despite blocking voltage capabilities beyond 1200 V, in combination with ultra-low inductive PCB design can greatly improve switching losses. This paper presents the approach and design considerations needed to turn traditional topologies, such as a quasi-resonant flyback, into WBG optimized systems which can make use of the various added benefits provided by current prototype of ON Semiconductors SiC power MOSFET. The investigations start with a comparison of SiC based power transistors to best in class available 1700 V Silicon MOSFETs, within a non WBG optimized system. Applying a new generation of ON Semiconductor gate drivers, in combination with partnered passives developers we demonstrate how switching frequencies beyond 300 kHz are realizable in high power applications, when using a WBG optimized design and SiC power MOSFETs. To finish the work a functioning demonstrator for a variable range quasi-resonant flyback based on 1700 V SiC MOSFETs is shown and characterized.

Biografie
Bachelor degree of Electrical Engineering and Automation, study in Harbin Institute of Technology university (CN) 2001 – 2005; PSU hardware designer in AcBel Polytech, Hangzhou 2005–2009; PSU hardware designer in Efore (CN & Sweden), 2009- 2011; Senior Simulation Engineer in Grundfos(CN)2011- 2014; Application Engineer in Fairchild &ON Semi(DE)2015-present

European bespoke wafer processing & development solutions for : Grinding, CMP, Edge Treatment, Wafer Bonding, Dicing and Cleaning

PEYRE, Georges
Sales & Marketing Director
OPTIM Wafer Services

Abstract
OPTIM Wafer Services : presentation of the services offered : Grinding, Dicing, Wafer Bonding with concrete examples of usage. Complete process flow are proposed using when needed CMP process and high capability cleaning. Working in partnership with customers. Projects are starting most of the time with DOE to tune process flow to customer requirements. Provided services are part of customer process flow. OPTIM Wafer Services was created back in 1984 and got high skilled group of people experienced in managing project involving strong links with customers

Biografie
Sales & Marketing Director at OPTIM Wafer Services. Long experience within Semiconductor Industry from Front End engineeering management up to Customer Service and Sales.

Roll-to-roll printed thermal Energy Harvester: A autonomous energy source for IoT

Lessmann, Frederick
CEO
otego GmbH

Abstract
Heat is everywhere – in many cases more than actually needed. otego develops innovative thermoelectric generators (TEG) that convert heat directly into electric power as soon as there is a condition of differences in temperature. As an independent energy supply for the Internet of Things otego’s TEGs work completely maintenance-free and can use even small differences in temperature. otego managed to bring together low-cost materials and industrial production methods for the first time. The cost advantage will enable otego to be the first manufacturer to produce TEGs suitable for broad mass applications. It is otego’s goal that future wireless sensors and IoT-devices such as smart home heating valves are operating energy self-sufficient. In many connected devices inconvenient battery changes will be a thing of the past. outstanding properties Conventional TEG are very expensive and therefore uncompetitive due to rare as well as toxic materials and complex production processes. The otego-technology makes use of inexpensive printable semiconductors (e.g. electrically conductive polymers) and processes them in large scale industrial production machines (roll-to-roll printing machines). This combination leads to a competitive price of TEGs for the first time. Variable There have never been as flexible and as all-round TEGs then otego’s. They can even be mounted on round surfaces like pipes! This is a handy feature since pipes are often an ideal heatsource. Non-toxic otego is convinced that heavy metals like lead and tellurium have no place in consumer or professional electronics. Therefore otego-TEGs are only made of nontoxic materials, that allow for an eco-friendly disposal. Flexible Vibration and shocks are unable to harm otego-TEGs. The TEGs are made of elastic materials and therefore meet the requirements for rough industrial environments.

Biografie
Frederick Lessmann is Co-Founder and CEO of otego. He and his team is pushing the boundaries of printed electronics and developed a completely new approach to make thermoelectric energy harvesting competitive. Prior to founding otego, Frederick was management consultant at a spin-off firm from AT Kearney and he held positions at Siemens and Fraunhofer. He holds an academic degree in industrial engineering and management from Karlsruhe Institute of Technology (Germany) and McGill University (Canada).

2D materials and heterostructures: Fabrication Technology and processes

Sundaram, Ravi
Market Manager : Research and Emerging Technologies
Oxford Instruments

Abstract
Two dimensional materials are gaining a lot of interest as a possible strategy for pushing the scaling limits as well as for heterogeneous integration in micro/nano electronics. Fabrication of 2D materials and electronic devices require tailored solutions for the deposition and etch of these atomically thin materials. In this talk, I will present the technology and processes developed at Oxford Instruments for the atomic scale processing and quality control of 2D materials. This will include equipment and processing for deposition and etching of 2D materials by CVD, ALD and ALE as well as deposition of high k dielectrics on such materials for optimum device performance. In addition, the possibility of creating novel functional architectures by in situ deposition of 2D heterostructures will also be outlined.

Biografie
Dr Ravi Sundaram is the Market manger for emerging technologies at Oxford Instruments Plasma Technology. He has been involved in 2D materials research in several institutions such as EPFL, Switzerland, Max Planck Institute Stuttgart, Germany, IBM T.J Watson Research Labs, NY and Cambridge University where he worked on several aspects of graphene and 2D materials from synthesis, fundamental science to prototype applications in optoelectronics and electronics. He joined Oxford Instruments to lead and coordinate efforts towards 2D materials R&D and is now responsible for scoping out and developing a strategy for emerging technology markets.

Plasma Dicing 4 Thin Wafers

Windemuth, Reinhard
Sales Director Microelectronics Europe
Panasonic Automotive & Industrial Sales Europe GmbH

Abstract
Abstract: “Plasma Dicing 4 Thin Wafers” Recently many issues came up when using conventional dicing methods. Such conventional methods are mechanical sawing (blade dicing) or laser dicing or stealth dicing. Relevant applications are thin wafers, brittle materials and wafer singulation for very small devices or LED or discretes. Plasma dicing is a recommended method to overcome many challenges of wafer separation. Damage free, water free, particle free and high throughput dicing can be realized by using plasma trench etch (dry etch) technology for dicing. Several technical and equipment aspects will be presented and discussed accordingly. Plasma dicing technology can provide solutions for high rate dicing, beautiful chip shape without any chipping and high bonding strength. Cost aspects: The throughput of a plasma chamber depends mainly on wafer thickness and is quite independent from wafer size or chip size. By using plasma for dicing the throughput can achieve more than 4 or 5 wafers per hour. Such cannot be achieved by any line-by-line dicing method as long as small chips are required. Significant cost savings can be expected. Advantages of plasma dicing are described in detail such as a. Damage Free / Chipping Free. b. Increase quantity of chips per wafer c. Water Free process d. Flexible Chip Shape e. Etching speed and characterisation f. Total Dicing Process Flow New materials for semiconductor devices are recently coming up on the market. Such as SiC base material and GaN-on-Silicon for power devices and discretes. Future challenges such as SiC dicing or GaN-on-Silicon dicing will be discussed. Typical topics on Plasma Dicing equipment are explained

Biografie
Degree of Diplom-Ingenieur in Process Engineering on Technical University in Munich / Germany in 1988. Since then Project Management & Sales for different kinds of Industy, mainly in chemical Industry. Since 1998 Sales & Project management in Microelectronics & Semiconductor Industry for F&K Delvotec, Wirebonding and Diebonding Technology. Profund experience in handling packaging projects in both Semiconductor and Device-Manufacturing Industry. Since 2006 Sales Director for Microelectronics Equipment at Panasonic Factory Solutions Europe (PFSE). Main target is to establish new PFSE business fields in the Backend and Frontend Industry in Europe: Dieattach, Flipchip, Plasma Cleaning and Plasma Etch Technolgies.

Longford, Andy
Consultant
PandA Europe

Biography
Andy Longford C.Eng FIET Andy is Managing Partner (CEO) and Senior Consultant at PandA Europe, a technical & market Consultancy Company involved in Semiconductor chip Packaging and Electronics Interconnection. He has worked on chip package designs for a number of years and is currently involved with emerging chip package design analysis and technical support work. He is a member of a number of technical committees, including SEMI Europe (APC) and ESPAT (a SEMI SIG) PandA also provides Secretariat Services for IMAPS-UK. For further information contact: Andy Longford PandA Europe 1 Beach Street Dawlish Devon EX7 9PN UK Tel: + 44 1626 862669 Mob: +44 7710 209640 Email: andy@pandaeurope.com

Park Systems Inline Automate AFM for Semiconductor Application

Li, Yong
Sales Director
Park Systems Corp.

Abstract
The Park System’s NX-Wafer has been widely accepted by the semiconductor industrial to support inline metrology applications. Park System’s AFM has the common core platform for both research and industrial systems which allows fast & cost-effective delivery of new solutions. Its state-of-the-art hardware design with fully decoupled X/Y and Z flexure scanners allows the 100um x 100um, artifact-free, high resolution, and true 3D profiling and imaging, and its industry leading system noise spec of < 1A enables high resolution roughness measurement of 200/300mm wafers in automated mode. In addition, Park System’s true “non-contact” mode drives significant tip cost reduction and enables exceptional measurement repeatability performance. Semiconductor manufactures and equipment suppliers are adapting Park NX-Wafer’s unique capabilities to monitor trench depth, TSV, surface roughness, CMP dishing and erosion process. The NX-Wafer is the bench mark automate AFM system for Semiconductor industrial. It is playing more and more critical role to meet the inline advance metrology requirement.

Biografie
Yong Li started his IBM career in 1988 and served as the metrology equipment engineer for 13 years. In August 2000. He joined Veeco Instruments as the NA Eastern region sales manager and expended his role to cover China Semi sales in 2003. After Veeco Instruments metrology group was acquired by Bruker in 2010. Yong took over the worldwide automate AFM sales responsibility. He joined Park Systems in August 2016 as the global sales director.

Data Analysis Strategies for Monitoring 20 nm Particles in Critical Semiconductor Process Chemicals

David, John
Global Applications Manager
Particle Measuring Systems

Abstract
Real time monitoring and control of particles as small as 20 nm in critical wafer cleaning chemicals is essential for controlling defects and maintaining high manufacturing yields in advanced microelectronics processes. Data analysis strategies can be implemented to determine if particle variations are random or systematic and allow focus of improvement efforts to reduce particle levels with time from source, through distribution, to the wafer fab cleaning tools. Nanoparticle contamination is assessed based on the statistical distribution of the particle measurement rate. The statistical distribution of rate of particle measurement will approach a Poisson distribution for fluids without systematic contamination sources. The deviation from Poisson statistics can be used as a figure-of-merit to quantify the stability of nanoparticle contamination in high purity chemical systems. Example data are presented and discussed, and recommendations made for achieving critical process fluid purity at the 20 nm.

Biografie
Mr. John Davis is the Global Applications Engineering Manager at Particle Measuring Systems. In this role he is responsible for a team who works with customers to create solutions for their contamination monitoring needs. Prior to Particle Measuring Systems, Mr. Davis worked for several years as a product manager of thin film deposition equipment for the high end optics market. Mr. Davis has an MS in Mechanical Engineering and an MBA.

Arnold, Michael
Managing Director
PEER Group

Biography
Dr. Michael Arnold, Managing Director at PEER Group, has over 25 years industrial experiences in high-tech industries. From 1981 - 1986 he studied Physics at the Friedrich-Schiller-University in Jena, Germany, where he obtained his PhD in 1994. Michael gained broad experiences in system simulations, software design and development, optical inspection systems, and product development for the aerospace and defense industry. Michael has been involved with factory automation software solutions for the semiconductor and solar industry since 2001 in the Operations Manager position of TRW and since in 2003 as Managing Director of PEER Group GmbH in Dresden.

Data Collection Strategies for Smart Manufacturing

Suerich, Doug
Product Evangelist
PEER Group

Abstract
Data collection has always been an essential part of semiconductor manufacturing. Now, successful smart manufacturing solutions enable intelligent data analysis and allow both manufacturers and equipment suppliers to turn their collected data into action. Implementing an effective strategy for collecting your data requires a careful balance between accommodating legacy systems, ensuring data security, minimizing costs, and allowing for the future integration of advanced technologies. Join us as we discuss practical, extensible architectures for data collection by both OEMs and fabs.

Biografie
Doug Suerich is the Product Evangelist at The PEER Group Inc., the semiconductor industry’s leading supplier of factory automation software. Doug focuses on big data and remote connectivity solutions that help manufacturers collaborate securely on tools and data in a production environment. Doug has over 20 years of experience leading software teams for a variety of industries including semiconductor, manufacturing, and transportation. Most recently, he was involved in architecting PEER Group’s remote connectivity solution, Remicus™, and he was a champion in promoting the use of cloud computing and latest-generation web technologies. Prior to joining PEER Group, Doug was a software development manager, automation engineer, information systems specialist, and consultant. He has extensive experience designing and integrating robust automation software solutions. Doug holds a Bachelor of Applied Science with Honours in System Design Engineering from the University of Waterloo.

Hyb-Man: Hybrid 3D Manufacturing of Smart Systems

van Asselt, Rob
Project leader
Philips Lighting

Abstract
The current way of mass producing consumer electronics products poses challenges to industries like Philips Lighting. New flexible hybrid manufacturing methods and 3D integration of electronics enable faster product realization, product customization and new products with improved design and performance. Moreover, the integration of functions will result in less parts and easier assembly, which facilitates local and on-demand product manufacturing. The successful implementation of hybrid manufacturing methods requires a wide range of competences and parallel development of technologies and markets for materials, processes, production equipment and products. Therefore we started the Hyb-Man project with the goal to develop hybrid 3D manufacturing methods to enable flexible first time right production of smart systems. Together with 11 partners from Germany and the Netherlands we will develop and integrate technologies for additive manufacturing, 3D electrical structures, assembly and interconnect. First time right manufacturing will be achieved by creating design rules based on understanding of product-process relationships and by developing in-line testing and quality monitoring as integral part of the complete production chain. In parallel we will develop two innovative product cases covering different applications and sectors (LED luminaires, automotive adaptive sensors) to demonstrate the hybrid 3D manufacturing approach.

Biografie
Dr. Rob van Asselt has a PhD in chemistry from the University of Amsterdam. In 1994 he joined Philips Research, where he has been involved in a variety of product and process development projects. Since 2011 he is project leader and system architect for LED lighting products. In this role he is also leading the Penta funded cooperation project Hyb-Man.

Enabling silicon and metal oxide materials for dielectric and pattern transfer applications

Gädda, Thomas
Director
PiBond

Abstract
PiBond develops and manufactures advanced siloxane and metal oxide materials. The main function the materials have been developed for are dielectrics and pattern transfer. Dielectric products include: - Optical dielectrics with wide refractive index range - PMD, ILD and passivation dielectrics - Patternable, high temperature CVD SiO₂ replacements and conformal low k dielectrics Pattern transfer materials include: - metal oxide and siloxane hard masks with excellent etch resistance and other properties

Biografie
Thomas Gädda functions as a director at PiBond and leads efforts in sales and product support/development. During his career he has held various positions at VTT, Silecs and AIST, Japan. He holds several patents and has published ~30 peer reviewed papers. Thomas holds a PhD in Chemistry from University of Southern California and an MS in Chemical Engineering from Helsinki University of Technology.

Carrier Tools for handling and processing of non standard semiconductor wafers

Wesselkamp, Carsten
Sales Manager
Plan Optik AG

Abstract
Semiconductor wafers undergo a wide range of process steps, but wafer diameters or shapes sometimes do not fit to the available equipment. Carrier tools adapting smaller or non standard shaped wafers can be used to enable the processing of such wafers. Example: equipment has been set up for 8" wafers but the processing of a 6" wafer needs to be done without changing the setup? Carrier tools adapt from 6" to 8" and the smaller wafers can still run through several processes. These carriers are made from silicon, quartz or a combination of silicon and glass. Customized solutions are available. Unique marking by QR codes for easy back tracing make them suitable for a huge number of re-use cycles.

Biografie
Mr. Carsten Wesselkamp got a degree in Industrial Engineering with a study emphasis on operating technology and production engineering in 1995. He additionally achieved a certificate in work system and process organization by REFA (organization for work study and company organization). After working as assistant production manager for a multinational steel and aluminum producer he joined Plan Optik AG, one of the leading manufacturers of wafers for MEMS and carriers for semiconductor applications in 1996 as one of their sales engineers. Since many years, Mr. Wesselkamp acts as the international sales manager of Plan Optik AG and (together with his team) manages the accounts of Plan Optik AG including all technical and commercial tasks.

MEMS TRENCH SIDEWALL SMOOTHING BY DRY PLASMA HDRF TECHNOLOGY

Pilloux, Yannick
Business Development Manager
PlasmaTherm

Abstract
Semiconductor industry has been focused over decades on Dry etch and deposition technologies, while cleaning was mainly wet technology. Optical devices as well as MOEMS for optical Mems, require to smooth the sidewall profile of the devices in order to keep good quality of optical characteristics. While the industry is currently using thermal oxidation, dry plasma etching is seen as innovative technology to smooth devices sidewall. This paper will focus on dry Plasma technology named HDRF, for High Density Radicals Flux, providing efficient cleaning solution without damaging sensitive layer like GaN, TiN, and keep low temperature processing. HDRF is high density plasma source higher than 1E17 cm-3 density, while conventional ICP source is in range of 1E13 cm-3, and is based on O* radicals free of ions while conventional Asher have ions and photons. While shaping MEMS devices is commonly done by using Deep Reactive Ion Etching (DRIE) technology and Bosch process, which is alternate process of isotropic etch and sidewall passivation steps (called loop); Alternated Bosch process generate scalloping, which are peaks and valleys on the sidewall structure. HDRF process step is required to smooth scalloping as it can create electrical arcing or electrical leak, in case of isolation layer requirement. By using fluorine based chemistry in combination with high plasma density, HDRF can smooth scalloping in high aspect ratio structure up to 30:1. It is called micro-isotropic etch step, which is to etch mainly peaks without impacting structure dimension width. Scalloping from 50 to 800 nm (peak to valley) can be reduced to few nanometer by HDRF plasma, within less than 3 minutes per wafer.

Biografie
Yannick Pilloux is Business Development Manager at Plasma-Therm, where he is responsible for the MEMS Market. Prior to Plasma-Therm, he was Product Manager at Tegal and Alcatel Micro Machining System for about 15 years, leading the DRIE technology for MEMS Industry as well as TSV applications. Yannick holds a Master degree in Business Management from CESI Lyon France

Platform for Advanced Characterisation-Grenoble (PAC-G)

Segura Ruiz, Jaime
D50 Scientist responsible
Platform for Advanced Characterisation-Grenoble (PAC-G)

Abstract
The Platform for Advanced Characterisation-Grenoble (PAC-G) is the single entry point for commercial services of characterisation, dedicated to micro- and nano-electronics industry, offered by the European Synchrotron (ESRF), the Institut Laue-Langevin (ILL), the Laboratory of Subatomic Physics & Cosmology (LPSC) and the PFNC (laboratory nano-characterisation and sample preparation) of CEA, all of them placed in Grenoble, one of the main clusters for micro and nano-electronics in Europe. The PAC-G provides outstanding non-destructive characterisation for micro and nano-electronics materials, from wafers to packaged electronic devices, printed circuit boards, using the brightest synchrotron X-rays and the most intense source of neutrons in the world, supported by state-of-the-art facilities at the CEA. We provide proprietary client services, as well as being open to collaborative programmes and partnerships (e.g. Horizon2020 projects). PAC-G is your ideal partner and we offer: Non-destructive analysis, Operando and in-situ analysis, Dynamic and longitudinal studies, Flexible experimental design, 2D or 3D imaging. Applications: Radiation hardening testing, Physico chemical and Material structure characterisation, Defectology and failure analysis, Radiation hardening tests, Metrology Residual strain, Microstructure, Elemental analysis, Electronic structure, Magnetic properties.

Biografie
I am electronic engineer with a Ph.D. in applied physics, and a thesis focused on the characterization of semiconductor nanostructures for optoelectronics applications. I worked at the European synchrotron Radiation Facility (ESRF) during three years using a synchrotron nanoprobe for the characterization of single nanoelectronic devices and semiconductor nanostructures. During the last four years, I have been working at the Institut Laue-Langevin (ILL) neutron source in Grenoble, helping the microelectronics industry to use the advanced neutron and synchrotron characterization tools available at the two facilities (ESRF and ILL) for their R&D processes. In this context, I am currently scientist responsible of the new industrial instrument D50 at the ILL.

FLEXTURA PVD - A new and highly flexible production tool

Larsen, Jens William
Managing Director/Owner
Polyteknik AS

Abstract
With the aim of designing the most flexible PVD production tool the FLEXTURA PVD platform was born. The new Flextura plaform of PVD-systems from Polyteknik is unveiling a new way of modular thinking for PVD-systems. From the single chamber with classic PVD-processes to the efficient cluster systems with highly advanced PVD-processes, the Flextura way of thinking is giving you the possibility to let the investments follow increasing demands of your facility. The Polyteknik Flextura systems are highlighting a unique combination of high quality components, intelligent software,and a straightforward user-friendly operation. Mass Production Applications - High yield mass production of thin films by PVD processing on wafer based products from cassette to cassette. - Proven reliable wafer handling by Brooks MAG7 robot - Advanced high temperature PVD-processing of non-standard semicon solutions. - Multi magnetron chambers for true co-deposition - Automatic loading to batch fixture Academically Applications - Efficient processing and data acquisition of advanced PVD and thermal processes - The bridging PVD-platform from scientific and engineering intelligence to high yield mass production. - Integration of surface analytical characterization and new processes on request. Special Applications - Process frame for epitaxial growth of thin films by reactive sputtering and e-beam deposition on to substrates heated up to 1000˚C - Glancing Angle deposition at wafers in mass production scale - Market leading process software technology for accurate real time control of deposition. - Dynamic in-situ feedback control by PEM in reactive sputtering - HiPIMS sputtering for highly ionised deposition Markets - MEMS sensor production - Power electronics (AlN, GaN) - Advanced packaging (EMI on package, TSV) - LED, HB-LED, OLED - Photovoltaics R&D

Biografie
CEO, Jens William Larsen (M) is a Master of Science from Aalborg University, Denmark. He founded Polyteknik in 1995. He has extensive experience in leading development projects and bringing them to the market together with industrial companies. These projects are typically spanning from development of customer-specified coating processes as well as design and construction of tailored equipment dedicated to special coating processes. The portfolio of Polyteknik is increasing and has recently been further consolidated in a strategic direction focusing on designing a state-of-the-art module-based concept - The Flextura PVD platform. JWL is also engaged in several research and development projects together with both national and international partners.

Towards Scalable CMOS Flexible Electronics

Alkhalil, Feras
Research Manager
PragmatIC

Abstract
The proliferation of smart objects required to truly harness the full capability of the Internet-of-Things (IoT) is enabled by the form-factor and cost-structure of flexible oxide electronics. In this sector, state-of-the-art is based on unipolar n-type transistors (NMOS) and is close to full commercialisation. PragmatIC is currently commissioning its FlexLogIC™ fab-in-a-box system, developed under the EU Horizon 2020 SME Instrument Programme (grant agreement No 696266). FlexLogIC™ transfers PragmatIC’s proven end-to-end flexIC production process into a self-contained, fully automated, modular “fab-in-a-box” for high throughput manufacturing. FlexLogIC offers capacity for billions of flexICs at a capital cost between 100 and 1000 times lower than a silicon fab. This will address many emergent application spaces e.g. proximity RFID tags, although the high static power consumption of unipolar logic precludes ultra low power applications and very complex circuit designs. Broadening the accessible applications requires complementary (CMOS) logic, where static power consumption is negligible. Here, we report on key considerations in moving PragmatIC’s flexible electronics technology from R&D to mass manufacture, wider market adoption and the ongoing advancement of oxide based CMOS logic (COSMOS, Innovate UK project Ref: 132201) to further extend the opportunities for this technology.

Biografie
Feras joined PragmatIC in September 2015 and leads PragmatIC’s research team. He received his MSc and PhD from the University of Southampton in Microelectronics System Design and Solid State Electronics, respectively. From 2013 to 2015, he worked as a Research Fellow at the University of Southampton developing single electron transistor and quantum dot architectures with research laboratories and universities in the UK and Japan. He also held a lectureship, teaching Solid State Physics and Semiconductor Devices at the University of Southampton Malaysia Campus.

The power of collaboration in Europe

Delpu, Guilhem
Collaborative programs manager
RECIF Technologies

Abstract
Small and Medium sized Enterprises (SME) can sometime face problems to connect to the right stakeholders of the semiconductor industry and tackle the challenges they have to. Reasons such as protection of IP’s (among others) make that dialog can be difficult to establish between several parties around a common goal. We, in Europe, have multiple frameworks that simplify the set-up of basis for collaborative programs; this is a chance! Within such appropriate environments, all contributors of the value chain can find their interest around a common goal and major road blocks can be lifted. From RECIF point of view, as an SME, this is the power of collaboration in Europe! In its presentation, RECIF will provide insights of achievements obtained in its TSV-HANDY project, currently running under CATRENE framework. RECIF will also illustrate why such collaborative frameworks are key to maintain leadership of European stakeholders in a worldwide market.

Biografie
Guilhem Delpu works for RECIF Technologies as collaborative programs and product marketing manager. RECIF is specialized in robotics wafer handling systems. He joined the company in 2004 and has held several positions in the company. Throughout the past 7 years, he has managed the positioning of RECIF in 12 collaborative programs build under various frameworks (H2020 / ENIAC / CATRENE). He has also build and led 2 projects for RECIF under CATRENE framework. One is currently running. Guilhem Delpu graduated in mechanical engineering as well as marketing, in Toulouse.

Mobility of tomorrow: Will all be different, will all be better?

Rinderknecht, Frank
Founder & CEO
Rinspeed

Abstract
To be announced

Biografie
Frank M. Rinderknecht (born 1955) is the founder and CEO of Rinspeed Inc. - based in Zumikon/Switzerland - which he has established in 1977 as young student at the ETH (Technical University of Zurich). While the import of sunroofs from the USA was his first business activity, Rinspeed soon became a pioneer and first mover in the then newly created tuning industry. In 1995 Rinspeed started to build proprietary prototypes and concept cars. The invention of the steering wheel with integrated controls for radio or other functions, sustainable powertrains and driver assistance systems are amongst noteworthy milestones in the company’s history. After having sold all tuning activities in 2008 to a German competitor, Frank’s activities are centered today on being a Think Tank of the automotive and other industries and create and promote innovative technologies, materials and mobility means of tomorrow. Privately, Frank is passionate about spending his time on the sea, preferably in the Med.

Denes, Istvan
researcher
Rober Bosch GmbH

Biography
Biography Dr. Istvan Denes (Ph.D.) is a researcher of the Robert Bosch Company, Project manager leading corporate projects on the field of polymer based functional materials. In 2011 – 2015 coordinated the publicly funded project EPoSil on Wave Energy Harvesting by Electroactive Polymers. His research field concerns the technological and economic aspects of polymer based electro-mechanical systems. Istvan Denes got his M.Sc. in mechanical engineering and holding a Ph.D. in power electronics being supervised by the IEEE Fellow Prof. Istvan Nagy. In 2012 he was completing his studies at the Steinbeis Business Academy receiving the MBA title. He has been granted the Scholarship of the Hungarian Republic in 1998 – 2000. He is a member of the European Scientific Network for Artificial Muscles (ESNAM), referee for project proposals of the funding announcement “Innovative Elektrochemie” of the German Ministry of Science (2016) and referee for the IOP Journal “Biofabrication” (2016).

Richter, Thomas
Vice President
Robert Bosch GmbH

Biography
Thomas Richter, since July 2015 Vice President of the Wafer Fab 150 / 200mm & MEMS at BOSCH Reutlingen, was born 1974 in Chemnitz. Working for SIEMENS, INFINEON, QIMONDA and MELEXIS he now has about 20 years of experience in the semiconductor industry. He holds a Diploma in Micro Technology of the University of Applied Sciences Zwickau (WHZ).

Requirement to Automotive Packaging Technologies

Guyenot, Michael
Manager
Robert Bosch GmbH

Abstract
Until till now, there is the trend of more consumer packages in automotive applications. The main motivation is the reduction of the cost and integration of new functions, e.g. entertainment or car to car communication. Consumer packages are optimized for miniaturization, high volume production and low cost. On the other side the reliability of consumer packages is often not specified and tested for automotive requirements. Cars are long life products with a durability of more than 15 years or 300.000 km or 6.000 hours of operation. With the change to electro mobility there are more permanent working units with up to 100.000 hours of operation in the car, e.g. charger, battery management. The improvement of these higher request and necessary reliability tests are the issue for consumer packages in automotive applications. Especially the need of front load development and simulation capability for higher product quality, e.g. autonomic driving, have to be solved for the consumer packages.

Biografie
Dr. Michael Guyenot studied Technical Physics and Economy at University of Bayreuth, Germany. He holds a PhD degree as engineer in materials science from the University of Bremen, Germany. Michael started 2002 at Robert Bosch GmbH in the business unit “Automotive Electronic” as a Senior Expert for reliability testing of automotive electronics. Since 2007 he works as Senior Manager in Corporate Research of Bosch and is leading a research group for electronic packaging and interconnection technology. Michael is involved as specialist for automotive and power electronics in public funding projects.

Potentials of System-in-Package Technologies for Future Bosch Products

Giersbeck, Martin
Vice President
Robert Bosch GmbH

Abstract
The pace of the increase in transistor counts for one processor unit generally described by Moore’s law holds on until today. However the growing complexity raises challenges on the energy supply, thermal management and reliability of these components. Aspects which are not only influenced by the processor architecture itself but by the technologies dealing with the packaging and the electrical interconnection with further peripheral units as well. Since these technologies do not scale by Moore’s law, they are often described by the term “More than Moore”. In order to address the above challenges System-in-Package (SiP) concepts are being developed integrating several electric components in a single unit. These new approaches help to fabricate compact circuits with enhanced features such as integrated user interfaces, sensors and actuators. Within Corporate Research of Bosch concepts to embed and interconnect various electric components in a flexible circuit carrier have been developed in strong cooperation with European research institutes. Since many processes were already established in the CE field, extensive studies have been performed to investigate the suitability of such integration technologies for the automotive and the industrial sector. The studies have been focusing on reliability issues of the packaging and the electrical interconnections under cyclic thermo-mechanical loading. Besides the integration of conventional electrical components new transducer technologies especially suitable for flexible packaging have been treated as well. Current research activities are focusing on technologies integrating sensor components such as projected capacitive and resistive touch sensors with transparent, electroactive polymer-based haptic transducers in one package together with the display unit.

Biografie
Martin Giersbeck studied Mechanical Engineering at Bochum University and at Aachen Technical University. From 1995 until 1999 he was a scientific research assistant at the Institute for Plastics Processing (IKV) at Aachen. In 1999 Martin Giersbeck joined Bosch. Entering as a trainee he held several leadership positions at the Bosch subsidiary Blaupunkt at Hildesheim for a period of 10 years. Within the field of navigation systems his scope moved from mechanical design via project management and customer acquisition to a general responsibility for aftermarket products. In 2009 Martin Giersbeck changed position to join Corporate Research and Advance Development of Bosch. Within this organization he has been responsible for Plastics Engineering from April 2010 on. The department used to be located in Waiblingen, but is now part of the Research Campus of Bosch at Renningen.

Industrie 4.0 – Can the SMT industry learn from Semiconductors – and vice versa?

Alexander, Michael
Partner
Roland Berger GmbH

Abstract
SEMICON Europe, Munich 14th to 17th of November, 2017 Dr. Michael Alexander, Roland Berger GmbH Years before "Industrie 4.0" became a buzzword, the Semiconductor industry has pioneered many innovations to digitize the supply chain and increase manufacturing efficiency. The SMT industry is the natural downstream partner of the Semiconductor industry, but has only started implementing "Industrie 4.0" levers recently, and even the best have made about half of the way yet. In our talk, we show our model for "Industrie 4.0 in SMT" used to benchmark the "Industrie 4.0" readiness of market players. We look at the different levers in HW, SW, and system integration for the SMT industry and discuss which of these levers can make use of Semiconductor best practices, and which of them may be of use for Semiconductors. Munich, 10th of July, 2017

Biografie
Dr. Michael Alexander joined Roland Berger in 2014 as a Partner in the Competence Center for Engineered Products and High Tech. He is an industry expert in the electronics and semiconductor business. His recent consulting work has centered on strategy, business development and R&D management. He has carried out successful projects for international electronics, semiconductor, renewables and machinery groups in Europe, Japan, Southeast Asia and the US. Michael brings more than 15 years of management experience in Europe and Asia to Roland Berger and has worked for companies like Daimler, Siemens and Infineon Technologies. He also spent five years with a large international consultancy. Prior to his work in industry and consulting, he pursued an academic career at the Max-Planck-Institute of Solid State Research and as a Post-Doc at the Industrial Research Institute (IRI) in Yokohama, Japan. In 1991, he received the "Young Scientist Award" from the Werner-von-Siemens-Ring Foundation. Michael holds a Master’s degree from the University of Munich (LMU) and a PhD from the University of Stuttgart in Semiconductor Physics. He has also received vocational training in banking.

Wafer & Final Test in the new era of electronics

Sallenhag, Martin
CEO
RoodMicrotec GmbH

Abstract
The shift in automotive, industrial and healthcare markets towards a higher content of electronics puts a new set of demands on wafer and final test solutions. Moving into more complex and miniaturized solutions makes the implementation of test solutions much more important including being part of the design phase from the beginning. We at RoodMicrotec see new demands from the market to do multiple temperature and voltage tests both at wafer level as well as on packaged parts. This requires additional equipment to be able to do it in conjunction with partnerships with both the design houses as well as the packaging houses. This to find the optimal solution for all different applications. The evaluation of test data, from PCM to final test, is also a challenge for the test houses. Installation of tools such as YieldMann helps getting the data in a format that enables us to cooperate with the wafer fab to get the optimal yield for a specific product. It is also very important to have a well-defined name structure for all the data that is generated to be able to quickly analyze and take measures to improve the yield. Being part of the complete supply chain, as RoodMicrotec is with its Turnkey solutions, improves the possibilities to ramp a product to high volume production in a short time with good yield from the beginning.

Biografie
Martin Sallenhag, CEO and Managing Director RoodMicrotec N.V. Martin Sallenhag joined RoodMicrotec in March 2015 as CTO and was appointed CEO and Managing Director in June 2016. He is responsible for the overall management of the company together with COO Reinhard Pusch and specifically managing the engineering departments, quality, human resources, purchasing and IT. He has over 25 years of experience in the semiconductor business in various management positions within Samsung Electronics, Dialog Semiconductor and Ericsson. He holds a Master of Science degree in Electrical Engineering from Lund University with focus on Mixed Signal ASIC design.

Cybersecurity for connected / autonomous vehicles

Hartley, Simon
VP/Cofounder
Run Safe Security

Abstract
Cybersecurity for connected / autonomous vehicles Everyone wants the improved safety, economy and features offered by increasingly connected, driver assisted and autonomous vehicles. These benefits are driven by software taking over certain driving tasks, which suggests a gating issue around the security of vehicles, communications systems and cloud infrastructure. What lessons can be drawn from earlier rollouts of mobile devices and PCs? In previous rollouts, only data was at stake but with vehicles fleets there is the potential for driver distraction, ransomware, denial of service, property damage, bodily injury and disruption of transport infrastructure.

Biografie
Simon is an industry recognized expert in cybersecurity, mobility and IoT, co-founder of Washington D.C. based cybersecurity startups 202 Partners and RunSafe Security. He is a member of the Society of Automotive Engineers’ IoT Cybersecurity Committee and a contributing author of their new book “Cybersecurity for Commercial Vehicles". RunSafe was developed as part of DARPA’s High-Assurance Cyber Military Systems (HACMS) program of cybersecurity for military vehicles, drones and medical devices. Simon also worked with Apple and Samsung in hardening their mobile devices for DoD and government use. Previously, he was VP of Sales at Kaprica Security (acquired by Samsung), Mobile Program Director, DMI, market leader in enterprise managed mobility and Director of Sales at Thursby Software, market leader in strong iPhone security. Prior executive sales and management roles in the US and Europe include Red Hat, HP, Capgemini, a $9B hedge fund, a $50MM dot com and a background in nuclear software engineering. He holds a BS in Physics from U-Manchester, England, a MS in Law & Cybersecurity from U-Maryland Carey Law, CISSP, CEH and CIPP/US cybersecurity and privacy certifications.

SAE International Semiconductor Opportunities

Cavanaugh, Tim
Emerging Technology Developer
SAE International

Abstract
SAE International sets the standards for the automotive and aerospace industries around the world. Known as the Society of Automotive and Aerospace Engineers, SAE combines the efforts of Original Equipment Manufacturers (OEMs) and Tier 1 and 2 Suppliers in developing automotive and aerospace standards. SAE set the standards for the five stages of autonomous and automated driving. Additional standards are being generated everyday to assist manufacturers in developing and manufacturing safer vehicles around the world. This presentation will cover where the industry is growing and how fast in what technologies. Each new vehicle will jump from Gigabits to Terabits in required data for both transmission and storage. The integration of machine learning, artificial intelligence, LIDAR/Radar/Video Sensors, and IoT Systems will put demands on a vehicle beyond what we can imagine today. Learn where you should place your emphasis on growing your business related to the automotive industry.

Biografie
With a lifetime of automotive experience, Tim Cavanaugh spent 25 years at General Motors launching over 30 new vehicles. Tim was responsible for connecting OnStar to the Electronic Control Module (ECM) in order to feed vehicle health to a webserver and later onto a smartphone for the first connected telematic vehicles. He later wrote the requirements to allow for Hands Free calling using Bluetooth. Then added WiFi to both Chevrolet and Cadillac. While executive director at BAE Systems he connected the US Military land, air and sea vehicles to what was politely called "a secured military version of OnStar on prognostic and predictive maintenance steroids." While at the National Automotive Center he developed various emerging technologies for the US Military which included the development of automated vehicles and robots and drones. Tim currently develops engineering events centered around autonomous/automated vehicles, hybrid/electric vehicles and IoT/Cloud. He's connected globally to the industry leaders of the OEMs and Tier 1 and 2 Suppliers to bring the best innovative speakers to the stage for SAE International.

Silicon Photonics for Mid-Board Optical Modules

Epitaux, Marc
Chief Architect
Samtec Inc,

Abstract
A new generation of miniature optical engines is enabling novel on-board optical interconnect solutions. In the presentation, we’ll review the technology, the applications and challenges of these Silicon Photonics Mid-Board Optical Modules. We’ll address many of the practical design aspects of integrating these devices including Photonics chip integration, packaging technology, optical coupling connectors and mounting solutions and heat-sinking.

Biografie
Marc Epitaux received his Master Degree from the Swiss Federal Institute of Technologies in Lausanne, Switzerland in 1992. Early employee at LightLogic and co-founder at Aprius/AlpenIO, Marc is a senior technologist with over 19 years of experience in the fiber optics industry. He led Intel’s 10Gbps optical packaging development and several advanced packaging Research Programs, architected Aprius/AlpenIO’s mid-board optical engines and active optical cables. AlpenIO has since 2011 been acquired by Samtec Inc. Marc has published over 12 papers and he holds over 35 patents.

Quantum Mechanical Simulation for the Analysis, Optimization and Accelerated Development of Precursors and Processes for Atomic Layer Deposition (ALD)

Krauter, Caroline
Senior Applications Scientist
Schrödinger GmbH

Abstract
Continued miniaturization and increasingly exact requirements for thin film deposition in the semiconductor industry is driving the search for new effective, efficient, selective precursors and processes. The requirements of defect-free, conformal films, and precise thickness control have focused attention on atomic layer deposition (ALD). ALD precursors so far have been developed through a trial-and-error experimental approach, leveraging the expertise and tribal knowledge of individual research groups. Precursors can show significant variation in performance, depending on specific choice of co-reactant, deposition stage, and processing conditions. The chemical design space for reactive thin film precursors is enormous and there is urgent need for the development of computational approaches to help identify new ligand-metal architectures and functional co-reactants that deliver the required surface activity for next-generation thin-film deposition processes. In this presentation we discuss quantum mechanical simulation (e.g. density functional theory, DFT) applied to ALD precursor reactivity and state-of-the-art automated screening approaches to assist experimental efforts leading toward optimized precursors for next-generation ALD processes.

Biografie
Dr. Caroline M. Krauter has a strong background in computational chemistry. She obtained her PhD in 2014 from Heidelberg University in the field of theoretical chemistry under the supervision of PD Dr. Markus Pernpointner and Prof. Dr. Andreas Dreuw. Her thesis focused on the theoretical description of photochemical processes in organic materials. From 2014 to 2016 she was a postdoctoral fellow in the group of Prof. Emily A. Carter at Princeton University where she was working on plasmon-induced heterogeneous catalysis on the surface of metal nanoparticles. In 2016 she joined Schrödinger as a senior applications scientist where she is working on applying atomic-scale chemical simulation techniques in the field of materials science.

Ion Beam Etching Technologies for Sensor Manufacturing

Böttger, Philipp
Technical Sales Manager
scia Systems GmbH

Abstract
For the structuring of MEMS substrates, a variety of etching technologies is used, each with individual assets and hence, for different applications. scia Systems provides vacuum equipment for dry etching processes, such as ion beam etching (IBE) as well as reactive and chemically assisted ion beam etching (RIBE/CAIBE) to meet these applications. Ion beam etching or milling (IBM) with the scia Mill 200 uses argon ions to physically remove material on substrates or wafers up to 200 mm diameter. The ion beam source made by scia Systems allows a precise tuning of the ion density and ion energy. Due to the ion bombardment, the argon ion beam milling allows the removal of all materials used in complex layer stacks in contrast to chemical etching. Additionally in contrast to reactive ion etching (RIE), the ion beam milling with inert gases, like Argon, suppresses any after-corrosion effects, which would lead to an increased resistivity when processing metals. Operating with a helium-backside wafer cooling, the substrate temperature will be kept low and allows processing of photoresists. By using a secondary-ion-mass spectrometer the precise measurement of sputtered atoms can be realized and an exact endpoint detection of the etching is possible. Even the measurement of sub-nm thick layers is achievable. A sophisticated substrate holder features rotation for improved homogeneity and tilting for defined etch angles or treatment of sidewalls. Typical applications of IBM are the structuring tunnel-magneto-resistance (TMR) sensors or optical films and the thinning of materials, such as lithium tantalite for infrared (IR) sensors.

Biografie
2016 - Present: Technical Sales Manager, scia Systems GmbH 2015 - 2016: R&D Department, scia Systems GmbH, Chemnitz (Field: Process development for ion beam trimming equipment) 2013 - 2015: Scientific assistant, TU Chemnitz/Fraunhofer ENAS (Field: Development of alternating-voltage-powered LEDs based on semicon-ductor nanoparticles (quantum dots)) 2007 - 2012: Studies of Physics, TU Chemnitz

Industry Outlook and Forecast for Fab spending and Capacity

Dieseldorff, Christian Gregor
Director Industry Research & Analysis
SEMI

Abstract
These are exciting times! Great sales outlook and historic highs in fab spending for equipment and construction of new fabs in 2017 and 2018. These unprecedented high numbers are not only driven by a handful of well-known, established companies, but also by several new Chinese companies entering the scene. While Korea and China are leading regions, Europe makes a big leap.

Biografie
Chris has over 30 years of industry experience. For 15 years he was engaged in various engineering and management position in R&D and pilot lines at Siemens (Munich), IBM (New York), I300I & International Sematech (Austin, Texas), and Infineon in San Jose, California. Since 2002 he worked as senior industry analyst and director of market research first for Strategic Marketing Associates and since 2007 for SEMI.

Welcome

Manocha, Ajit
President and CEO
SEMI

Abstract
Welcome speech

Biografie
Ajit Manocha is the president and CEO of SEMI. Headquartered in Milpitas, California, SEMI is the global industry association serving the electronics manufacturing supply chain. Manocha, an industry leader has over 35 years of global experience in the semiconductor industry. Manocha was formerly CEO at GLOBALFOUNDRIES, during which he also served as vice chairman and chairman of the Semiconductor Industry Association (SIA). Earlier, Manocha served as EVP of worldwide operations at Spansion. Prior to Spansion, Manocha was EVP and chief manufacturing officer at Philips/NXP Semiconductors. He began his career at AT&T Bell Laboratories as a research scientist where he was granted several patents related to microelectronics manufacturing. Today, there is a much broader scope for SEMI to help foster collaboration and fuel growth than we could have ever imagined at SEMI’s inception in 1970. This has to be accomplished without compromising the strong foundation of SEMI comprising of Equipment Suppliers and Materials makers. Given our ecosystem is rapidly expanding due to the massive explosion of applications based on the Internet and mobile devices, biomedical devices, defense, social media, artificial intelligence/machine learning, autonomous vehicles e-commerce, the Internet of Things, etc., Manocha feels it is the right time for us to evolve as the space around us evolves. Additionally, Manocha has served on the President’s committees for “Advanced Manufacturing Partnerships” and the President’s Council of Advisors on Science & Technology (PCAST) during the last 4+ years.

Kaiser, Michael
Senior Manager Business Development
SEMI Europe

Biography
After his studies of Industrial Engineering Michael Kaiser started his career in 2015 as Product and Quality Engineer at NXP Semiconductors in Hamburg, Germany. In 2009 he moved to NXP Hong Kong as Innovation Manager with focus on backend manufacturing and packaging. 3 years later Michael Kaiser took over the role as Sector Manager Microelectronics for the City of Dresden in Europe’s leading cluster for Microelectronics. In parallel he worked as Project Manager for the Silicon Europe initiative as part of the Silicon Saxony Management GmbH. In 2015 Michael Kaiser joined as program manager with focus on 5G and tactile Internet development the Vodafone chair of TU Dresden. Today he works as Senior Business Development Manager for SEMI Europe.

Empowering Innovation and Shaping the Value Chain at SEMICON Europa

Altimime, Laith
President
SEMI Europe

Abstract
Connect is the theme and vision where SEMI strives to connect the electronics manufacturing supply chain ecosystems and there strategic relevance to our industry at European and global levels. Today we are at the brink of a new wave of innovation, driven by Connected objects and Smart Applications also known as the Internet of Things, This in turn presents many opportunities for closer collaborations at global level, connecting the key players, key Eco systems and building on the strengths of different players in the value chain. Semiconductors are at the heart of the value chain driving innovations enabling key future growth drivers in Mobile, Automotive, Medical, passive and intelligent computing as well as AR and VR. In such applications driven industry Europe’s strengths in innovation, automotive, MEMS, provide the full complementary and strategic solutions fueling our future connected world. Co-located with productronica in Munich for the first time, the global exposition will expand attendee opportunities to exchange ideas and promote technological progress, featuring the most advanced and innovative electronics manufacturing platform in Europe.

Biografie
Laith Altimime joins SEMI as president of SEMI Europe, as of October 1, 2015. Laith Altimime has more than 25 years of international experience in the semiconductor industry. Most recently, he held senior director position in business development at imec. Prior to this, Laith Altimime held leadership positions at Infineon/Altis, Qimonda, KLA-Tencor, Communicant Semiconductor AG, and NEC Semiconductors. Laith Altimime holds an Honors Bachelor’s Degree in Applied Physics and Semiconductors Electronics from Heriot-Watt University in Scotland.

Ciesinski, Michael
President, FlexTech Group
SEMI/FlexTech

Biography
Michael Ciesinski is SEMI's Vice-President of Technology Communities. Previously, he was President/CEO of FlexTech Alliance, an R&D consortium chartered with building the infrastructure for flexible electronics manufacturing. Ciesinski’s prior executive positions include President/CEO of US Display Consortium and Vice-President and Director of North American Operations for SEMI. Prior to joining SEMI, Ciesinski was appointed as Director, New York State Labor-Management Committee. Ciesinski is a graduate of the State University of New York at Albany. He is a member of the Dean’s Advisory Council (Engineering) at the California Polytechnic State University at San Luis Obispo.

Small Scale Production

Gruska, Bernd
International Sales Manager
SENTECH Instruments GmbH

Abstract
SENTECH develops, manufactures, and globally sells innovative capital equipment centered on thin films in semiconductor technology, microsystems, photovoltaics, nanotechnology, and material research. SENTECH provides innovative solutions for non-contact, non-invasive optical characterization using ellipsometry and reflectometry. SENTECH plasma systems are known for deposition of low temperature high quality oxides and nitrides, as well as low damage etching, e.g. for AlGaN-recessing. SENTECH offers cluster solutions combining etch and deposition processes for sensor, MEMS and photonics applications. Etching (ICP-RIE, RIE and ashing) and deposition processes (ICPECVD, PECVD, PEALD and ALD) can be executed one after the other without breaking the vacuum. Clusters with cassette stations are used to increase throughput, automate and combine processes. Solutions are available for semiconductor devices, sensors and MEMS. Based on SENTECH proprietary PTSA-ICP plasma source, the clusters are especially suited for low damage and low temperature processing.

Biografie
Bernd Gruska, International Sales Manager

Partnering for Improved Reliability

Prod'homme, Didier
Area Sales Manager
SERMA TECHONOLOGIES

Abstract
Abstract: Among SERMA GROUP electronic services, SEMICON solutions are provided : audits, training, construction & failure analyses, reliability & qualification tests, wafer probing, electrical testing, reverse engineering, microelectronics assembly & production of ceramic substrates, back-end services (sawing, assemblies, packaging) from wafer to qualified components. SERMA TECHNOLOGIES: SERMA TECHNOLOGIES is, at the same time, the original company, the legal holding company and the headquarters of SERMA GROUP and run the technological services. Provider of technological engineering and solutions in the Electronic Technologies Management: analysis, control, expertise and consulting services, SERMA Technologies assists companies in the electronics sector, the manufacturers/users of electronic components, boards and systems, throughout the industrial life cycle, on various issues such as: development, technologies choices, quality, reliability, maintainability. Applications: Multisectoral services: aeronautics, defence & space, automotive, railway, industrial, energy, medical.

Biografie
Graduated in 1988 from the French “Ecole Nationale Supérieure des Arts & Métiers” (ENSAM), after 2 years of teaching Mathematics and Physics in Porto Novo/Benin, Didier joined IBM Networking Hardware Division (NHD) in Nice/France as a software developer then went to a 6 years expat experience supporting IBM NHD Customers in the US then in PR China. Back from PR China in 2000, Didier joined IBM Microelectronics to manage the whole life cycle of IC development projects/programs. Before joining Serma technologies in 2016 as a Business Developer, Didier held a Partnership Manager position at NXP Software, developing relationships with major HW phone platform makers.

3DIC Assembly at Room Temperature Employing Binary Alloying

Schulte, Eric
CTO
SETNA LLC

Abstract
We present an alternative to Tin-based solder caps currently used for 3D-IC chip stacking. We propose a binary metallurgical system which can be bonded at room temperature to create robust mechanical and electrical interconnects. An Atmospheric Plasma process is used to de-oxidize and passivate the bond surfaces, followed by room temperature compression bonding. Subsequent chip layers can be stacked in the same manner at room temperature without requiring thermal excursions. This eliminates the bond process time normally consumed with melting and solidification, thus dramatically increasing bond throughput. Room temperature bonding also eliminates concerns about oxidation of exposed bonding surfaces over very long chip-to-wafer assembly cycles. Following completion and test of the stacked assembly, low-temperature solid-state annealing creates a ductile binary alloy interconnect which is stable to above 600°C. An additional benefit of the Atmospheric Plasma pre-bond treatment is that all chip and bump surfaces are highly activated for very rapid post-bond capillary underfill. Current Tin-based solders have been shown to produce a range of unstable intermetallic compounds with undesirable mechanical and electrical characteristics. The proposed Silver-Indium binary pair favors simple, post-bond low-temperature inter-diffusion of these two metals to form Ag2In, while thermodynamics exclude other nearby metals (i.e. Cu, Ni, etc.). Typical post-bond interdiffusion temperature of the binary metal pair is in the range of 80-120°C, and does not require compression during interdiffusion. Experimental results will be presented.

Biografie
As a Senior Process Engineer in the aerospace industry, and then as a consultant, Eric has provided engineering support for all aspects of infrared and visible focal plane prototyping and production including: hybrid assembly, hybrid packaging, thin film deposition, thin film etching and lift-off, film stack stress management, photolithography, passivation, contact metallization, indium bump patterning and deposition, detector design, yield improvement, process integration/simplification, and technical troubleshooting. Eric holds 17 US patents (with several more in progress) and has received numerous industry and company awards for creative solutions to difficult engineering challenges. He has authored or co-authored 14 technical journal papers and 2 magazine articles in the focal plane field. Eric holds Engineering and Science degrees from Michigan Technological University and The University of Texas at Dallas. Following military service as a Naval Officer in Vietnam, he worked for 10 years as a Process Development Engineer in the Texas Instruments Central Research Labs, and then 19 years as a Senior Process Engineer at Santa Barbara Research Center (Hughes/GM/Raytheon). He retired from SBRC in 2004. In the following 8 years, Eric was a consultant in the focal plane field. Eric is currently Chief Technical Officer for Ontos Equipment Systems which produces surface preparation equipment and processes for the semiconductor assembly industry, including emerging 3D IC assembly technology. Additionally, Eric is CTO of SETNA

Aspects on failure modes and reliability assessment in automotive power microelectronics

Dallmann, Gerald
Division Manager Microelectronics
SGS INSTITUT FRESENIUS, Dresden

Abstract
System and chip qualification and production release procedures are based today on the AEC Q100 standard. These documents describe a set of tests which are specific to certain failure mechanisms, induced f.e. by higher temperature. However, these tests are today very limited for the estimation of failure rates or even to demonstrate a zero failure rate, as required by the automotive industry. First, the tests are performed on a very limited number of samples (e.g. 77) not allowing to show a low ppm failure level. Second, the tests assume a certain failure mode acceleration by f.e. high application temperature. These models are very often not known and failures show a fully other behavior and acceleration in the field (due to combination of technology excursions, defects, combined voltage, current, temperature, humidity and mechanical stress). Third, the component validation after test is performed only by electrical testing. The talk will show examples of failures not covered by qualification and production tests as well as some approaches to improve reliability assessment process. The physical and chemical analysis methods and tools (like XPS, AES, TOF-SIMS) are highly developed to analyze materials and failure modes in semiconductor and system level technologies. The application of these analysis techniques after climate, voltage or mechanical stress application can create a much deeper view inside chip and system weaknesses and failure modes. The talk shows some typical failure mechanisms found in a lab as service provider for many different companies. Some weak spots are discussed with recommendations for improvements.

Biografie
Division Manager at SGS Institut Fresenius GmbH in Dresden, Germany, since 2009. Main focus on material and failure analysis of semiconductor devices of client companies. 1995 Director for technology development at Siemens, Infineon, Qimonda, responsible for process integration, yield enhancement and material and technology development of DRAMs. 1990 Product manager microelectronics at Institut Fresenius in Dresden. Main Focus on failure analysis of semiconductor devices. Department manager electron microscopy at Zentrum Mikroelektronik Dresden (ZMD). 1986 Diploma in Microelectronics Technology and Semiconductor Devices.

Cleaning applications for photomask and post wafer dicing

Hammerl, Bernhard
Head of Process Engineering
Siconnex customized solutions GmbH

Abstract
The focus of the presentation is cleaning of photomasks and diced wafers. Every fab needs to clean their photomasks after certain usage. The cleaning process can be done in-house or by external vendor. Due to the dicing process the wafer surface become contaminated with particles. In order to improve yield and quality of the chip, it’s necessary to clean them. How can be yield and quality of the chips improved? With Siconnex BATCHSPRAY® Acid 300mm technology it’s possible to reach both, higher quality of the chip and a better yield performance. The presentation shows how the clean processes works on a small footprint and with minimum media consumption. Additionally is shown how Siconnex works, how new process solutions are developed, how issues are solved and what you can expect from our knowledge and long-term experience.

Biografie
Bernhard is Head of Process Engineering at Siconnex in Austria. He is responsible for process research and development. After four years working as a Process Engineer he took over the Process Engineering Department three years ago. His focus is on etching, cleaning and stripping processes in batchspray equipment.

Innovative Package Solutions for Automotive Application

Tang, Tom
Engineer
Siliconware precision Industries Co., Ltd.

Abstract
Recently,the electronics industry is moving maturely on the mobile/tablet market.With the aggressive demand on self-drivng car,the next fast growing market will be Automotive in the near future.Advance technology/packages are needed to provide ideal solutions for reliablitly and high electrical performance.Multi-function integration is also one of the critical requirements.To approach these requirements,innovative packages including System in Package (SiP),2.5D IC and advance Flip Chip are the potential solutions. SiP is a combination of one or more semiconductor devices plus optional passive components that form a certain functional block within a package.In this paper, an alternative 3D SiP technology will use surface mount technology (SMT) and 3D structure of stacking die on passives to shrink the package size and enhance the package reliability.The package size can be shrunk around 25% from 11.5 x 11.5mm2 to 10x10mm2 package size.SiP also could offer different function blocks for high electrical and integration performance into Automotive Telematics including GPS /connectivity system.Considering the cost,reliability and time-to-market,such as wireless connectivity module in car,will become the major driving force for SiP platforms in near marketing. 2.5D IC and advance Flip Chip are the solutions to meet the increasing preformance requirements for the infotainment and ADAS applications in car.2.5D IC is a platform for mono- or multi-functional integration. CPU,GPU,DRAM and main-broad might be all shrunken into one chip package.2.5D IC is a solution of high bandwidth, small form factor and multi-function integration. In this paper, a 2.5D IC device was demostrated for the potential autonomous car application.

Biografie
Another FCBGA device with Heat-sink also was developed,it not only provides the high computing performance but also passed the Automotive related qualification and is under production. Finally,this paper will sum up the progress of advanced packages-SiP module,2.5D IC and advance Flip Chip for the Automotive application. Name, Tom Tang Job Title,Senior Engineer Dept., Engineering Center Company, SPIL

Epitaxial Growth of Low Defect SiGe Buffer Layers for Integration of New Materials on 300 mm Silicon Wafers

Storck, Peter
Senior Manager Innovation Projects
Siltronic AG

Abstract
Strain-relaxed SiGe buffer layers are attracting renewed interest as an important platform for integration of high-mobility channel materials in advanced CMOS device nodes. A number of options are explored to either extend the life of FinFETs or use GAA devices. Different approaches are under investigation involving monolithic integration of SiGe, Ge and III-V materials. A common challenge is the need to manage layer strain and crystal defects especially misfit and threading dislocations. The relaxed SiGe lattice can be used to combine control of strain in the active areas with low defect density and is therefore attractive as starting template for strained-layer growth. The various aspects of epitaxial growth of strain-relaxed SiGe buffer layers with different Ge Content on 300mm wafers will be discussed.

Biografie
Peter Storck received his PhD in Physical Chemistry from the TU Darmstadt, Germany, and has more than 20 years of experience in semiconductor epitaxy. Starting in 1996, he worked three years for Wacker Siltronic in Portland, Oregon, focusing on Epi process technology for Power Applications. From 1999 to 2003, he was responsible for the start-up of 300mm Epi technology at Siltronic, Germany. Since 2004 he is the manager of Siltronic’s Innovation Projects group developing advanced materials. His research topics include Si, SiGe, rare-earth oxide and III-N epitaxy. He is the author or co-author of more than 40 publications and 20 patents.

Radu, Ionut
Senior Manager
SOITEC

Biography
Ionut Radu is Senior Manager of Soitec’s Corporate R&D organization and is responsible for research and development efforts in the field of advanced substrate technologies. Prior to being appointed to his current position, he held technical and project management positions with responsibility to develop new substrate technologies for advanced electronic devices. Ionut is currently involved with industrial and academic research collaborations to support strategic developments of advanced substrate materials for semiconductor industry. Dr. Radu obtained his B.S. in physics from University of Bucharest in 1999 and Ph.D (Dr. rer. nat.) in physics from Martin-Luther University Halle-Wittenberg in 2003. He has co-authored more than 60 papers in peer-reviewed journals, conference proceedings and reference handbooks and holds more than 30 patents in the field of semiconductor technologies. Dr. Radu is senior member of IEEE society and involved in Technical Program Committees of international conferences (ESSDERC, VLSI-TSA) and industrial forums (Semicon Europa).

Engineered Substrates : enabling performance, power and cost to meet applications requirements

Maleville, Christophe
EVP, Digital Electronics Business Unit General Manager
SOITEC

Abstract
Moore’s law, More than Moore, more Moore..; industry is showing great imagination in describing trends in semiconductors. Overall, it appears that applications requirements such as mobility and connectivity, Automotive, image sensors, … are all converging towards more analog blocks and functions, complemented by digital on demand. Power budget, driven by battery time or thermal constraints, is becoming major requirement as long, of course, as cost remains compatible with market segment. FDSOI adoption is a good example of how this combination of good analog behavior and premium performance is able to fit with major markets roadmaps. In this talk, engineered substrate properties and design will be discussed as a strong basement for device enablement, variability and overall positioning to meet end user requirements. Such advanced substrates are also becoming integration platforms to combine more functions covering digital, communication, Photonics, imager domains, in order to provide broader applications within same handset.

Biografie
Christophe Maleville has been appointed senior vice president of Soitec’s Digital Electronics BU in 2010. He joined Soitec in 1993 and was a driving force behind the company’s joint research activities with CEA-Leti. For several years, he led new SOI process development, oversaw SOI technology transfer from R&D to production, and managed customer certifications. He also served as vice president, SOI Products Platform at Soitec, working closely with key customers worldwide. Maleville has authored or co-authored more than 30 papers and also holds some 30 patents. He has a PhD in microelectronics from Grenoble Institute of Technology and obtained an executive MBA from INSEAD.

The Smart Things Opportunity, a Smart Materials Answer

MAZURE, CARLOS
EVP & CTO
Soitec

Abstract
Smart wearables, smart homes, smart cars, and so forth constitute the next big microelectronics industry inflexion point. It will enable a large number of applications and products that will, in turn, challenge the existing business models, the Internet infrastructure and the existing IC ecosystem. Smart applications will thrive on the co-optimization of very different technologies to integrate multiple functionalities (sensing, analyzing, computing, communicating) while maximizing performance, optimizing energy efficiency to extend battery life to its limits or adapt to the constrains of energy harvesting and simultaneously improving form factor and reducing cost. Behind this industrial renewal we will find "More than Moore" technologies, clever material processes and engineered substrates. In the RF world, engineered substrates have become the standard for RF front-end module (FEM) devices, which we find in every smart phone. The industrialization of SOI with nm-thin Si and buried oxide (BOX) layers has enabled low-cost, low power ICs. Ultra-thin Si and BOX SOI make possible fully depleted (FD) CMOS technologies with ultra low VDD operation without significant performance loss. Innovative SOI architectures are competitive answers to Si Photonics, automotive SOI, imagers and sensors. Tailored SOI substrates accompany the trend to full mobility. This review will discuss the contributions and benefits of engineered substrates solutions and thin layer transfer technologies, focusing on applications in the smart space.

Biografie
Dr. Carlos Mazure, CTO & EVP, Head of Corporate R&D at Soitec since 2001. Chairman and Executive Director of SOI Industry Consortium since July 2014. IEEE Fellow, 30+ years of experience in Semiconductor Industry. Prior to Soitec, Carlos headed the ferroelectric FeRAM program at Infineon (Munich, Germany), and initiated Infineon/Toshiba FeRAM Alliance. Earlier he worked for IBM/Infineon DRAM Alliance (Fishkill, NY); and before at APRDL, Motorola (Austin, Texas). Carlos holds two doctorates (University Grenoble, France; Technical University Munich, Germany). Authored/co-authored 120+ technical papers, holds 100+ US patents. Member of several international advisory committees and company boards.

Solmates Pulsed Laser Deposition systems enable the integration of critical novel thin film materials for the MEMS & 5G market

Dekkers, Matthijn
CTO
Solmates B.V.

Abstract
Solmates is increasing its installed base of PLD systems worldwide at well-established research institutes and noted CMOS, MEMS and Sensors manufactures. After the introduction of Atomic Layer Deposition in thin film manufacturing it is now Solmates PLD to challenge the limits of thin film deposition of novel materials in a production environment. It is well known that Pulsed Laser Deposition (PLD) is a very flexible and versatile technique allowing fast optimization of new and complex material thin films. The unique features of PLD allow for the integration of “Beyond Moore” materials in CMOS, MEMS and sensors. Up to now, the developed materials and processes in PLD only just make it into demonstrator devices. In order to make it into commercial applications, next generation PLD equipment is needed to bridge the gap between demonstrator and the prototype to production. Since 2006 Solmates developed PLD systems for large substrate dimensions and stable processing. The current Solmates PLD platform is the next step beyond fundamental PLD research. The reliable hardware is flexible for fast process optimization and allows uniform thin film deposition up to 200 mm wafers or 200 mm2 glass panels with high reproducibility. The automated software ensures easy operation and stable performance. These characteristics enable the integration of PLD thin films in applications for (pilot) production and commercialization. In this contribution the Solmates core technology will be presented. As a first example wafer-level integration of epitaxial PZT and PMN-PT thin films on silicon is demonstrated. The results of this work are the first milestone in the development of a piezoelectric memory. In another example, the PZT is integrated in silicon photonics for strain-optical modulators. These devices are a key component for phased-array antennas that will enable 5G data communication. Production of these devices that rely on PLD-deposited piezo materials is scheduled for 2019.

Biografie
Solmates is a fast growing and ambitious OEM company, with its mission to position PLD as a mainstream deposition technology equal to ALD and sputtering. Solmates is a spin-off company of the MESA+ Institute for Nanotechnology, located at Science Park Twente, in Enschede, the Netherlands. It was founded from a specialized PLD research group (IMS) chaired by prof. Dave Blank and prof. Guus Rijnders. Its employees are highly recognized specialists in PLD of which many have a semiconductor industry background. Since Solmates was established in 2007 it has generated multiple patents and has brought pulsed laser deposition from lab scale to production level. Currently Solmates has over half a dozen development and pilot production systems running at various customers worldwide. Arjen Janssens is responsible for the overall leadership and strategy of the company. He started his career as strategic consultant at Arthur D. Little, after one year he became shareholder and consultant of Quintel Management Consultancy (spin-out of Arthur D. Little). In 2004 he enrolled into his PhD. at the University of Twente focussing on Piezo materials and pulsed laser deposition. During his PhD. he assisted MESA+ in business development, completed the Executive MBA at TSM business school of technology, and co-founded Solmates.

Latest advances in Si DRIE for MEMS Manufacturing – focusing on feature tilt and wafer throughput

Carpenter, Jo
Etch Product Management Engineer
SPTS Technologies Ltd

Abstract
For many years equipment makers have been continuously improving the capability of deep reactive ion etching (DRIE),also known as the Bosch Process, used to etch high aspect ratio features required for silicon MEMS manufacturing. With the demand for smaller, faster, cheaper, and stronger MEMS, there is a constant drive to further improve the silicon etch rate while maintaining a smooth sidewall profile and reducing feature “tilt” characteristics across a wafer. While all MEMS manufacturers want to optimize silicon etch rate to increase throughput, this is particularly true for device makers who want to etch large, deep cavities. While large cavities may not experience the etch-rate-limiting issues associated with transporting reactive species and reaction products in and out of narrow, high aspect ratio features often found in MEMS structures, generally speaking there is still a trade-off between etch rate and cavity sidewall quality. This presentation will describe how we have developed techniques to significantly increase etch rate in a number of applications, while maintaining sidewall roughness and profiles within the required specifications. The causes of varying feature tilt across a wafer are very complex, involving hardware and process variables which affect the uniformity of the plasma above the wafer. Control of tilt across the whole wafer is essential to increase yields in volume manufacturing. This presentation will help the audience understand the difference between constant tilt, fine tilt and edge tilt, and the effect of source design and process variables on the plasma, or more precisely the plasma sheath, which determines the ion density and directionality of the ion bombardment during each etch step. This presentation will show the latest results from the “next generation” of silicon DRIE equipment and describe possible upgrade routes where applicable to existing users.

Biografie
Joanne Carpenter is Etch Product Management Engineer at SPTS, and has over 15 years’ experience in the semiconductor and electronics manufacturing industries. Prior to her current role, Joanne has worked for European Semiconductor Manufacturers Ltd (ESM) and ZBD displays Ltd. Joanne joined Surface Technology Systems (STS) in 2007 as an Etch Process Engineer. When STS and Aviza merged in 2009 to form SPTS, she joined the etch samples division as a Senior Etch Engineer, specialising in development of innovative etch process solutions and supporting SPTS customers on critical advanced packaging technologies in China, Taiwan and North America. In 2016 Joanne joined SPTS's Etch Product Management team.

Misalignment detection through Support Vector Machine algorithm implementation

Vinciguerra, Daniele
APC Manager
ST Microelectronics

Abstract
In the last decade, most semiconductor Fabs have implemented FDC in order to reach the benefits of better process monitor and yield improvement. In this work, we show how we applied Machine Learning algorithms in order to make the most of data already collected by FDC architecture, to extract insights and make predictive control. We applied Support Vector Machine algorithm in order to predict the litho misalignment of wafers based on the raw data that the lithography equipments return as values. The methodology was extended to all masks but the real problem that we wanted to solve was specifically related to mask levels after EPI growth. In fact the EPI growth can change the AGA, signs that the equipment uses to align the wafer to previous mask, so that they seems to be shifted. Therefore, the equipment aligns wrongly but it “thinks” to have done a good job. This problem is very hard to detect by usual FDC analysis. We developed and optimized an SVM algorithm to detect anomalies in collected data. Many experiments were performed on off-line data and on real production to verify the stability of the system and to understand the levels of precision and recall. We started testing a supervised approach. We collected more than 40K wafers and classified them GOOD or BAD based on electrical data results. Then we trained the algorithm on a six dimension space. Successively we optimized the SVM parameters in order to obtain the best results on validation set. Results indicated a 100% accuracy. Then we shifted the approach to an unsupervised algorithm, the one class SVM. In this case, we trained the algorithm with only good wafers and removed the bad wafers. The algorithm was transformed into an anomaly detection algorithm. Results We tested again the new algorithm with the previous offline data and put it in production with real data. Further parameters optimizations let us reach a True Fail/Predicted Pass ratio of zero and a True Pass/ Predicted Fail ratio of 0.05%.

Biografie
Daniele Vinciguerra received the Master degree in Nuclear Physics from University of Catania, Italy, in 1996. He is working for ST Microelectronics as APC/SPC Manager in Catania site. His current research interest is big data and machine learning for semiconductor manufacturing

How to manage Semiconductor R&D Dilemma: More and more Stringent Quality requirements versus fastest possible Product Access to the Right Differentiated Technology?

COLIN-MADAN, CYRIL
Technology & Design Platform Deputy
ST Microelectronics

Abstract
Technology R&D, Product R&D and Product manufacturing are more and more done in concurrent mode to guaranty fastest product access to the right differentiated technology. On the other hand, Quality is becoming more and more stringent with reduced level of defects, excursions required by most of product market segments. This is making Semiconductor R&D much more challenging and re-inforce the needs of deploying complete different methods, way of thinking & doing Quality in a Semiconductor R&D environment. We will explain how this can be done leveraging on Design, Process, Product, Manufacturing Technical strengths within ST Microelectronics coupled with new way of doing / thinking coming from LEAN R&D practices.

Biografie
Cyril Colin-Madan has been Technology & Design Platforms Deputy Director in ST Microelectronics Crolles France since February 2017. He started his career in semiconductors as a SRAM engineer in ST Microelectronics Agrate Italy in 1994. He joined ST Microelectronics Crolles France R&D and Manufacturing Center in 1996 as a Library project leader then as group leader. Starting 2000, he became Technology Platforms Manager in charge of Design & Process R&D programs. From 2006 to 2014, he held various management positions covering PDK, Design Platform, Design flows and Design Programs. Between 2015 and 2017, he became the Design Platform Director in charge of all Design Platforms internally developed within ST. Mr. Colin-Madan is graduated from French engineering school SUPELEC with a specialization in semiconductors.

eWLB (FO-WLP) as an Innovative Integration Solution of SiP

Yoon, Seung Wook
Director
STATS ChipPAC Pte Ltd

Abstract
New and emerging applications in the consumer and mobile space, the growing impact of the Internet of Things (IoT) and wearable electronics (WE), and the complexities in sustaining Moore's Law have been driving many new trends and innovations in advanced packaging technology. Advanced embedded Wafer Level Ball Grid Array (eWLB) technology provides a versatile platform for the semiconductor industry’s technology evolution from single or multi-die 2D package designs to 2.5D interposers and 3D System-in-Package (SiP) configurations. This presentation reports developments that advanced eWLB/FO-WLP technology, including integration of multi-die, discretes, embedded passives and crystals. This will also discuss the adoptions and new features available for mobile, IoT and WE. This advanced technology is well designed for MEMS/sensors SiP modules as well as thin, highly integrated packaging. Innovative 2.5D/3D packaging features will be also introduced with the merits and characterization data for specific applications. To enable higher interconnection density and signal routing, packages with multi layer redistribution (RDL) and fine line/width spacing are fabricated and implemented on the eWLB platform. This presentation will describe the new manufacturing module approach and the results of process characterization for products produced in the module. Also there will be discussion of large panel level fan-out WLP including current development status and technical challenges ahead.

Biografie
Name: Seung Wook Yoon, Ph.D, MBA Title/ Position: Director Company: STATS ChipPAC Pte Ltd. Dr. YOON is currently working as director of Advanced Products & Technology Marketing , STATS ChipPAC Pte. Ltd in Singapore. His major interests are for wafer level products including eWLB/Fanout WLP, WLCSP, IPD, bumping, TSV (Through Silicon Via) technology, flipchip and integrated 3D IC packaging. Prior to joining STATS CHIPPAC LTD, He was deputy lab director of IME (Institute of Microelectronics), A*STAR (Agency of Singapore Technology and Research), Singapore. ”YOON” received Ph.D degree in Materials Science and Engineering from KAIST, Korea. He also holds MBA degree from Nanyang Business School, Singapore. He has over 250 journal papers, conference papers and trade journal papers, and over 20 US patents on microelectronic materials and electronic packaging.

Packaging challenges for robust miniaturization

Herard, Laurent
Group VP - Head of packaging R&D
STMicroelectronics

Abstract
The computing power embarked in latest generation cars keeps increasing in terms of content and complexity. This is typically the situation for microcontrollers and ADAS chips, for which interconnection requirements are on par with consumers advanced computing products in terms of miniaturization, signal integrity, power dissipation and cost. Recent improvements in packaging materials and equipment lead to higher package level reliability of the recent interconnection technologies, becoming compatible with quality requirement requirements for automotive include higher temperature storage conditions. The main challenge remains on more severe board level reliability with tough thermal cycling and vibration conditions. This paper gives an overview of the challenges driven by automotive mission profile for adoption of some advanced packaging innovation such WLCSP, flip chip, QFN. The focus is on packaging design, material.

Biografie
Laurent Herard is Group VP – Head of the Back End Manufacturing & Technology R&D at STMicroelectronics. He is located in Singapore. He received an Engineering Degree in physics of semiconductor from the INP Grenoble. In 1991 he joined the advanced packaging department of Bull France as a process engineer for development of high performance Multi Chip Modules. In 1994 he joined STMicroelectronics packaging department. He pioneered the development and industrialization of BGA design and manufacturing at ST. For the past 12 years, he has worked as Technical and Engineering Director at ST Back End manufacturing plants in Morocco, Singapore and Malaysia. During this experience, he led design, process optimization and automation activity for ST packaging portfolio.

Physics of Advanced Devices for IoT Applications

Skotnicki, Thomas
Fellow and Technical Vice President
STMicroelectronics

Abstract
Electronics is more and more pervasive in everyday life: smartphones, smart cars, smart cities, smart health, smart agriculture, etc. that all rely on Internet of Things (IoT) technologies. A key requirements these applications imply at the device level are: low power, low voltage and low leak. UTBB (ultra-thin body and BOX) FDSOI (Fully Depleted Silicon On Insulator) is a planar semiconductor technology that is particularly well suited for IoT applications. We will show its advantages with respect to low power, low leak and low voltage operation. We will demonstrate this on the example of the 28nm UTBB SOI technology that STMicroelectronics is offering for LP mobile applications and in particular for IoT systems.

Biografie
Thomas SKOTNICKI is the STMicroelectronics Company Fellow and Technical Vice-President in charge of Disruptive Technologies. In 2007, he received the title of Professor from the President of Poland, and recently has been appointed the Director of CEZAMAT (Research Consortium) in Warsaw, Poland. The focus of his program at STMicroelectronics is on Low Power / Low Variability for 28nm and beyond CMOS, on innovative device structures, new memory concepts and cells, and on integration of new materials for CMOS. He has inferred the advantages of Ultra-Thin Body and BOX FDSOI from his Voltage Doping Transformation in 1988, and has consequently driven this concept towards successful industrialization that was decided at STMicroelectronics in 2011. From 2010 he has extended the scope of his program to include Energy Harvesting for autonomous Low Power systems and devices. He holds more than 80 patents on new devices, circuits and technologies. He has presented over 50 Invited Papers and Short Course Lectures, (co-) authored about 350 scientific papers (review based), and several book chapters in the field of CMOS and Energy Harvesting. From 2001 to 2007, he served as Editor for IEEE Transactions On Electron Devices. He has been teaching at EPFL (Lausanne, Switzerland) and SUPELEC (Rennes, France), and has supervised and led to successful defence 26 PhD theses. He has been serving in numerous Conference Program and Executive Committees (IEDM, VLSI, ESSDERC, ECS, SNW, IWJT), Academia Advisory Boards, Governmental Expert Commissions, R&D Program Steering Committees, IEEE Award Committees (JJ Ebers and Frederik Philips), and ITRS (who had been using his/his team software MASTAR for 12 consecutive editions). He is an IEEE Fellow and SEE Senior Member.

The secondary equipment market - a view from ST

Bignell, Gareth
Director, Front End Equipment Purchasing
STMicroelectronics

Abstract
The secondary equipment market has never been more buoyant. This year sees yet again growth in equipment needs for all wafer sizes. More capacity coming on line and more innovation to satisfy the growing markets in IOT, smart phones and automotive. The vast majority of devices made for these applications are not made on 300mm wafers. 200mm manufacturing continues to be the dominant force for trailing edge Silicon, with 150mm and below for other substrates includes SiC. STMicroelectronics, with our efficient lean FE manufacturing sites in Europe and Singapore, combined with our wealth of intellectual property and R&D talent is uniquely positioned to successfully serve these very demanding customers. One of the challenges we face is how to effectively source and maintain high quality, often previously used, 200mm equipment. In this presentation we will share ST’s experiences in sourcing equipment and services, how we see the future shaping up and how we think the different stake holders could help us improve further.

Biografie
Biography. Gareth Bignell Front End Equipment Purchasing Director, STMicroelectronics Gareth Bignell has been responsible for the sourcing of ST’s fab equipment for all ST sites worldwide as well as maintenance cost reduction programs for the last 9 years. Prior to this, he was the equipment selection program manager for the Crolles2 Alliance where he closely worked with Freescale and NXP on sourcing all of the 300mm tools for this successful multi-company alliance. He started his career as an equipment engineer in Inmos UK before holding various engineering and management roles at ST’s Agrate and Crolles sites. Gareth has worked in the semiconductor industry for more than 30 years since graduating from the University of Wales, Newport.

Director Automotive Connected Mobility, Strategy Analytics

Lanctot, Roger
Director Automotive Connected Mobility, Strategy Analytics
Strategy Analytics

Abstract
The hardware and software requirements for connected and autonomous cars are transforming the automotive industry upending all previous assumptions as to how a car ought to be built. The changes are rewiring the supply chain and opening up the market to new market entrants while challenging the old guard. This talk will assess the opportunities and risks and some strategic paths to success.

Biografie
Roger Lanctot has 25+ years of experience as a journalist, analyst, and consultant advising electronics companies, car companies, wireless carriers, Tier 1s and developers on product and market development and strategy. Currently Director, Automotive Connected Mobility, in the Global Automotive Practice at Strategy Analytics. He is a graduate of Dartmouth College and a frequent blogger and keynote speaker.

AIM Photonics – Manufacturing Challenges for Photonic Integrated Circuits

Liehr, Michael
CEO AIM Photonics
SUNY Polytechnic Institute/AIM Photonics

Abstract
Abstract: The American Institute for Manufacturing Photonics (AIM Photonics) is a manufacturing consortium headquartered in NY, with funding from the US Department of Defense, New York State, California and Massachusetts, and industrial partners to advance the state of the art in the design, manufacture, testing, assembly, and packaging of integrated photonic devices. The institute has focused its 1st year activities on providing a turn-key capability to industrial customers with a primary focus on SMEs, university researchers and government agencies. To that effect, a multi-project wafer (MPW) offering was established including a service broker, a Process Design Kit (PDK) and a suite of component library elements. The design component strategically support the migration from a full custom design environment to a hierarchical methodology expected to provide significant productivity enhancements. Using NY State funding, AIM Photonics is establishing a Test, Assembly and Packaging (TAP) facility that complements its leading-edge silicon photonics wafer capability. The TAP facility is expected to open in 3Q2017 and be fully operational early 2018. We have established AIM Academy, an organization under the institute that fosters education. A key tenet for AIM Photonics is to develop and ensure a well-trained workforce through the AIM Photonics Academy. This effort is designed to provide a unified learning, training, knowledge, technology and workforce deployment platform. Lastly, we have merged with the prior integrated photonics road mapping activity and have published two yearly updates to the roadmap which are publicly available.

Biografie
Michael Liehr is the Chief Executive Officer of the American Institute for Manufacturing (AIM) Photonics. Michael focuses on the creation of new AIM business opportunities, and is responsible for the effective and efficient operation of AIM’s programs including SUNY Poly’s strategic 300mm integrated photonic semiconductor and 3D packaging. He is also SUNY Polytechnic Institute’s Vice President for Research and Executive Vice President for Technology and Innovation. Prior to this assignment, he led the Global 450mm Consortium through the start-up phase as the General Manager and was an IBM Distinguished Engineer.

Si vs SiC Power modules in HEV intergration: a cost analysis

Barbarini, Elena
Senior Cost Engineer
System Plus Consulting

Abstract
When converting an existing petrol vehicle to a hybrid version, the available space in the engine compartment is often so limited that it is difficult to accommodate a PCU. Thus it is necessary that the PCU has a higher power density and a smaller size. To achieve both of these targets, manufacturers have developed different solution for the powers modules of the PCU. Some innovations are on the die point of view such as redesign IGBT structure to decrease the die size (Infineon) and others are on packaging, like eliminates the wire bonding and uses a double-side cooling structure. These innovations lead to a redesign of the breakdown cost of the modules. The cost of Silicon devices is continuously decreasing until it will reach its lower limit while the new innovations in terms of packaging materials and method shows an increase of the cost of backend. At the same time, the introduction of WBG materials, such as SiC, offers the possibility to decrease die size while increasing the power density and this is effective for PCU downsizing. However, the new wide-band gap devices still present some technical and economical limitations. The higher breakdown field strength of SiC places greater demands on the package insulation system and the market size of wide band-gap power device is still quite small because of the device cost. The objective of the presentation is to define which are the cost drivers of the new technologies in Hybrid Electric Vehicles and understand if on the long term SiC devices will substitute Si devices for technical and economic reasons. Different devices have been opened and analyzed to understand the technology innovations applied in HEV PCU’s inverters and IGBT power modules and a breakdown cost analysis of the manufacturing process has been developed. Finally, a study of the economic impact of replacement of IGBT with SiC devices in the most innovative automotive PCU’s inverter has been performed.

Biografie
After a bachelor’s degree in Electronic Engineer from Politecnico di Torino, Elena obtained a master's degree in Nanotechnologies for the ICT and a PhD in Electronic Devices at Vishay Semiconductors. After different experience in research and manufacturing of electronics components, she is actually Activity Leader for Power Electronics and Semiconductor Compounds at System Plus Consulting where she is managing and developing costing models and analyses of power devices.

Managing high-tech Fabs at maximum capacity - The renaissance of the Operating Curve?

Luhn, Gerhard
Innovation Manager
SYSTEMA GmbH

Abstract
The demand for mobile communication, e-mobility and industrial automation grows relentlessly. Analog products, MEMS and Power Applications are critical enablers of these business areas and therefore the need for these electronic components is growing. Existing 200 mm circuit and MEMS manufacturers are embracing a 200 mm manufacturing “renaissance”. Having reached the nominal capacity limit, these Fabs are confronted with the business opportunity to further increase production volumes. Fabs that originally focused on single-products and mass production (high-volume low-mix) now have to produce many small batches in a highly flexible manner (high-volume high-mix). Operators and process engineers are faced with a bumpy increase of production complexity. Besides this, the sheer quantity of manufacturing data, which is stored in historian database dumps, has grown by orders of magnitude. Still, the beneficial usability of this data has been elusive. While the landscape of specialized applications and tools is growing, those show significant limitations in utility and performance – to such an extent that most data stored in historian databases are not analyzed at all rather than being analyzed poorly. The presentation shows how a real-time holistic, holographic information concept based on Continuous Homomorphic Processing brings value for better management of Semiconductor Wafer Fabs: in “democratization” of (big) data into information. The well-known, but limitedly used Operating Curve is looking for its own renaissance, when it is integrated in a holistic information concept, thereby directly benefiting and integrating into three main dimensions: • Key performance indicators and Operating Curve measures in real-time • Advanced, multi-year Fab Analytics and innovative multivariate capabilities • Continuous Fab optimization and best integrational effectiveness for Fab simulation, Production Forecasting, Dispatching & Scheduling optimization, cost calculations and more

Biografie
Currently, Gerhard is Innovation Manager at SYSTEMA. Together with major renowned industry partners and universities, he is focused on a mathematically-physically grounded methodology to continuously transform data into information. Goal of this method is overcoming the strongly opening gap between growing magnitudes of manufacturing data and the increasing demands for continuous Fab productivity improvement plus global and local knowledge discovery – in real-time. Gerhard holds a Ph.D in engineering science from University Erlangen-Nürnberg. Following social service as blood analyst in University Hospital of Heidelberg, he worked at Siemens Semiconductor in Munich and Corbeil Esonnes (France). In the following years, he built the automation team of Infineon Dresden, worked for Qimonda and was a research fellow at Technical University Dresden. Gerhard holds several patent applications, authors scientific papers, and engages in the ‘democratization’ of data into information.

Proactive scrap risk reduction in a grown high complexity 200mm Wafer Fab

Pelzmann, Arthur
Project Mgr
Texas Instruments Deutschland GmbH

Abstract
One common challenge for Analog Wafer Fabs is the large variety of technologies, products and process steps. Due to the usually long lifetime of analog products the product-mix and therefore the complexity of manufacturing processes increase over the years. The high complexity leads to a high risk of misprocessing due to overlooked or weak equipment and process controls. In most cases this especially affects newer products in the Fab portfolio. Traditional FMEA is aimed to cover all possible failure modes and provide corrective actions to lower the risk. In the case of risk reduction solely focused on process and equipment controls an easier method is desired. For this reasons we at Texas Instruments Deutschland developed the EPCA process (Equipment and Process Control Assessment). EPCA approach is dedicated to prevent quality issues caused exclusively by insufficient equipment- and process-parameter controls. Especially in ramp phases of new fab products the method can be beneficial if equipment-and process requirements have changed. EPCA is among other methods one of our elements for pro-active risk reduction and finally completes existing FMEA. In the presentation the workflow, the fab wide implementation of the method, key learnings and examples will be discussed.

Biografie
Dr.-Ing. Arthur Pelzmann Born:1967 Education: Physics Diplom, University of Ulm, PhD in EE (Optoelectronics, GaN LEDs) University of Ulm 1998 – 2000 Process Engineer at STEAG RTP Systems GmbH, Dornstadt 2000 – 2002 Project Manger, Product Manager at GFD Gesellschaft fuer Diamantprodukte mbH, Ulm (Startup, MEMS, medical) 2002 – 2016 Process Engineering Section Manager Diffusion/Surface Preparation TI Freising Wafer Fab 2016 – Mgr. Process Yield/SFC/Tool-Stability Projects TI Freising Wafer Fab

Information Age and Connectivity Enabled by Advanced Electronic Materials

Beica, Rozalia
Global Director New Business Development
The Dow Chemical Company

Abstract
The development of electronics and computing technologies have significantly evolved over the years; it has also driven the semiconductor industry to develop new technologies that can address a wide range of market needs and applications. If major technology advancements were driven by Moore’s Law and scaling the technology node, going forward, to address the market requirements for connectivity, cloud and ubiquitous computing, the focus of the industry will be shifting more towards heterogeneous and system integration. Electronic Materials plays a critical role across the entire process flow of electronics manufacturing from front-end to back-end: making the device, building the interconnects and substrates, packaging and assembling multiple components. Information Age products will further drive the need for more functionalities, higher performance while continuing to reduce cost and form factor. The world is becoming more and more dependent on data which will require the necessary hardware, increased speed and bandwidth technologies to support it. To address future smart device requirements, further innovation in materials, processes and integration technologies will be needed. The presentation will provide an overview and evolution of the advanced packaging market, highlighting the importance of heterogeneous integration and electronic materials to address the needs of future Information Age applications.

Biografie
Rozalia Beica, Global Director New Business Development, Dow Electronic Materials Rozalia focuses on strategic activities, identifying new technologies and markets for advanced packaging and interconnects. She has 25 years of international working experience across various industries, including industrial, electronics and semiconductors. For 18 years she was involved in the research, applications and strategic marketing of Advanced Packaging and 3D interconnect technologies, with global leading responsibilities at specialty chemicals (Rohm and Haas), equipment (Semitool, Applied Materials and Lam Research) and device manufacturing (Maxim IC). Prior to joining Dow, Rozalia was the CTO of Yole Développement where she led the market research, technology and strategy consulting activities for Advanced Packaging and Semiconductor Manufacturing. Throughout her career, Rozalia has been actively supporting industry activities worldwide: Program Director of EMC3D Consortia, General Chair of IMAPS Device Packaging and Global Semiconductor and Electronics Forums, Technical Advisory Board Member at SRC, chairing and participating in several committees (ITRS, ECTC, IMAPS, IWLPC, 3DIC, EPTC, ESTC, CPMT) and recently started chairing the WLP efforts within Heterogeneous Integration Roadmap activities. She has over 100 presentations and publications (including 3 book chapters on 3D IC technologies), several keynotes, invited presentations and panel participations. Rozalia earned a M.Sc in Chemical Engineering from Polytechnic University "Traian Vuia" (Romania), a M.Sc. In Management of Technology from KW University (US), and a Global Executive MBA from Instituto de Empresa Business School (Spain).

Nanoimaging and metrology of Nanopatterns under Opaque layers Using Subsurface Ultrasonic Resonance Force Microscopy

Sadeghian, Hamed
Principal Scientist
TNO

Abstract
Nondestructive subsurface nanoimaging of buried nanostructures is considered to be extremely challenging and is essential for the reliable manufacturing of nanotechnology products such as three-dimensional (3D) transistors, 3D NAND memory, and future quantum electronics. In this talk, the development of a subsurface nanoimaging technique, called subsurface ultrasonic resonance force microscopy (SSURFM) is reported. The capability and versatility of this method is demonstrated by the subsurface imaging of various samples including rigid structures buried under a soft matrix , rigid structures buried under multiple opaque layers , and rigid structures under a rigid matrix . The experimental results provide possible new industrial metrology and inspection solutions for nanostructures buried below the surface and through optically non-transparent layers.

Biografie
Dr. Hamed Sadeghian received his PhD (Cum Laude) in 2010 from Delft University of Technology. He then continued his career as a Postdoctoral fellow, where he developed several sensing and instrumentation method. He is currently a Principal Scientist at TNO, leading the program NOMI (Nano-Optomechatronics Instrumentations) and the research program 3D nanomanufacturing Instruments at TNO. In 2014 he also received his MBA degree from Leuven Vlerick Business School, Belgium. Dr. Sadeghian holds more than 40 patents, and has authored more than 60 technical papers and co-authored a book. He is a member of editorial advisory board of Sensors & Transducers Journal. He is also a member of technical committee of SENSORDEVICES conference since 2010 till present. He is also a recipient of several best paper awards. In 2012 he was awarded as “TNO excellent researcher”.

Minimal Fab: revolution technology for microelectronics

Yurkovets, Dmitry
Deputy of General Director
Tokyo Boeki (RUS) LLC

Abstract
Minimal^tm is a revolutionary approach to customized or small-volume chips production. Minimal^tm is a concept aimed to reduce the investment necessary to establish a semiconductor factory by 1000 times comparing to conventional factories (we call them "Mega Fabs"). Minimal^tm implies production based on 0.5 inch wafer transported from one production unit to another one in so-called Minimal Shuttle^tm maintaining clean environment inside. All of Minimal^tm production units have standardized body design and loading mechanism with particle locked air-tight docking unit. More than 70 types of different production and inspection units have been already developed in accordance with Minimal^tm standard. Currently, there are commercially available systems for mask-less lithography, substrate surface cleaning, oxidation, coating and washing of resist, development, etching, metal coating etc.

Biografie
Tokyo Boeki is a Japanese company founded in 1947. It distributes various kinds of scientific and high-tech instruments from Japan, including new and refurbished equipment for semiconductor industry. The business of Tokyo Boeki is very much diversified and covers not only sales but also production under the name of Tokyo Boeki, establishing of new licensed manufactures, consulting, spare parts and service support.

Advanced Cu Plating Technology for High Performance Power Devices

Suguro, Kyoichi
Project Manager and Chief Reasearch Scientist for Advanced Process Development
Toshiba Corporation

Abstract
The strong requirements for advanced power devices are lower ON resistance (RON) and more reliability for Ids-Vds characteristics as compared with current power devices. Cu metallization can satisfy both requirements due to lower electric resistivity, higher thermal conductivity and higher yield strength. In order to obtain better power device performance, it is necessary to plate 10-50 micron on semiconductor substrates. Among Cu film formation methods, newly developed Cu plating is most promising due to lower process cost and higher productivity in mass production. Cu films of 10 micron to 50 micron in thickness can reduce 15% to 40% of the temperature rise of transisters at the timing of high electric current is passed in power devices. However, thicker Cu films cause larger wafer warpage. Therefore, Cu film stress is required to be reduced while keeping lower resistivity of the Cu film. In our study the Cu film stress was successfully reduced to 10MPa or below. Double side Cu plating is more effective to minimize the Si wafer warpage and very thin Si membrane wafer can be successfully metallized with Cu films by controlling Cu thicknesses of frontside and backside by using simultaneously plating (multiplating Cu). In this paper a new Cu plating process and the advantage of Cu plating for power devices are discussed.

Biografie
Dr. Kyoichi Suguro, Chief Research Scientist and Project Leader, Advanced Discrete Development Center, Toshiba Corporation Storage and Electronic Devices Solutions Company, Japan

The Touchless Revolution

Migliore, Maurizio
COO
Touchless Automation GmbH

Abstract
In microassembly, high precision handling of small objects is still an open challenge. The main issues are related to the component releasing, positioning, contamination and damaging. Touchless Automation has developed a special tool that is able to manipulate micro components without touching them. This solution levitates micro-components of any kind of material, offering at same time a placing precision that could go higher than conventional methods used today in pick-and-place operations. Together with its customers, the device was implemented in different environments and was able to handle very different components. In many cases, results that are impossible for conventional contact-based tools were reached. As some of them said, this approach could mean a completely new world of opportunities to be unlocked.

Biografie
Maurizio has a Bachelor in Physical Engineering from Turin Politechnic and a Master Degree in Engineering for Micro and Nano Technologies from Turin Politechnic, Grenoble INPG and Lausanne EPFL. He completed his studies with an MBA from Collège des Ingénieurs. He worked as Project Manager in FCA, with responsibility over multi-country automation projects for automotive, with budgets exceeding 50 millions €. He then moved to Uber as Operations Manager in Italy, successfully managing and launching multiple products over different cities. In his last year at Uber he launched and managed Operations for UberEATS in Italy. He has now joined Touchless Automation as COO, with the purpose of shaping its operations and look for business and financing opportuities.

Corrosion behaviour of printed circuit board surface finishes in mixed flowing gas testing

Frisk, Laura
CEO
Trelic Ltd

Abstract
Corrosion resistance is vital for the reliability of many electronics devices especially in industrial use. Corrosion may cause both open and short circuits and therefore, especially for products having long use lives, corrosion may be a major reliability issue. Corrosion can be caused by different environmental contaminants and impurities due to manufacturing processes. The corrosion resistance can be tested using several test methods. In mixed flowing gas (MFG) testing the effect of high temperature, humidity and several different corrosive gases can be studied simultaneously. Such testing can be used to imitate different corrosive environments. In printed circuit boards (PCB) several different metal materials are typically used close to each other which makes them especially vulnerable to corrosion. For example, it is common that copper tracks on PCBs are covered using metallic surface finishes to both protect them and ensure good solderability. Typical surface finishes include electroless nickel immersion gold (ENIG), hot air solder leveling (HASL), immersion tin and immersion silver. Additionally, non-metallic organic solderability preservative (OSP) is commonly used. Even though the aim of the surface finishes is to protect the copper tracks, they may also make them more vulnerable to corrosion. For demanding use environments understanding the corrosion behaviour of the surface finishes is critical. In this study corrosion resistance of copper tracks with the five above-mentioned surface finishes were studied. No additional coatings were used. Surface insulation resistance test structures (SIR) were used to assess the corrosion behaviour. The test PCBs were tested in a MFG test and their SIR structures were periodically measured. Additionally, visual inspection was used and after testing detailed analysis of the corrosion process was conducted. Considerable differences between the surface finishes were seen with ENIG having the worst electrical performance.

Biografie
Laura Frisk received her M.Sc. degree in materials sciences and her Ph.D. degree in electronics from Tampere University of Technology (TUT), Finland, in 2000 and 2007 respectively. In 2013 she was granted Adjunct professorship (TUT) in the field of Reliability issues in electrical engineering. She worked for several years in TUT, Department of Electrical Engineering as the head Reliability Research Group. From 2013 to 2015 she worked as an EU Marie Curie Visiting Research Fellow in Imperial College London (ICL). Dr. Frisk has authored over 90 papers in peer-reviewed journals and conference proceedings. In 2016 Laura Frisk started as a CEO of TReliC Ltd, a company which offers consultation and solutions for challenging electronics packaging, materials and reliability issues. Trelic (Ltd) is a spin-off company from Tampere University of Technology. Trelic offers services in electronics packaging, materials characterisation and reliability analysis including planning of reliability testing, failure analysis and accelerated life testing. Additionally, the company offers courses in several areas. The company works in many industrial areas including, for example, consumer electronics, industrial electronics, medical electronics and power electronics.

All-printed thin-film transistors from networks of liquid-exfoliated nanosheets

Coleman, Jonathan
Professor of Chemical Physics
Trinity College Dublin

Abstract
The development of printed electronics (PE) is becoming increasingly important, with much research focusing on new materials. A number of material sets have been studied, including organics, inorganic nanoparticles and nanotube/nanowire networks. High operating voltages (up to 50V), low mobility (< 10 cm2/Vs) and poor current injection are still challenges for organic thin film transistors (OTFTs). Networks of inorganic nanoparticles or nanotubes have demonstrated mobilities and on:off ratios of >10 cm2/Vs and >106 respectively, but may face problems with scalability and integration. These problems have led a number of researchers in the field of 2D materials to attempt to produce printed transistors where the channel material is a network of semiconducting nanosheets. Because of the relatively high mobility of 2D materials, such a network might display mobilities which are competitive or even superior to those achievable with printed organics. In addition, one could envisage all-printed transistors consisting of interconnected networks of semiconducting, conducting and insulating 2D nanosheets. However, switchable nanosheet networks have not been demonstrated. Here, using electrolytic-gating, we demonstrate all-printed, vertically-stacked transistors with graphene source, drain and gate electrodes, a transition metal dichalcogenide channel and a BN separator, all formed from nanosheet networks. The BN network contains an ionic liquid within its porous interior that allows electrolytic gating in a solid-like structure. Nanosheet network channels display on-off ratios of up to 600, transconductances exceeding 5 mS and mobilities of >0.1 centimeters squared per volt per second. The on-currents scaled with network thickness and volumetric capacitance as well as the network mobility. In contrast to other devices with comparable mobility, large capacitances, while hindering switching speeds, allow these devices to carry higher currents at relatively low drive voltages.

Biografie
Jonathan Coleman is the Professor of Chemical Physics in the School of Physics and the CRANN and AMBER Research centres, all at Trinity College Dublin. His research involves liquid exfoliation of layered compounds such as graphene, boron nitride and molybdenum disulphide. Exfoliation of these materials gives 2D nanosheets which can easily be processed into thin films or composites from applications from energy storage to sensing to electronics. He has published approximately 250 papers in international journals including Nature and Science, has a h-index of 72 and has been cited ~30000 times. He was recently listed by Thomson Reuters among the world’s top 100 materials scientists of the last decade and was named as the Science Foundation Ireland researcher of the Year in 2011. Prof Coleman has been involved in a number of industry-academic collaborative projects with companies including Hewlett-Packard, Intel, SAB Miller, Nokia-Bell Labs and Thomas Swan.

Advanced Electron Microscopy Imaging and Analysis of Low-dimensional nanomaterials

Nicolosi, Valeria
Professor of Nanomaterials and Advanced Microscopy
Trinity College Dublin

Abstract
Low-dimensional nanostructured materials such as organic and inorganic nanotubes, nanowires and platelets and nanodevices are potentially useful in a number of areas of nanoscience and nanotechnology due to their remarkable mechanical, electrical and thermal properties. To make real applications truly feasible, however, it is crucial to fully characterize the nanostructures on the atomic scale and correlate this information with their physical and chemical properties. Advances in aberration-corrected optics in electron microscopy have revolutionised the way to characterise nano-materials, opening new frontiers for materials science. With the recent advances in nanostructure processability, electron microscopes are now revealing the structure of the individual components of nanomaterials, atom by atom. Here we will present an overview of very different low-dimensional materials issues, showing what aberration-corrected electron microscopy can do for materials scientists.

Biografie
Prof. Nicolosi is the Chair of Nanomaterials and Advanced Microscopy in Trinity College Dublin, a PI in the SFI funded Centre AMBER and Director of the Advanced Microscopy Laboratory. She has published more than 150 high-impact-papers and won numerous awards: RDS/Intel Prize for Nanoscience 2012, World Economic Forum Young Scientist 2013, WMB Woman in Technology Award 2013, SFI President of Ireland Young Researcher Award 2014, SFI Irish Early Stage Researcher 2016. Prof. Nicolosi has been awarded 5 European Research Council Awards: a €1.5m Starting Grant in 2011, 3 Proof-of-Concept top-up grants to bring results of frontier research closer to the market, and a €2.5m Consolidator Grant in 2016, bringing her total research funding awarded in the past 5 years to over €12 million.

Measurement of Airborne Nanoscale Particles Using Condensation Particle Counters

Remiarz, Richard
Business Director
TSI

Abstract
Internal geometries continue to get smaller with each generation of microprocessor and memory chip. The result is that with each generation, even smaller particles can cause contamination issues and affect yield. Just because a 0.1µm light scattering instrument is not measuring any particles doesn’t mean there aren’t 1000s of nanoscale particles present in a process. The laws of physics limit the ability of light scattering airborne particle counters to detect smaller particles, and existing instruments are not able to meet the needs of industry to measure airborne nanoscale particle concentrations. Measuring nanoscale particles requires the use of different technologies. One method of detecting nanoscale particles is to grow them to a larger size. Instruments that count airborne nanoparticles by growing them are called condensation particle counters (CPC). Commercial CPCs have been available for over 50 years. Traditionally, these instruments have been used for research and environmental monitoring. While some have been used in cleanrooms, most commercial instruments are designed for environmental studies measuring higher particle concentrations. These CPCs use alcohol or some other working fluid and these instruments generate significant numbers of airborne particles, potentially contaminating a cleanroom environment. In the last decade, water-based CPCs have been developed that eliminate undesirable chemicals from the cleanroom environment. More recently, high flow rate CPCs have been developed which have greatly reduced false count rates. CPCs specifically designed for cleanroom applications instruments provide the ability of continually monitoring airborne nanoscale particle concentrations at high flow rates without introducing chemicals or particles to the environment. These instruments allow semiconductor manufacturers to improve yields by monitoring particles smaller than can be detected by traditional light-scattering airborne particle counters.

Biografie
Richard Remiarz has been working for TSI for 37 years. He is Business Director for Controlled Environments. Richard holds an Engineering degree specializing in aerosol science and particle measurements. richard.remiarz@tsi.com

Enabling European Innovation to Capture the Opportunity in Automotive Semiconductors

Marced, Maria
President
TSMC Europe BV

Abstract
The need to drive safer, greener, and smarter is changing the automotive semiconductor industry. The evolution of autonomous driving, being always connected and adopting deep learning capabilities is enabling the vision of self driving cars. Giving Cars the Power to Sense, Think, and Learn . The tighter emission controls to combat global warming is seeing the rapid move to more energy efficient driving solutions. And collaboration of shared mobility with autonomous driving will bring many opportunities for new business models to apply in the smart city . As the world's leading foundry service provider, TSMC continues to innovate with advanced logic and specialty technologies, to provide the most extensive solutions for the automotive world. Through its OIP Ecosystem and manufacturing excellence, TSMC is helping to make driving safer, greener and more connected . Maria Marced will outline the opportunity to enable your innovations for the automotive world.

Biografie
Mrs. Maria Marced is President of TSMC Europe, with responsibility for driving the development, strategy and management of TSMC’s business in Europe, Middle East and Africa. Before joining TSMC, Maria was Senior Vice President of Sales and Marketing at NXP /Philips Semiconductors. Before this Maria was Senior Vice President / General Manager of the Connected Multimedia Solutions Business Unit overseeing Philips' semiconductor solutions for Connected Consumer applications. Previous to Philips, Maria was at Intel where she developed her professional career over 19 years, reaching the top position in the Europe, Middle East and Africa region as Vice President and General Manager. Mrs. Marced holds a PhD in Telecommunications Engineering at Universidad Politecnica de Madrid, Spain.

Graef, Mart
Strategic Programme Manager
TU Delft

Biography
Mart Graef is strategic program manager at the faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology (TU Delft) in The Netherlands. In this position, he develops technology partnerships with companies, institutes and universities, often within the framework of national and European cooperative projects. He participates in various initiatives aimed at defining strategies and technology roadmaps for electronic components and systems. He is a member of the International Roadmap Committee, which guides the International Roadmap for Devices and Components (IRDS). He is the chair of the AENEAS Scientific Council and participates in the AENEAS Management Committee. Mart Graef received a PhD in Solid State Chemistry from the University of Nijmegen, the Netherlands, in 1980. Subsequently, he joined Philips Research, where he held various positions in Eindhoven (the Netherlands) and Sunnyvale (USA) as a scientist and manager in the field of semiconductor process technology. He was strategic program manager at Philips Semiconductors and NXP until 2009, when he joined TU Delft, also as strategic program manager.

Bartha, Johann
Professor
TU Dresden

Biography
Prof. Dr. Johann W. Bartha received a Diploma and PhD. degree in solid state physics at the University of Hannover, Germany. He was two years Post Doc at the IBM T. J. Watson Research Center Yorktown Heights, N. Y. were he investigated Metal Polyimide interfaces for applications in multi layer ceramic packaging. 1985 he joined the IBM German Manufacturing Technology Center (GMTC) at Sindelfingen Germany as staff member and became responsible for plasma based technologies in semiconductor processing as a senior staff member. 1994 he accepted a C3 professorship at the University of Applied Sciences at Münster, Germany where he established a laboratory for micro manufacturing. 1999 he accepted a C4 professorship as head of the chair for Semiconductor Technology at the Technische Universität Dresden (TUD). Since March 2003 he is director of the Institute of Semiconductor- and Microsystems Technologies at TUD and established a strong collaboration between the Dresden University and the local semiconductor Industry. The research focus at his chair is BEOL processing, 3D integration including electrical and optical TSVs as well as Silicon thin film PV. The search for ultrathin conformal Cu barriers as required in damascene technology initiated the interest in ALD. In the meantime, the materials studied include high-k dielectrics, moisture barriers, metals, nitrides and graphene. Specific focus is on in-situ and in-vacuo analysis of the nucleation and growth within the ALD processes.

Simulating mechanism at the atomic-scale for atomically precise deposition and etching

Elliott, Simon
Head of Group
Tyndall National Institute

Abstract
Ongoing scaling in the semiconductor industry is increasingly dependent on the rapid introduction of processes for novel materials at sub-nanometre precision - every atom counts. To solve many of these processing challenges the industry is looking to atomic layer deposition (ALD) and atomic layer etch (ALE), and especially to area-selective versions of these processes that can add or remove material only from the substrate of choice. Some important advances have recently been made in area-selective ALD and substrate-selective thermal ALE, but this research has also illustrated how our lack of understanding hampers development. Here we present our recent computational studies of area-selective deposition of Si-based materials and of the mechanism of ALE of oxides, using density functional theory to establish the chemical mechanism, limiting factors and growth/etch rates. In particular, we compute relative reaction kinetics on various substrates, which ultimately determines selectivity. We illustrate how simulations can narrow down options for laboratory studies and provide mechanistic insight that is difficult to deduce experimentally, thus helping to accelerate the introduction of novel processes.

Biografie
Dr Simon Elliott leads the Materials Modelling for Devices group at Tyndall National Institute, Ireland. He studied chemistry in Trinity College Dublin (B. A. Mod., 1995) and theoretical chemistry in Karlsruhe Institute of Technology (Dr. rer. nat., 1999), and carried out postdoctoral research in Trinity College (1999-2001) before joining Tyndall in 2001. He has 75 publications, has been an invited speaker at meetings of the American Vacuum Society, Electrochemical Society, European Materials Research Society, China-ALD and American, Canadian and Finnish chemical societies, as well as communicating science to wider audiences on TV, radio, stage and online. He is a Fellow of the Royal Society of Chemistry and a member of the Project Management Institute. He was co-chair of the 16th International Conference on Atomic Layer Deposition (2016) and is chair of the European COST Action on ALD (2014-2018).

Enabling integrated active photonics with transfer printing

Corbett, Brian
Group Leader
Tyndall National Institute

Abstract
The talk discusses the emergence of silicon photonics as a scalable high performance platform for photonic integration enabling applications in communications and sensing. This platform needs III-V materials and devices to achieve its full potential. We show that transfer printing can address this problem with examples from the EU-TOPHIT project, the Irish Photonics Integration Centre and from X-Celeprint.

Biografie
Brian Corbett is leading the III-V materials and devices group at Tyndall, University College Cork Ireland. He received degrees in Physics and in Mathematics from Trinity College Dublin. His research is in the physics and technology of III-V based semiconductors with special emphasis on the use of advanced structuring and printing technologies to permit integration and add additional functionality. He has over 150 publications and 4 granted patents. His research achievements include the invention of a low cost method to obtain single frequency semiconductor lasers and a structure to significantly enhance the directionality of light from LEDs. He is the coordinator of the EU-funded TOP-HIT project and has been a partner in many European projects. He is a principal investigator in the Science Foundation Ireland funded Irish Photonic Integrated Centre (IPIC).

Power Semiconductor Wafer Thinning Process Control for Automotive Application

Guillou, Yann
Global Marketing Manager
UnitySC

Abstract
Wafer thinning has been used for many years in the microelectronic industry for a wide range of applications such as CMOS, memories, Power Semiconductors, MEMS, RFID and more. Still, in the last years, wafer thinning process has become more critical than ever due to the demand of ultra-thin and high-performance components, and consequently requiring better process control solutions. Back grinding is the most popular process method used to reduce the wafer thickness as it is low cost and high speed technic. However, the mechanical stress and heat applied during this process can generate some damages. These damages need to be carefully understood and control as they impact the performance and reliability of the final device. In this paper we will present new inspection technics with associated results allowing to perform the full wafer characterization after back grinding. The presentation will focus on two complimentary technics compliant with high volume manufacturing: - Phase Shift Deflectometry (PSD): A unique and powerful approach to perform high throughput full wafer surface macro inspection. PSD allows detecting topographic defects with only few nanometer height range on wafer frontside and backside surfaces. Combined with wafer reflectivity and global topography results, PSD provides a reliable method to detect defects such as sliplines, comets, grinding marks, star cracks, and more. - Confocal Chromatic (CC): A technology used to perform the wafer edge inspection (Top, Top Bevel, Apex, Bottom Bevel, Bottom), allowing a combination of high lateral resolution with a large depth of focus. The CC edge inspection can detect typical defects such as chips, shells, cracks, contamination areas and more that can propagate on the wafer.

Biografie
Yann Guillou is Global Marketing Manager at UnitySC

Current status and trends in RF SOI material and device

Raskin, Jean-Pierre
Professor
Université catholique de Louvain

Abstract
Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. This last decade Silicon-on-Insulator (SOI) MOSFET technology has demonstrated its potentialities for high frequency commercial applications pushing the limits of CMOS technology. Thanks to the introduction of the trap-rich high-resistivity SOI substrate on the market, the ICs requirements in term of linearity for RF switches, for instance, are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this lecture, their analog/RF behavior is described and compared. Both show pretty similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances. The use of specific RF test structures at the early stage of a technological node development is of first importance to analyze the transistor parasitic resistances and capacitances, the transistor cutoff frequencies, the self-heating, and the substrate coupling and non-linear behavior. The relative impact of the transistor and the passive elements and interconnections on the small- and large-signal RF performance of SOI RF switches and power amplifier will be presented.

Biografie
Jean-Pierre RASKIN (IEEE M'97, IEEE SM’06, IEEE F’14) was born in Aye, Belgium, in 1971. He received the Industrial Engineer degree from the Institut Supérieur Industriel d'Arlon, Belgium, in 1993, and the M.S. and Ph.D. degrees in Applied Sciences from the Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium, in 1994 and 1997, respectively. From 1994 to 1997, he was a Research Engineer at the Microwave Laboratory, UCL, Belgium. He worked on the modeling, characterization and fabrication of MMIC's in Silicon-on-Insulator (SOI) technology for low-power, low-voltage applications. In 1998, he joined the EECS Department of The University of Michigan, Ann Arbor, USA. He has been involved in the development and characterization of micromachining fabrication techniques for microwave and millimeter-wave circuits and microelectromechanical transducers/amplifiers working in harsh environments. In 2000, he joined the Microwave Laboratory of UCL, Louvain-la-Neuve, Belgium, as Associate Professor, and he has been a Full Professor since 2007. From September 2009 to September 2010, he was visiting professor at Newcastle University, Newcastle Upon Tyne, UK. Since 2014 he has been the head of the Electrical Engineering Department of UCL. His research interests are the modeling, wideband characterization and fabrication of advanced SOI MOSFETs as well as micro and nanofabrication of MEMS / NEMS sensors and actuators, including the extraction of intrinsic material properties at nanometer scale. He is IEEE Fellow, EuMA Associate Member, Société de l'électricité, de l'électronique et des technologies de l'information et de la communication (SEE) Member, and Material Research Society (MRS) Member. He was the recipient of the Médaille BLONDEL 2015, famous French reward that honors each year a researcher for outstanding advances in science which have demonstrated a major impact in the electrical and electronics industry. He received the SOI Consortium Award in 2016 in recognition in his vision and pioneering work for RF SOI. He is author or co-author of more than 700 scientific articles.

Digital Health in Cardiology: Evolution of Implantable Monitors

Piorkowski, Christopher
Head of Department of Invasive Elctrophysiology
University Dresden, Heart Center

Abstract
Telemedicine is an old concept for enhanced patient management, which should allow for earlier reaction and medical intervention in case of patient deterioration. Initial studies, however, using nurse guided telemedicine recordings of body weight, blood pressure and heart rate failed to improve clinical patient outcome. Only later on the usability of automatically transmitted biological signals obtained from implantable monitoring devices created add-on benefit on top of conventional care. The automatic mode of signal transmission and the fast cause-to-response time were identified as main reasons for better clinical outcome. Pacemaker and defibrillator technologies have played a pivotal role in that development. Today, however, implantable purely diagnostic sensor and monitoring devices have taken over the forefront of technological innovation. Although many of these technologies still share similarities with the pacemaker and defibrillator business - e.g. transmission lines and monitoring platforms – differences in customer needs push technological change and adaptation of functionality. The talk will introduce various technological approaches to monitor cardiovascular biological signals from the perspective of the implantable sensor technology. Apart from that it will highlight the aspect of data transmission, data management and data access, which gains overwhelming relevance using such treatment pathways. Today’s initiatives to assemble larger cardiovascular e-health networks will be discussed together with opportunities of big data harvesting and big data analysis to predict and prevent clinical outcome events.

Biografie
CURRICULUM VITAE PERSONAL DATA · name: Christopher Piorkowski · born: 5th of February 1975 · address: University of Dresden, Heart Center Department of Electrophysiology Fetscherstrasse 76 01307 Dresden TRAINING AND EDUCATION June 1993 Graduation from High School November 1999 Graduation from Medical School (Charité, Berlin) September 2002 Completion of American licensing (USMLE I, II and CSA) PROFESSION 01/00 - 07/05 House Officer and Fellow, Department of Electrophysiology, University of Leipzig, Heart Center 08/05 - 08/07 EP consultant, Department of Electrophysiology, University of Leipzig, Heart Center 08/07 - 03/11 Head consultant, Department of Electrophysiology, University of Leipzig, Heart Center 04/11 - 09/11 Director, department of Electrophysiology, Center of Cardiovascular Medicine, Bad Neustadt 01/12 – 01/13 Head consultant, Department of Electrophysiology, University of Leipzig, Heart Center Since 02/13 Director, Department of Electrophysiology, University of Dresden, Heart Center Since 06/14 Director, Steinbeis Research Institute, Electrophysiology and Cardiac Devices May 2006 Exam for specialisation in Internal Medicine June 2007 Exam for specialisation in Cardiology FOREIGN EXPERIENCE 08/97 – 08/98 „Medical School of the University of Bristol“(UK) 08/98 – 10/98 „Rush Presbytarian Medical School Chicago“(US) 06/99 – 09/99 „University Coimbra“(Portugal) DOCTORAL THESIS July 1997 Doctoral thesis covering the subject: „Comparative analysis of Carvedilol and Metoprolol in failing Human myocardial organ preparations – a contribution to athomechanism and therapy of heart failure“ ASSOCIATE PROFESSOR November 2011 Thesis covering the subject: „Catheter ablation of Atrial Fibrillation“ FIELDS OF SCIENTIFIC WORK · Catheter ablation of atrial fibrillation · Image integration in interventional cardiac electrophysiology · Catheter navigation and catheter contact technologies · Future developments of Cardiac Resynchronisation Therapy REVIEWER FOR · Heart Rhythm Journal · Journal of Cardiovascular Electrophysiology · Europace · European Heart Journal · European Journal of Heart Failure · International Journal of Cardiovascular Imaging · CardioVascular & Interventional Radiology MEMBER OF · German Society of Cardiology · European Society of Cardiology

Silicon Nanoparticle inks for RF electronic applications

Kühnel, Laura
PhD student
University of Duisburg-Essen

Abstract
Today´s printable electronics applications are limited by the electronic performance of available semiconductor functional inks, mainly based on organic or metal oxide semiconductors. While this aspect can be tolerated for DC applications or applications with low switching speeds; high frequency or ultra-high frequency applications, which will play an important role in the future of the internet of things, will require low cost manufacturing, such as printing, and an electronic semiconductor thin film performance going beyond the state of the art. Our approach to address this issue is the use of silicon (Si) made printable. To achieve this, we have developed inks based on Si nanoparticles electrostatically stabilized in organic solvents. The nanoparticle doping type can be freely chosen between n- and p-type, and the doping levels well controlled ranging from intrinsic Si to concentrations of above 1%. To obtain electronic functionality from thin films printed with our inks, a temperature step is required to reduce the number of thin film grain boundaries. For our purposes, the layers are laser treated using a KrF2 excimer laser emitting at 248 nm and with a pulse duration of ca. 7 ns. Here we discuss a self-organized cone shaped Si µ-structure formed by this process, with its growth being controlled by such parameters as laser energy density and nanoparticle thin film thickness. The Si µ-cones are highly crystalline as substantiated using TEM and µ-Raman analysis and allow us to introduce a novel type of Schottky diode, where the cone structure is embedded in a polymer matrix between an ohmic and a rectifying contact. These printed Schottky diodes exhibit true mechanical flexibility and electronic properties at ultra-high frequencies. Potential performance limitations are currently explored using computational electromagnetics full-wave simulations and non-linear RF circuit modeling yielding first estimates for operation frequency cutoffs well above 10 GHz.

Biografie
Laura Kühnel has received her M.Sc. degree in Nanoengineering from the University of Duisburg-Essen (Germany) in January 2017, placing an emphasis on Nanoelectronics/Nanooptoelectronics. During her master studies she has spent three months at the Purdue University (USA) working on nanoelectronic modeling. Currently, Laura Kühnel is pursuing her PhD at the Institute of Technology for Nanostructures (NST) at the University of Duisburg-Essen, researching the topic “Silicon µ-cone diodes for RFID applications”.

The European Quantum Technologies Flagship Program

Calarco, Tommaso
Professor
University of Ulm

Abstract
Technologies are currently being developed that explicitly address individual quantum states and make use of the “strange” quantum properties, such as superposition and entanglement – commonly referred to as Quantum Technologies (QT). Europe has a well acknowledged world-class expertise, world leading in many areas of quantum science and technology. However, both commercialization of research results and the interest of large industrial players is less developed in Europe than it is in some other parts of the world. In the past, Europe has famously failed to capitalize on major technology trends and we should not miss the opportunity this time. The European Commission has therefore announced an ambitious, long-term (10 years) and large-scale (~1 billion EUR) Flagship initiative. The QT Flagship will be a coherent and well-aligned program consisting of research and innovation projects, which will be selected through peer-reviewed calls for proposals, based on the Flagship’s strategic research agenda. The calls will be part of the EU H2020 and FP9 funding programs; financing is expected also through national funding programs and investment by industrial partners. The Flagship will be structured along four mission-driven application domains: • Communication, to guarantee secure data transmission and long-term security for the information society by using quantum resources for communication protocols; • Computation, to solve problems beyond the reach of current or conceivable classical processors by using programmable quantum machines; • Simulation, to understand and solve important problems, e.g. chemical processes, the development of new materials, as well as fundamental physical theories, by mapping them onto controlled quantum systems in an analogue or digital way; • Sensing and Metrology, to achieve unprecedented sensitivity, accuracy and resolution in measurement and diagnostics, by coherently manipulating quantum objects.

Biografie
Prof. Dr. Tommaso Calarco (Institute for Quantum Complex System, University of Ulm) has pioneered the application of quantum optimal control methods to quantum computation and to many-body quantum systems. He is the director of the centre IQST, which involves the University of Ulm, Stuttgart and the Max Planck Institute for Solid State Research. He is one of the author of the “Quantum Manifesto” and scientific member of the “High Level Steering Committee for the Quantum Technologies Flagship”.

Smart Systems enabling breakthroughs in crucial applications sectors

Gessner, Wolfgang
Head of Department
VDI/VDE-IT

Abstract
Smart Systems are intelligent technical subsystems with an own and independent functionality. They are (multi-)sensor and actuator based devices capable of describing, diagnosing and qualifying their environment, to make predictions, to reach decisions and to take actions. They provide safe and reliable autonomous operation under all relevant circumstances and are energy autonomous and networked if required. Smart Systems integrate “cognitive” functions with sensing, actuation, data communication and energy management. The underlying and enabling disciplines include nanoelectronics, micro-electromechanics, magnetism, photonics, chemistry and radiation. What distinguishes a smart system from a system that is purely reactive is the knowledge base which ranges from the set parameters for a feedback loop to embedded databases and algorithms. New materials, building blocks and integration technologies will have to be capable of meeting future use-case requirements on reliability, robustness, functional safety and security in harsh or not trustworthy environments. This includes the development of materials and technologies for surfaces and interfaces between the individual components in order to guarantee the necessary interconnecting functionality. Time to market will be reduced by new designs, building blocks, testing and self-diagnosis strategies, methods and tools. Smart Systems will enable technology breakthroughs for solutions in public health, environmental protection, energy efficiency, transportation, safety and security by • providing intelligent, self-controlled, and adaptable functionalities, • improving products through optimization of the overall system, • activating the immense potential of new materials and solutions, e.g. functional materials, cognitive capabilities, micro technologies, nano effects, composite layers, nano sized elements, and • redefining the interaction between human and technology through HMI solutions.

Biografie
Wolfgang Gessner studied political science, economics and philosophy in Berlin and Urbino/Italy. His professional experience covers national and European R&D policy mechanisms, technology transfer and innovation support instruments. Since 1989 he is with VDI/VDE-IT where he has been primarily dealing with transnational R&D co-operation and innovation support in the field of microsystems technologies. In that context he can rely on both a theoretical background as well as on a more than 25 years practical experience as the manager of technology transfer and innovation support projects. In his position as Head of the Innovation Europe Department he consolidated VDI/VDE-IT’s European activities. In 2004 he initiated the European AAL 169 programme. He also initiated and was chairing the conference series “International Forum on Advanced Microsystems for Automotive Applications” celebrating this year its 21th anniversary. He has been member of the Scientific Advisory Board of TTVenture and was active as an evaluator of R&D projects and programmes. Wolfgang Gessner is currently Head of the Department “Future Technologies and Europe” which focusses on industrial research policies, particularly on Electrical Mobility and Autonomous Driving. The department is managing some major governmental support programmes in this sector, and is also co-ordinating networks and carrying out studies. It is hosting the Office of EPoSS, the European Technology Platform on Smart Systems Integration, which he is Head of. He is member of the Private Members Board and the Governing Board of the ECSEL Joint Undertaking.

Enabling 5G RF-GaN Electronics through Innovative MOCVD and Wet Etch Process Technologies

Joshi, Somit
Sr. Director, Strategic Marketing
Veeco Instruments

Abstract
Emerging high frequency applications in connected devices and wireless infrastructure are requiring improved power efficiencies at higher output power and smaller form factor at lower cost. GaN is ideally suited for high frequency RF applications (e.g. mmWave) due to its higher power capability relative to Si and GaAs at higher frequencies. But producing these GaN devices in volume with the best performance and cost requires new innovations in MOCVD technology that delivers superior film quality with high yield, low defectivity and high uptime. 3D packaging is the most cost effective approach to integrate these RF devices with Si CMOS modems. The use of Through Silicon Vias (TSVs) has been implemented as a method for stacking die to achieve vertical interconnects despite the high processing costs. In many of these 3D concepts there is a need to thin the wafer to remove all of the silicon while being selective and not etching a variety of other films underneath that include oxides, nitrides and metals. In this talk, we will discuss the innovative next generation MOCVD system and how it enables 5G GaN based RF devices and the use of wet etch for wafer thinning processes in order to reduce costs of 3D packaging.

Biografie
Somit Joshi is an accomplished senior director in the High Technology, Energy sector and has a solid record of sales and marketing success in both domestic and international markets. Currently, as Senior Director Marketing MOCVD, he directs global marketing effort for Veeco’s MOCVD business. Before Veeco, Somit gained extensive experience in creating and executing product and business strategies in the semiconductor market.

The Challenges of Integration using LIDAR, RADAR and Video

Schulze, Matthias
Head of ADAS Development at Visteon
Visteon

Abstract
Tier 1 perspective on the challenges related to the development and integration of LIDAR, RADAR, and VIDEO systems for data collection and how the vehicle uses the data to make decisions for safe driving.

Biografie
Bio will be available on the SEMICON Europe Website.

The Integrated Connected Vehicle

Buburuzan, Theodor
Techology Evangelist, Volkswagen
Volkswagen

Abstract
The Europe oem perspective on the integration of all various technologiies including wireless networks, semiconductors, computer storage, high speed data transfer. Sensor technology. Machine learning and AI. Overview of the barriers and challenges with respect to this technology development and integration.

Biografie
Enabler, Strategist, Standardization Expert, Autonomous Driving, Automatic and Cooperative Driving, C-ITS, V2X, Connectivity & Backend Solutions, Mobile Online Services, Service Oriented Architectures (SOA), Heterogeneous Wireless Networks, Mobility Management Protocols, Mobility Support Protocols, Mobile Multimedia Broadcast Security Solutions, Content Distribution Frameworks, Mobile Software Agents

The automotive transformation – new technology drivers, the role of the semiconductor industry and the need for new industry alliances

Aal, Andreas
Semiconductor Strategy
Volkswagen AG

Abstract
A strongly growing fraction of required semiconductor functions in upcoming vehicle architectures, as of today, is based on semiconductor technologies and IP sets that have not been designed and qualified for automotive use. The corresponding gaps between automotive application requirements and semiconductor product capabilities w.r.t. automotive sub-functionalities, reliability, safety and security have to be analyzed and closed within the framework of a systematic, technical and economic risk management process. This process itself needs to be aligned, agreed and standardized along the supply chain. New and intense communication and work structures between car OEMs and semiconductor vendors (IDMs, Fabless & Foundries) as well as tier one’s are needed as the dependability on semiconductor market dynamics (availability, different targeted markets, etc.) and time-to-market innovations forces increase more than ever. It is an evolutional and logical step within the automotive transformation to partially act as an electronic vendor since 65% of major costs will be electronics and SW by 2025. The mentioned process (“capability enhancement process”) covers the automotive application (i.e. ECU), the underlying hardware system (PCBA) and corresponding active and passive components from a technical as well as an economic and architecture perspective. This includes system design for change management (updateability and upgradeability) - a hot topic that is strongly market driven as innovation cycles continue to shrink (ADAS/AI, CCAR, Infotainment). Considering the whole vehicle live cycle cost structure, it is obvious that the technology cycle time has immense influence on change management cost efforts and re-qualification processes. A technology that is very promising from a reliability, cost and market durability standpoint is FDSOI. So, comments on the opportunities of FDSOI for automotive as well as the need for potentially new package technologies will also be given.

Biografie
Andreas Aal drives the semiconductor strategy and reliability assurance activities within the electric-/electronic development department at Volkswagen, Germany, which he joint 2011. His activities concentrate on technology capability enhancement of nodes down to 12 nm as well as optimization of power electronics for automotive applications. He leads two semiconductor related European projects and is a strong representative of the through-the-supply-chain-joint-development approach. Mr. Aal has been working within the semiconductor industry since 1998 holding different positions from engineering to management working on production monitoring, process and technology development, qualification and failure analysis. Andreas (certified reliability professional) published and co-authored various papers, has given invited talks and tutorials, served as reviewer for different Journals and has served in the technical and management committee for IEEE IIRW. He is a member of the IEEE Electron Devices, CPMT, Nuclear and Plasma Sciences, Reliability and Solid-State Circuits Societies and also a frequent participant / contributor of the JEDEC subcommittee 14.2. Since 2007 he is chair of the German ITG group 8.5.6 (VDE) on (f) WLR, reliability simulations and qualification.

Functional and Safety Validation of Automated Vehicles

Krutz, Michael
Sr Vice President & Chief Product Officer at Wind River
Windriver

Abstract
Given the complexity of autonomous driving and with so much at risk, the need for industry-wide coordination and best practices is critical in order to affect real change for the masses. Innovative technology is a key first step but merely one piece of a lengthy and complex process to get autonomous cars on the road.

Biografie
Michael Krutz is responsible for the company’s business units, including core operating systems, connected vehicle, cloud technologies, and software defined infrastructure. Within this role he oversees all strategy, product management, and execution, as well as the financial performance for these businesses. With more than 30 years of engineering, services, and general management experience, he most recently served as senior vice president for automotive solutions at Wind River.

Novel Printed Circuit Boards - Innovative Solutions for flexible and stretchable Systems

Schreivogel, Alina
R&D Manager
Würth Elektronik GmbH & Co. KG

Abstract
In recent years great progress has been made regarding the development und realization of flexible and stretchable solutions. It is expected that flexible and stretchable technologies will especially find use in medical electronics, wearables, soft/smart robotics and bionics. Numerous functions and performances could be realized through integration of electronic components. High flexibility, stretchability, as well as freedom of forms make the novel technologies essential for the future electronics in smart applications. Würth Elektronik has researched novel technologies within several research projects. ECT (embedded component technology) with integrated silicon chips into thin foils and Stretchable Technology called TWINflex-Stretch are presented based on principles and examples. With the growing demand for mechanically flexible electrical systems and the increasing level of integration of electrical assemblies, hybrid build-ups combining polymer substrates and ultrathin flexible silicon chips are getting more important. These systems need thin chips which maintain their functionality even in bent condition as well as reliable handling and assembly processes. Those activities mainly have been driven by the means of miniaturization and the increasing integration density of outer layer assembly of PCBs. Novel assembly concepts like ECT are used to assemble these thin ICs having a thickness of less than 20 µm onto flexible substrates and to manufacture System-in-Foils. Stretchable electronic Systems enable new degrees of mechanical freedom in electronics and provide a new level for developers and product designers. The stretchability of the novel printed circuit boards can be realized by use of Polyurethane as a base material in combination with meander shaped copper conducting paths between the components. The innovative Stretchable Technology is based on conventional circuit board processes and is completely compatible with machinery and materials in the production.

Biografie
Alina Schreivogel studied Chemistry at the University of Stuttgart and received the Diploma in 2004. In 2008 she was awarded Ph.D. from University of Stuttgart in the field of Organic Chemistry. After several years as Scientist and Academic Councillor she changed 2010 to Würth Elektronik GmbH & Co KG, Circuit Board Division. Since then she is a senior scientist and project manager in the Research and Development Department and responsible for different research focuses like Flex- and Stretch Foil Systems, Printingtechnologies, Embedding Technologies in Foils, Medical and Textile Electronics.

Challenges for Non Volatile Memory (NVM) for Automotive High Temperature Operating Conditions

Muffler, Alexander
Business Line Manager Automotive
X-FAB Semiconductor Foundries AG

Abstract
This presentation will show the challenges seen from the viewpoint of a silicon foundry for Non-Volatile Memory (NVM) IPs developed for automotive high-temperature applications. NVMs used in harsh automotive environments need to be robust and reliable. Especially ICs which are qualified for high-temperature applications with operating temperatures up to 175°C have additional challenges which need to be fulfilled by the used NVM IPs as well. This includes not only long data retention and a certain endurance cycling, but also ESD robustness which can only be measured on silicon by different layout variants of the same NVM IP. Depending on NVM application requirements, different memory principles such as SONOS or floating gate bitcells can be used and optimized to achieve best results. Especially for integrated circuits developed for safety critical applications based on ISO TS 26262, there is a need to ensure comprehensive testability, critical signal observability and monitoring during the application. Test capability means that for example that the measurement of the ‘high’ and ‘low’ window of each memory cell is considered. Signal monitoring includes access to charge pump, bandgap and memory reference voltage levels whereas and fault tolerance refers to the usage of parity bits, single or even double bit error detection and correction.

Biografie
As Business Line Manager Automotive, Alexander Muffler is responsible for the development of product marketing strategies for Automotive semiconductor processes as well as NVM IP for integrated circuit technologies. Prior to joining X-FAB, he worked for Chartered Semiconductor as EDA Manager Europe. Earlier, Alexander worked as an ASIC design engineer at Thesys GmbH. Alexander has more than 24 years of semiconductor technology and design experience. He holds a Master’s degree in Telecommunication Engineering from the University of Applied Science in Konstanz, Germany.

Test Floor Automation – is it finally due, after years of talking?

Bursian, Andreas
Director InStrip & InMEMS Products
Xcerra

Abstract
While semiconductor front end automation took place years ago, the back end test floor material handling is still barely automated. The semiconductor back end has had to deal with a variety of different package types and form factors, resulting in different transport media, such as bulk, tube, metal magazine, tray and reel. Even though SEMI has started to standardize this media, there are still many different form factors to consider. This has made it impossible to come up with a global material loading and unloading standard for all equipment. To offset this lack of automation, and still achieve their cost targets, semiconductor manufacturers moved backend test operations into countries with low labor costs. After decades of just talking about backend automation, there are now signs on the horizon that the industry is getting serious about automating the backend test floor. This presentation will analyze what mechanisms are driving this trend to automation and what conditions changed to generate the current momentum. It will further show how the suppliers and some test floor managers are preparing for this process enhancement.

Biografie
Dipl. Ing. Andreas Bursian is Director InStrip & InMEMS Products at Multitest the Handler Group of Xcerra. He got his degree at the University of Applied Sciences and Arts of Dortmund in Electrical Engineering. After University he spent 10 years in SPICE based simulation and characterization of semiconductor devices as well as in electromagnetic field simulation. In 1997 he joined Multitest working as a Software Engineer for Pick&Place handlers and as a specialist for software interfaces. Since 2013, he has been responsible for InStrip & InMEMS Products at Multitest.

Cockburn, Peter
Senior Product Manager - TCI
Xcerra Corporation

Biography
Peter Cockburn has worked in the ATE industry for over 27 years at Schlumberger, NPTest, Credence, LTX-Credence and now Xcerra. After developing real-time and GUI software for ATE systems, he moved into product marketing and managed the launch of several SOC ATE systems and new analog test options as well as providing marketing and sales support in USA, Asia and Europe. As Senior Product Manager of the Test Cell Innovation team, he is responsible for defining and delivering complete test cells to customers that reduce cost, increase uptime and improve quality when testing semiconductors. He has an Engineering degree from the University of Southampton, UK.

From PPM to PPB – how device manufacturers meet increasing challenges in automotive quality and reliability

Drescher, Dirk
General Manager
XFAB

Abstract
Electronics applications in automotive have been increasing for years. With the shift towards autonomous driving expected within the next decade the number of electronic devices residing in a vehicle will grow at an even faster rate. Thus, current defect levels around 1 ppm are not sufficient anymore to meet future requirements in device reliability and robustness. Safety specifications for autonomous driving vehicles will further raise the pressure and push reliability standards down to ppb levels. Semiconductor device manufacturers are required to implement improved and new methodologies to meet these requirements. This talk aims to discuss opportunities, tools and methods in semiconductor design, development, manufacturing and test that help pushing defectivity levels from ppm to ppb.

Biografie
Dirk Drescher is Chief Executive Officer and Site Manager of X-FAB Dresden since August 2016. He started his career in semiconductors in 1995 as process engineer for Siemens Microelectronics Center Dresden and served in different managerial functions until 1999. In 2000 he joined Infineon’s Semiconductor 300 organization as Engineering Manager to help starting up the worlds first 300mm Semiconductor Manufacturing Line. In 2008 he joined Calyxo GmbH managing a thin film Solar Panel manufacturing line. 2010 Mr. Drescher joined Globalfoundries to help starting up its green field/ leading edge 300mm Manufacturing Site, Fab8, Malta, NY, USA. In 2013 he took over a managerial position at Globalfoundries Fab1, Dresden, Germany. Mr. Drescher holds a diploma in Physics from Dresden Technical University and a PhD in Experimental Physics from the Technical University Chemnitz.

Advanced Packaging: A very dynamic ecosystem!

Ivankovic, Andrej
Technology and Market Analyst
Yole Developpement

Abstract
Future semiconductor drivers are expected to be fragmented and more diverse than in the mobile era. Scaling continues, but functionality and system level features are becoming increasingly important for product differentiation. The future brings the Internet of Things, the semiconductorization of the automotive industry, 5G connectivity, augmented & virtual reality and artificial intelligence. In such an environment, advanced packaging is transforming from follower of scaling technology nodes to enabler of future semiconductor applications and products, having direct impact on product success rates. Heterogeneous integration of multiple dies from the latest to legacy front-end nodes, involving a mixture of latest technology high density interconnects to lower cost mature interconnects, at high levels of customization is the future of semiconductor packaging. Advanced packaging is experiencing a total revenue CAGR 2017-2022 of 7% from 24$B to 33$B, higher than the total packaging industry (3-4%) and semiconductor industry (4-5%). The fastest growing (and newest) advanced packaging platforms are Fan-Out with 36% and 2.5D/3D TSV with 28%. Fan-Out in particular is creating technology disruptions, new competitions and has already a significant impact on the biggest advanced packaging platform – Flip Chip. Advanced packages will continue to predominantly address high end logic and memory in computing and telecom, with further penetration in analog and RF in high end consumer/mobile segments, while eyeing opportunities in growing automotive and industrial segments. However, there are several concerns about timing of future market growth and in certain cases technology readiness. The following presentation will take a look at the field of advanced packaging and provide an overview of the latest market and technology developments. This will include reflections on the industry drivers, forecasts, roadmaps and supply chain shifts.

Biografie
Andrej Ivankovic is a Technology & Market Analyst, in the Advanced Packaging and Semiconductor Manufacturing team, at Yole Développement the "More than Moore" market research and strategy consulting company. He holds a master’s degree in Electrical Engineering, with specialization in Industrial Electronics from the University of Zagreb, Croatia and a PhD in Mechanical Engineering from KU Leuven, Belgium. He started as an intern at ON Semiconductor performing reliability tests, failure analysis and characterization of power electronics and packages. The following 4 years he worked as a R&D engineer at IMEC Belgium on the development of 3D IC technology, focusing on electrical and thermo-mechanical issues of 3D stacking and packaging. Part of this time he also worked at GLOBALFOUNDRIES as an external researcher. He has regularly presented at international conferences authoring and co-authoring 18 papers and 1 patent.

How technology development will shape the power electronics market in the next 5 years

Rosina, Milan
Senior Analyst, Energy Conversion and Emerging Materials
Yole Développement

Abstract
The power electronics represents a healthy market driven mainly by the CO2 emission reduction targets. In 2016, the power device market was worth $16B and it will grow steadily for the next five years. Within this presentation, Yole Développement will highlight the latest material and technology trends and the impact they will have on the power electronics supply chain. The needs for lower CO2 emissions have led power electronic industry to develop more efficient and smaller solutions. Increased power density results in strong technology challenges calling for innovations on different levels: semiconductor material, packaging materials, device design… Several new power device designs have emerged in the last years, principally driven by the severely challenging requirements for high power density and integration from the electric and hybrid electric vehicles (EV/HEV). The high manufacturing volumes observed in automotive industry help and accelerate the implementation of these new technologies. All these technology trends are creating opportunities for some material suppliers, but at the same time, they are threatening some of today’s businesses for power electronics. In recent years, we have seen consolidation among power semiconductor market leaders with several acquisitions, such as Infineon buying International Rectifier and ON Semiconductor buying Fairchild. These moves were intended to strengthen positions in the overall power semiconductor business. Nevertheless, in coming years the market leaders will face strong competition from Tier-1 automotive manufacturers and new entrants from China. Outsourced Semiconductor Assembly and Test companies (OSATs) could also propose services to provide advanced packaging technologies to power device manufacturers. This will define a new business model that diverges from the traditional power device supplier business.

Biografie
Dr. Milan Rosina is a Senior Analyst for Energy Conversion and Emerging Materials at Yole Développement. Dr. Rosina has more than 15 years of scientific and industrial experience with prominent research institutions, an equipment maker, and a utility company. His expertise includes new equipment and process development, due diligence, technology, and market surveys in in the fields of power electronics, renewable energies, energy storage, batteries, and innovative materials and devices.

Organic TFTs: Are They Ready to Disrupt the Display Industry and Enable Fully Flexible Devices?

Eloy, Jean-Christophe
President & CEO
Yole Developpement

Abstract
This presentation will briefly review backplanes technologies for flexible displays and focus on the current status and potential of organic semiconductors TFTs (OTFTs). Organic semiconductors appeared in the mid 1980’s but their performance limited them to the status of R&D curiosities. By the mid 2000’s, performance had increased to be on par with industry standard amorphous-Si (a-Si). As of 2017, mobility comparable to oxides TFTs have been demonstrated. Organic TFTs enables truly flexible AMOLED displays with bending radius below 1mm (“wrinkable”). The technology can easily be implemented in older, fully depreciated a-Si fabs with minimum capex and produce high performance displays. Most panel makers are working on OTFTs. But each has a different view regarding how they fit on their roadmap, ranging from R&D curiosity to defensive project or strategic and differentiating technology. This presentation will sort through the hype and misconceptions and provide an update on the status and roadmap for organic semiconductor displays.

Biografie
Pars MUKISH holds a master degree in Materials Science & Polymers (ITECH - France) and a master degree in Innovation & Technology Management (EM Lyon - France). Since 2015, Pars MUKISH has taken on responsibility for developing LED, OLED and Sapphire activities as Business Unit Manager at Yole Développement. Previously, he has worked as Marketing Analyst and Techno-Economic Analyst for several years at the CEA (French Research Center).

Flexible Energy Storage: Factors affecting the flexibility of a battery

Hiralal, Pritesh
CEO
Zinergy UK Ltd.

Abstract
Flexible electronics requires flexible energy to power it. A growing number of applications such as medical devices, logistics, wearables and smart cards require a suitable energy source. However, there is no standard forms or sizes for flexible batteries, as there are in the bulk counterparts, and requirements for both electrical and mechanical characteristics vary significantly from application to application. Printing batteries naturally allows for this flexibility and we will share some of the experience and possibilities from our developments so far. For instance, flexibility requirements of vary with applications and we show how mechanical flexibility can be tuned with parameters such as formulation and layer thickness. This has resulted in what we believe to be the thinnest printed battery. Examples of integration with other devices will also be shown.

Biografie
Dr. Pritesh Hiralal, CEO/CTO, studied Physics and completed his Ph.D. in Engineering at the University of Cambridge. He has spent time in business in Spain and set up Casa Hiralal S.L. and Zendal Backup. He has spent time in industry at the Nokia Research Centre working on high power energy storage, and has published 30+ papers and 8 patents in the field. He has consulted for materials as well as energy storage device companies. He spent time as a Research Associate as well as an adjunct lecturer at the University of Cambridge and is now a founder and CEO at Zinergy.

Building Bridges between SEMI Standards, Ind40 and IoT - Integrate Systems from all worlds

Mayer, Hans
COO
znt Zentren für Neue Technologien GmbH

Abstract
Technologies, Tools and Sensors coming from Industrie 4.0 and IoT offer new chances to improve productivity in Semiconductor Industry. The Industry 4.0 and the IoT initiatives push a lot of new concepts, technologies and standards for integrating system in production as well as in the consumer world. Due to the broad adoption, many powerful and cost efficient tools enter the market. The challenge for Semiconductor Industry is to keep the established Semi Standard Interfaces and, in parallel, generate benefits from the new Technologies and Standards. The znt-Richter integration platform PAC builds bridges between those worlds. The presentation shows, how you can perfectly interconnect between Systems with Semi, Industrie 4.0 and IoT interfaces.

Biografie
Speaker: Hans Mayer (Ing.) Hans Mayer has 28 years of experience in IT Systems for automation. After 6 years at Siemens AG in Munich in software development for cell phones, he joined znt-Richter. With znt-Richter he implemented many automation projects as software developer and project manager for different industries with a focus on Semiconductor and Solar Industry, Medical Device and Electronic Industry and Automotive Suppliers. Name: Hans Mayer (COO) Company: znt Zentren für Neue Technologien GmbH, Lena-Christ-Str. 2, D-82031 Grünwald